KR940000223B1 - Pulse width modulator - Google Patents

Abstract

The high accuracy modulating circuit for modulating a pulse width includes a source clock, a microcomputer for outputting a pulse width data, a 8-bit counter incremented by one according to the source clock from the microcomputer, a 8-bit pulse width data register for storing and outputting the 8-bit pulse width data among the pulse width data from the microcomputer, a comparator for comparing the count value outputted from the 8-bit counter with the 8-bit pulse width data, if they are the same, outputting a signal having pulse width proportional to the 8-bit pulse width data for each 26 period, a 6-bit counter for storing and outputting a lower 6-bit pulse width data among the pulse width data from the microcomputer, a 6-bit add pulse data register for storing an add pulse data from the microcomputer, a pulse add logic for discriminating the output value of the 6-bit counter and the value of the 6-bit add pulse data register, and means for logic AND operating of output of the comparator and the output of the pulse add logic, thereby improving the accuracy of the pulse width modulating circuit.

Description

High Precision Pulse Width Modulation Circuit

1 is a circuit diagram of a high precision pulse width modulation circuit according to an embodiment of the present invention,

2 is a circuit diagram of a conventional pulse width modulation circuit,

3 is a state diagram of a modulated signal according to an embodiment of the present invention,

4 is a table showing the change in the pulse width by the pulse width modulation data,

5 is a table showing where pulses are applied to modulated signals according to ad pulse data.

6 is a block diagram showing that a high precision pulse width modulation circuit according to an embodiment of the present invention is used.

* Explanation of symbols for main parts of the drawings

A: Micom B: 8 bit counter

C: comparator D: 8-bit pulse width data

E: 6 bit counter F: Pulse add logic

G: 6-bit ad pulse data H: First block

I: second block

The present invention relates to a high-precision pulse width modulation circuit. More specifically, in a microcomputer-controlled pulse width modulation circuit (Fosc / 2 ⁸ kHz), a frequency of 2 ¹⁴ = 4,096 modulation waveforms is used. The present invention relates to a high-precision pulse width modulation circuit that can dramatically increase the accuracy by enabling output.

The pulse width modulation circuit outputs a pulse signal having a constant frequency. The pulse width modulation circuit changes only the duty cycle without changing the frequency. The precision of the pulse width modulation circuit (the number of modulated waveforms) is proportional to the number of bits of the pulse width modulation circuit. .

For example, in the case of a 6-bit pulse width modulation circuit, the duty of the pulse can be changed in 2 ⁶ = 64 steps to create 64 modulation waveforms. In the case of a 14-bit pulse width modulation circuit, the duty of the pulse is By changing 2 ¹⁴ = 4,096 steps, 4,096 modulation waveforms can be created. Therefore, as the number of bits of the pulse width modulation circuit increases, the duty can be further subdivided, thereby improving the accuracy of the pulse width modulation circuit.

As a type of pulse width modulation circuit as described above, in the case of a pulse width modulation circuit conventionally controlled by a microcomputer, the frequency of the pulse width modulation circuit is based on the number of bits of the source clock and the pulse width modulation circuit supplied by the microcomputer. Since the frequency of the output signal of the pulse width modulation circuit is determined by (the number of microcomputer source clock / 2 ^{pulse width modulation circuits} ), the higher the accuracy of the duty of the output signal is, the lower the frequency of the output modulation signal is. .

As described above, when the frequency of the output signal of the pulse width modulation circuit becomes slow, a lot of difficulties are involved in manufacturing a peripheral device of the pulse width modulation circuit. For example, if the designer implements logic to input the output signal of the pulse width modulation circuit to the low pass filter and convert it to a voltage level, the low pass filter is generated when the frequency of the output signal of the pulse width modulation circuit becomes slow. As the size of registers and capacitors increases, the logic becomes harder as the designers intended.

Hereinafter, a conventional pulse width modulation circuit will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram of a conventional pulse width modulation circuit.

As shown in FIG. 2, a conventional pulse width modulation circuit includes a microcomputer, a 14-bit counter having an input terminal connected to a source column output terminal Fosc of the microcomputer, and an input terminal connected to the microcomputer through Vis. And a comparator having an input terminal connected to an output terminal of the 14 bit counter and the 14 bit pulse width data register.

The operation of the conventional 14-bit pulse width modulation circuit by the above configuration is as follows.

In the conventional pulse width modulation circuit shown in FIG. 2, the frequency of the pulse width modulation signal depends on the number of bits of the counter of the pulse width modulation circuit, and the pulse width of the pulse width modulation signal is the pulse width data provided by the microcomputer. It depends on.

If the frequency of the source clock (Fosc) provided by the microcomputer is referred to as Fosc 편의 for convenience, the frequency of the modulated signal is determined as (Fosc / 2 ¹⁴ kHz), and the pulse width is determined by the pulse width data provided by the microcomputer. By deciding on them, 2 ¹⁴ = 4,096 modulation waveforms can be produced.

For example, if the pulse width data input to the 14-bit pulse width data register is defined as ″ 00 0000 0000 0000 ″ in binary, the modulated signal, which is the output signal of the comparator, is modulated as a low level signal with 0% duty and outputted. If the pulse width data input to the 14-bit pulse width data register is defined as ″ 10 0000 0000 0000 ″ in binary, the modulated signal, which is the output signal of the comparator, has a frequency of (Fosc / 2 ¹⁴ kHz) and the duty is 50%. It is modulated and output as an in-pulse signal.

However, the above-described conventional pulse width modulation circuit has a problem in that the frequency of the modulation signal is slowed down to increase the accuracy of the modulation signal.

Accordingly, an object of the present invention is to eliminate the above-described problems, and has a frequency of (Fosc / 2 ⁸ kHz) in a microcomputer controlled pulse width modulation circuit, while having 2 ¹⁴ = 4,096 modulation waveforms as in the prior art. The present invention provides a high-precision pulse width modulation circuit having high accuracy by enabling the output of a PB-A.

Another object of the present invention is to provide a high-precision pulse width modulation circuit configured such that the output frequency does not change rapidly even when the resolution of the pulse width modulation circuit is increased, and the precision is the same as that of the conventional pulse width modulation circuit.

A configuration of the present invention for achieving the above object includes a source clock, a microcomputer for outputting pulse width data, an 8-bit counter that counts by increasing by one according to the source clock provided from the microcomputer, and the microcomputer. An upper 8-bit pulse width data register for storing and outputting the upper 8-bit pulse width data from the pulse width data provided from the upper-level, and a high-order 8 input from the 8-bit pulse width data register and a count value input from the 8-bit counter. A comparator for comparing bit pulse width data and outputting a signal having a pulse width proportional to the 8 bit pulse width data every 2 ⁸ cycles by outputting a low level signal when they are equal to each other, and a pulse width provided from the microcomputer 6-bit counter that stores the lower 8-bit pulse width data and outputs it And a 6 bit add pulse data register for storing the ad pulse data input from the microcomputer, a pulse add logic for determining an output value of the 6 bit counter and a value of the 6 bit add pulse data register, the comparator and the pulse add. OR gates for ORing logic values.

With the above configuration, the most preferred embodiment which can be easily carried out by those skilled in the art with reference to the present invention will be described in detail with reference to the accompanying drawings.

1 is a circuit diagram of a high precision pulse width modulation circuit according to an embodiment of the present invention.

As shown in FIG. 1, the high precision pulse width modulation circuit according to the embodiment of the present invention is controlled by the microcomputer A, and the microcomputer A determines the higher bit pulse width for determining the source clock Fosc and the duty. The data, the lower bit add pulse data, and the control signal are transmitted to the pulse width modulation circuit unit H and I through the bus, and the pulse width modulation circuit unit H and I outputs the modulated pulse width signal.

In the present invention of FIG. 1, the structure of the pulse width modulation circuit is largely divided into two blocks. One (H) serves to determine the period and fundamental modulation waveform of the pulse width modulated signal, and the other (I) adds an add-pulse at a predetermined position of the modulated basic modulation waveform signal. By forming a complete modulation waveform.

The frequency of the output modulation signal of the pulse width modulation circuit proposed in the present invention is determined by the number of bits of the counter B of the block H, which determines the basic pulse width, unlike the prior art.

Referring to the present invention with an example 14-bit pulse width modulation circuit as follows.

When the 14-bit pulse width modulation circuit is configured in the present invention, the microcomputer A outputs 14-bit pulse width data, and the upper 8 bits of the 14-bit pulse width data applied from the microcomputer A are used. The lower 6 bits are separated, and the upper 8 bits are used as the data of the block (H) that determines the basic pulse width, and the lower 6 bits are divided into (Fosc / 2 ⁸ ) 64 signals into one section. It is used as data of the block I which applies an ad pulse to a predetermined position.

Figure 3 illustrates the method presented in the present invention as described above. In FIG. 3, TS is a signal obtained by dividing the source clock Fosc by the number of bits (2 ⁸ = 64) of the 8-bit counter B, which determines the frequency of the modulation signal, and TO is an 8-bit pulse width data register D. Is the basic pulse width in the case where the basic pulse width determination data is (0000 0101), and TB shows 64 Ts clocks having a frequency of (Fosc / 2 ⁸ kHz) in one section.

FIG. 4 shows the change in the basic pulse width of the modulated signal by the upper 8-bit data loaded into the 8-bit pulse width data register among the 14-bit pulse width data applied from the microcomputer A. FIG. Is a table showing which position of the add pulse is input to the 64 signals by the lower 6 bits among the 14-bit pulse width data.

For example, if the 14-bit data is ″ 1000 1000 ″ ″ 101000 ″, as shown in FIGS. 4 and 5, the frequency TS of the pulse width modulated signal is (Fosc / 2 ⁸ ), and the basic pulse width is As shown in Fig. 4, when 8-bit pulse width data is " 1000 0000 ", it is 128/256%, so it is 128/256%. In addition, the add pulse is added in 8th, 24th, 32th, 40th and 56th times of the TB section of FIG. 3 to output the final pulse width modulated signal.

The position of the ad pulse described above is applied as indicated in FIG. As shown in FIG. 3, the basic pulse width when the add pulse is added is (n + 1) TO.

The gist of the present invention is that even if the number of bits in the pulse width modulation circuit is increased, the result is the same as the effect obtained in the prior art by adding a pulse to a specific position of the modulation signal without drastically decreasing the frequency of the modulation signal. In the case of the existing 14-bit pulse width modulation circuit, the value obtained by dividing the source clock provided by the microcomputer 2 ¹⁴ becomes the frequency of the pulse width modulation circuit and outputs a modulated signal having a significantly lower frequency. Due to this, there are many difficulties in the construction of the circuit using the modulation circuit. The present invention has been made to have the same precision as the conventional pulse width modulation circuit while maintaining the frequency of the modulated signal to the pulse width modulation circuit to compensate for this disadvantage.

Example 1

In the case where a high precision pulse width modulation circuit is used for the channel selection function of a TV or a VTR, FIG. 6 shows an example in which a pulse width modulation circuit is used for the channel selection function of a TV or a VTR. In response, the pulse width modulation circuit outputs a corresponding modulation signal to a low pass filter (LPF) to change the modulation signal to a voltage level.

When a signal converted to voltage level is applied to a voltage controlled oscillator (VCO), the VCO generates a signal having a specific frequency. When the signal is applied to a mixer of a tuner, the channel selector has a function of selecting a channel.

As described above, according to the embodiment of the present invention, the conventionally used by manual tuning can be used as the software tuning of the microcomputer control method.

Claims (2)

An 8-bit counter B for counting operation by increasing by one according to the source clock Fosc, the microcomputer A for outputting pulse width data, and the source clock Fosc provided from the microcomputer A; An 8-bit pulse width data register (D) for storing high-order 8-bit pulse width data among the pulse width data provided from the microcomputer (A) and outputting the same; and a coefficient value output from the 8-bit counter (B); Compares the upper 8-bit pulse width data input from the 8-bit pulse width data register D and outputs low-level signals when they are equal to each other, thereby having a pulse width proportional to the 8-bit pulse width data every 2 ⁸ cycles. A comparator C for outputting a signal, a 6-bit counter E for storing lower 6-bit pulse width data among the pulse width data provided from the microcomputer A, and the microcomputer A; A 6-bit ad pulse data register (G) in which the ad pulse data inputted from the data is stored, and pulse add logic for determining an output value of the 6-bit counter (E) and a value of the 6-bit ad pulse data register (G). F) means for logically combining the output of said comparator (C) with the output of pulse add logic (F). 2. The high precision pulse width modulation circuit of claim 1, wherein the width of the add pulse is equal to the width of a source clock.

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