KR930024119A - In-situ BPSG film deposition and planarization method - Google Patents

In-situ BPSG film deposition and planarization method Download PDF

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Publication number
KR930024119A
KR930024119A KR1019920007416A KR920007416A KR930024119A KR 930024119 A KR930024119 A KR 930024119A KR 1019920007416 A KR1019920007416 A KR 1019920007416A KR 920007416 A KR920007416 A KR 920007416A KR 930024119 A KR930024119 A KR 930024119A
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South Korea
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film
sccm
teos
deposition process
deposition
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KR1019920007416A
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Korean (ko)
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KR950003231B1 (en
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황철주
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황철주
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Priority to KR1019920007416A priority Critical patent/KR950003231B1/en
Priority claimed from KR1019920007416A external-priority patent/KR950003231B1/en
Publication of KR930024119A publication Critical patent/KR930024119A/en
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Publication of KR950003231B1 publication Critical patent/KR950003231B1/en

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Abstract

본 발명은 반도체공정에서 필수적으로 사용되어오는 비피에스지 필름증착 및 평탄화 개선방법에 관한 것으로서, 현재까지는 대부분의 반도체 제조공정에서 상압화학적 증착방법에 의하여 비피에스지 필름을 증착하고 다른 전기로에서 대기압 상태에서 평탄화공정을 실시하여 왔으나 본 발명에서는 이러한 공정을 한 전기로 내에서 인-시튜로 연속적으로 실행함으로써 필름의 특성을 향상시키며 평탄화를 개선시키며 또한 진공상태에서 평탄화를 실행함으로써 필름특성을 개선하여 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for improving the deposition and planarization of a BP film, which is essentially used in a semiconductor process. Up to now, most BPS film is deposited by atmospheric pressure chemical vapor deposition in a semiconductor manufacturing process and planarized under atmospheric pressure in another electric furnace. Although the process has been carried out, in the present invention, the process is performed continuously in-situ in one electric furnace to improve the properties of the film and to improve the flattening, and also to improve the film properties by performing the flattening under vacuum. will be.

Description

인-시튜(IN-SITU) 비피에스지(BPSG) 필름증착 및 평탄화 방법In-situ BPSG film deposition and planarization method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 증착공정 개요도, 제3도 제4도는 본 발명과 같은 증착조건에 따라 공정완료된 비피에스지 필름을 전자현미경으로 확대한 실제사진.Figure 1 is a schematic view of the deposition process of the present invention, Figure 3 Figure 4 is an actual photograph of an enlarged BPS film processed under the same deposition conditions as the present invention by an electron microscope.

Claims (6)

비피에스지 필름증착방에 있어서, 진공상태에서 화합물인 테오스(TEOS)와 산소(O2)를 사용하여 산화막을 증착시키는 공정단계(16)와 진공상태에서 화합물인 테오스(TEOS)와 티엠오비(TMOB)와 포스핀(pH3) 및 산소(O2)를 사용하여 비피에스지 필름을 증착하는 단계(22-25) 및 공정단계(24)에서 증착된 필름을 연속적으로 평탄화하기 위하여 공정단계(30)에서 (36)단계를 연속적으로 산화막과 비피에스지필름과 평탄화 과정을 진행함을 특징으로 하는 인-시튜 비피에스지필름 정착 및 평탄화 방법.In the BPS film deposition chamber, a process step (16) of depositing an oxide film using TEOS (TEOS) and oxygen (O 2 ) as a compound in a vacuum state, and TEOS and TMOBI as a compound in a vacuum state. (TMOB), phosphine (pH 3 ) and oxygen (O 2 ) to deposit a BPS film (22-25) and process step (24) to continuously planarize the film deposited in the process step ( 30) to (36) step of the in-situ BPS film fixing and planarizing method characterized in that the planarization process with the oxide film and the BPS film. 제1항에 있어서, 증착공정(Ⅰ)과 증착공정(Ⅱ)만을 연속적으로 진행함을 특징으로 하는 방법.The method according to claim 1, wherein only the deposition process (I) and the deposition process (II) proceed continuously. 제1항에 있어서, 증착공정(Ⅱ)와 공정단계(33)을 진공상태에서 평탄화를 연속함을 특징으로 하는 방법.Method according to claim 1, characterized in that the deposition process (II) and the process step (33) are planarized under vacuum. 제1항에 있어서, 증착공정(Ⅱ)과 공정단계(33)을 대기압 상태에서 평탄화를 연속함을 특징으로 하는 방법.A process according to claim 1, characterized in that the deposition process (II) and the process step (33) are continued planarization at atmospheric pressure. 제1항에 있어서, 공정단계(33)을 진공상태로 평탄화함을 특징으로 하는 방법.Method according to claim 1, characterized in that the process step (33) is flattened in vacuum. 제1항에 있어서, 상기 증착공정(Ⅰ)의 경우에 전기로 내의 진공도는 0.2-1.5(Torr)이고 온도는 600-700℃의 범위이며 화합물인 테어스(TEOS)는 100-250(SCCM)이고, 산소(O2)는 2-20(SCCM)이며 상기 증착공정(Ⅱ)의 경우에는 진공도가 0.4-1.5(Torr)이고 온도는 550-700℃이며, 화합물인 테오스(TEOS) 200-500(SCCM), 티엠오비(TMOB) 15-45(SCCM), 포스핀은 500-1400(SCCM)이며 증착공정(33) 단계에서는 진공 평탄화의 조건은 전기로 내의 진공도가 0-5(Torr)이고 질소는 0-10(SLM)이며 온도는 800-910℃ 대기압에서의 평탄화 온도는 800-910℃이며 질소는 1-10(SLM) 상태에서 인-시튜(IN-SITUPROCESS) 공정으로 필름을 증착 및 평탄화 하는 방법.The method according to claim 1, wherein in the deposition process (I), the vacuum degree in the electric furnace is 0.2-1.5 (Torr), the temperature is in the range of 600-700 ° C, and the compound TEOS is 100-250 (SCCM). Oxygen (O 2 ) is 2-20 (SCCM), and in the deposition process (II), the vacuum degree is 0.4-1.5 (Torr), the temperature is 550-700 ° C., and the compound (TEOS) 200- 500 (SCCM), TMOB (TMOB) 15-45 (SCCM), Phosphine is 500-1400 (SCCM). In the deposition process 33, the vacuum leveling condition is 0-5 (Torr) in the electric furnace. Nitrogen is 0-10 (SLM), Temperature is 800-910 ℃, Flattening temperature at atmospheric pressure is 800-910 ℃ and Nitrogen is deposited film by IN-SITUPROCESS process in 1-10 (SLM). And how to flatten. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920007416A 1992-05-01 1992-05-01 In situ depositing method of bpsg and plannerizing method thereby KR950003231B1 (en)

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KR1019920007416A KR950003231B1 (en) 1992-05-01 1992-05-01 In situ depositing method of bpsg and plannerizing method thereby

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KR1019920007416A KR950003231B1 (en) 1992-05-01 1992-05-01 In situ depositing method of bpsg and plannerizing method thereby

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KR950003231B1 KR950003231B1 (en) 1995-04-06

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265326B1 (en) * 1993-12-29 2000-09-15 김영환 Deposition mehtod of oxidation film
KR100417645B1 (en) * 1996-12-28 2004-04-13 주식회사 하이닉스반도체 Method for forming interlayer dielectric of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100265326B1 (en) * 1993-12-29 2000-09-15 김영환 Deposition mehtod of oxidation film
KR100417645B1 (en) * 1996-12-28 2004-04-13 주식회사 하이닉스반도체 Method for forming interlayer dielectric of semiconductor device

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