KR930020679A - Semiconductor devices - Google Patents

Semiconductor devices Download PDF

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Publication number
KR930020679A
KR930020679A KR1019930003159A KR930003159A KR930020679A KR 930020679 A KR930020679 A KR 930020679A KR 1019930003159 A KR1019930003159 A KR 1019930003159A KR 930003159 A KR930003159 A KR 930003159A KR 930020679 A KR930020679 A KR 930020679A
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KR
South Korea
Prior art keywords
low concentration
gate
concentration impurity
impurity layer
channel
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KR1019930003159A
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Korean (ko)
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KR0124495B1 (en
Inventor
다다시 마쯔다
Original Assignee
사또 후미오
가부시끼가이샤 도시바
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Publication of KR930020679A publication Critical patent/KR930020679A/en
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Publication of KR0124495B1 publication Critical patent/KR0124495B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
    • H01L29/7832—Field effect transistors with field effect produced by an insulated gate with multiple gate structure the structure comprising a MOS gate and at least one non-MOS gate, e.g. JFET or MESFET gate

Abstract

본 발명은 고 드레인 전압하에서도 노말 오프 상태를 유지하고, 또 저온 저항, 저온 저압, 고hfs고내압, 고속 스위칭 동작을 실현하는 반도체 장치를 제공하는 것을 목적으로 한다.An object of the present invention is to provide a semiconductor device which maintains a normal off state even under a high drain voltage and realizes low temperature resistance, low temperature low voltage, high h fs high breakdown voltage, and high speed switching operation.

본 발명은 +형 실리콘 기판(11) 상에 고정항의형 저농도 불순물층(12)가 형성되고, 그 표면측에 제1채널 영역을 사이에 두고 대항하는 게이트(13a 및 13b)가 형성된다. 상기 제1채널 영역 상에형 저농도 불순물층(14), p채널층(15) 및 +형 소스(16)을 형성한 후, 양측에홈이 형성된다. 상기 홈의 저면에는 각 게이트(13a 및 13b)의 제1게이트 전극(21a 및 21b)가 형성되고, 측벽에는 게이트 산화막(18)을 통해 제2게이트 전극(19a 및 19b)가 형성되는 구조의 전력용 등으로 이용되는 반도체 장치이다.The present invention + Prototype on silicon substrate 11 The type low concentration impurity layer 12 is formed, and gates 13a and 13b facing each other with the first channel region interposed therebetween are formed. On the first channel region Type low concentration impurity layer 14, p-channel layer 15, and After the positive source 16 is formed, Grooves are formed. The first gate electrodes 21a and 21b of the gates 13a and 13b are formed on the bottom of the groove, and the second gate electrodes 19a and 19b are formed on the sidewalls through the gate oxide film 18. A semiconductor device used for, for example,

Description

반도체 장치Semiconductor devices

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도 (a) 및 (b)는 본 발명에 의한 제1실시예의 반도체 장치의 구조를 도시한 단면도이다.1 (a) and (b) are cross-sectional views showing the structure of the semiconductor device of the first embodiment according to the present invention.

제2도 (a) 내지(d)는 제1도에 도시한 제1실시예의 반도체 장치의 제조 공정의 전반부를 도시한 도면이다.2A to 2D are views showing the first half of the manufacturing process of the semiconductor device of the first embodiment shown in FIG.

Claims (1)

제1도전형 반도체 기판(11), 상기 반도체 기판의 한 주요면 상에 형성된 제1도전형의 제1저농도 불순물층(12), 상기 제1저농도 불순물층의 표면에 소정폭의 제1채널 영역(12a)를 사이에 두고 대항하여 형성된 한쌍 이상의 제2도전형의 고농도 불순물로 이루어지는 제1게이트(13a 및 13b) 상기 채널 영역 및 상기 제1게이트 상에형성된 제1도전형의 제2저농도 불순물층(14), 상기 제2저농도 불순물층 상에 형성된 제2더전형의 저농도 불순물층으로 이루어지는 제2채널(15), 상기 제2채널 상에 대항하여 배치되고, 그 중심이 상기 제1게이트의 중심과 동일측 상에 합치하도록 형성된 한쌍 이상의 제1도전형의 고 불순물 농도층으로 이루어지는 소스(16a 및 16b), 상기 제1게이트에 오믹 접촉하고 기판 최상층까지 형성되는 한쌍 이상의 제1게이트 전극(21a, 21b; 21), 상기 제2채널에서 제2저농도 불순물층을 거쳐 제1게이트까지를 사이에 두고 대향해서 형성되는 게이트 산화막(18a 및 18b), 상기 게이트 산화막 상에 형성된 한쌍 이상의 제2게이트 전극(19a 및 19b), 상기 소스 및 제2채널에 오믹 접촉하는 소스 전극(22), 및 상기 반도체 기판의 다른 주요면 상에, 오믹 접촉하도록 형성된 드레인 전극(23)을 구비하는 것을 특징으로 하는 반도체 장치.The first conductive semiconductor substrate 11, the first low concentration impurity layer 12 of the first conductivity type formed on one main surface of the semiconductor substrate, and the first channel region having a predetermined width on the surface of the first low concentration impurity layer. First gates (13a and 13b) made of a pair of high concentration impurities of the second conductivity type formed to face each other with the (12a) therebetween, the second low concentration impurity layer of the first conductivity type formed on the channel region and the first gate. (14), a second channel (15) comprising a second low concentration impurity layer formed on the second low concentration impurity layer, and disposed on the second channel, the center of which is the center of the first gate. Source 16a and 16b each of a pair of high impurity concentration layers of one or more first conductivity types formed to coincide with the same side, and one or more pairs of first gate electrodes 21a which are in ohmic contact with the first gate and formed up to the uppermost layer of the substrate; 21b; 21), the second housing Gate oxide films 18a and 18b formed to face each other across the second low concentration impurity layer from the null to the first gate, at least one pair of second gate electrodes 19a and 19b formed on the gate oxide film, the source and And a drain electrode (23) formed on the other main surface of the semiconductor substrate in ohmic contact with the second channel. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930003159A 1992-03-05 1993-03-04 Semiconductor apparatus KR0124495B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP92-048316 1992-03-05
JP4048316A JP2519369B2 (en) 1992-03-05 1992-03-05 Semiconductor device

Publications (2)

Publication Number Publication Date
KR930020679A true KR930020679A (en) 1993-10-20
KR0124495B1 KR0124495B1 (en) 1997-12-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930003159A KR0124495B1 (en) 1992-03-05 1993-03-04 Semiconductor apparatus

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US (1) US5350934A (en)
JP (1) JP2519369B2 (en)
KR (1) KR0124495B1 (en)

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Also Published As

Publication number Publication date
JPH0690009A (en) 1994-03-29
JP2519369B2 (en) 1996-07-31
KR0124495B1 (en) 1997-12-11
US5350934A (en) 1994-09-27

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