KR930019420A - Printer interface circuit - Google Patents

Printer interface circuit Download PDF

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Publication number
KR930019420A
KR930019420A KR1019920004995A KR920004995A KR930019420A KR 930019420 A KR930019420 A KR 930019420A KR 1019920004995 A KR1019920004995 A KR 1019920004995A KR 920004995 A KR920004995 A KR 920004995A KR 930019420 A KR930019420 A KR 930019420A
Authority
KR
South Korea
Prior art keywords
signal
interface circuit
printer
strobe
clock
Prior art date
Application number
KR1019920004995A
Other languages
Korean (ko)
Other versions
KR970003660B1 (en
Inventor
이성희
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019920004995A priority Critical patent/KR970003660B1/en
Publication of KR930019420A publication Critical patent/KR930019420A/en
Application granted granted Critical
Publication of KR970003660B1 publication Critical patent/KR970003660B1/en

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J25/00—Actions or mechanisms not otherwise provided for

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  • Accessory Devices And Overall Control Thereof (AREA)

Abstract

스트로브 신호에 따라 비지(BUSY)를 발생하고, 상기 스트로브 신호에 따라 인터럽트 신호를 발생한다.Busy is generated according to the strobe signal, and an interrupt signal is generated according to the strobe signal.

상기 출력에 의해 인식신호를 발생하고, 리드 및 리세트 제어신호가 발생시 마다 상기 출력을 제어한다. 그리고 프린팅 데이타를 래치토록 되어 있다.A recognition signal is generated by the output, and the output is controlled every time a read and reset control signal is generated. And the printing data is latched.

Description

프린터의 인터페이스 회로Printer interface circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 회로도.2 is a circuit diagram according to the present invention.

제3도는 제2도의 동작 파형도.3 is an operational waveform diagram of FIG.

Claims (5)

CUP(205)를 구비한 프린터의 인터페이스 회로에 있어서, 스트로브 신호에 따라 상기 CUP(205)의 비지(BUSY)를 발생하는 제1수단과, 상기 스트로브 신호에 따라 인터럽트 신호를 발생하는 제2수단과, 상기 제1수단의 출력에 의해 인식신호를 발생하는 제3수단과, 리드 및 리세트 제어신호가 발생시 마다 상기 제2수단의 출력을 제어하는 제4수단과, 프린팅 데이타를 래치하는 제5수단으로 구성함을 특징으로 하는 프린터의 인터페이스 회로.An interface circuit of a printer having a CUP 205, comprising: first means for generating a busy of the CUP 205 in accordance with a strobe signal, second means for generating an interrupt signal in accordance with the strobe signal; Third means for generating a recognition signal by the output of the first means, fourth means for controlling the output of the second means whenever a read and reset control signal is generated, and fifth means for latching printing data; The interface circuit of the printer, characterized in that consisting of. 제1항에 있어서, 제1수단이 스트로브단(STROBE)의 신호가 프리세팅 신호로 제공되고 리드제어단(RD)의 신호를 클럭으로 하는 디플립플롭(201)으로 구성됨을 특징으로 하는 프린터의 인터페이스 회로.2. The printer according to claim 1, wherein the first means comprises a flip-flop (201) in which a signal of the strobe stage (STROBE) is provided as a preset signal and a signal of the read control stage (RD) is used as a clock. Interface circuit. 제1항에 있어서, 제2수단이 상기 스트로브단(STROBE)의 신호를 클럭으로 사용하기 상기 CUP(205)에 인터럽트를 걸게되는 디플립플롭(202)으로 구성됨을 특징으로 하는 프린터의 인터페이스 회로.A printer interface circuit as claimed in claim 1, characterized in that the second means comprises a deflip-flop (202) which interrupts the CUP (205) to use the signal of the strobe stage as a clock. 제1항에 있어서, 제3수단이 상기 제1수단의 출력단과 연결되어 이의 신호에 따라 클럭단(CLK)의 클럭을 카운트하는 카운터(203)으로 구성됨을 특징으로 하는 프린터의 인터페이스 회로.A printer interface circuit as claimed in claim 1, characterized in that the third means comprises a counter (203) connected to the output of the first means and counting the clock of the clock stage (CLK) according to its signal. 제1항에 있어서, 제4수단이 앤드게이트(208)로 구성됨을 특징으로 하는 프린터의 인터페이스회로.A printer interface circuit as claimed in claim 1, characterized in that the fourth means consists of an end gate (208). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920004995A 1992-03-26 1992-03-26 Interface circuit for a printer KR970003660B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920004995A KR970003660B1 (en) 1992-03-26 1992-03-26 Interface circuit for a printer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920004995A KR970003660B1 (en) 1992-03-26 1992-03-26 Interface circuit for a printer

Publications (2)

Publication Number Publication Date
KR930019420A true KR930019420A (en) 1993-10-18
KR970003660B1 KR970003660B1 (en) 1997-03-20

Family

ID=19330915

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920004995A KR970003660B1 (en) 1992-03-26 1992-03-26 Interface circuit for a printer

Country Status (1)

Country Link
KR (1) KR970003660B1 (en)

Also Published As

Publication number Publication date
KR970003660B1 (en) 1997-03-20

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