KR930011124B1 - Method of manufacturing dram cell having a capacitor - Google Patents

Abstract

The stacked capacitor of a DRAM cell is mfd. by (a) forming a photoresistor mask having a window on the semiconductor substrate, and wet etching a silicon surface to form a groove, (b) removing the mask, and forming a gate oxide film on the whole surface of a wafer, (c) forming a gate polysilicon, an oxide film on the polysilicon, a source/drain and a sidewall spacer, (d) forming a first electrode of the capacitor comprising an electroconductive material, (e) forming an oxide-nitride-oxide (ONO) dielectric film enclosing the first electrode, and (f) forming a second electrode of the capacitor on the outside of the dielectric film.

Description

Capacitor Manufacturing Method of DRAM Cell

1A to 1E are cross-sectional views illustrating a method of manufacturing a capacitor of a DRAM cell of the present invention.

* Explanation of symbols for main parts of the drawings

21 recess 5: the first electrode of the capacitor

7: second electrode of capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a stack capacitor of a DRAM cell, and more particularly, to a method of manufacturing a stack capacitor, in which a capacitor is formed by etching a portion of a gate region to form a recess therein and then forming a capacitor thereon.

Conventionally, a technique of using a trench or variously changing the shape of a stacked capacitor has been commonly used to increase a capacitor capacity of a DRAM cell, but there is no method of increasing a capacitor capacity by forming a trench under a gate.

It is an object of the present invention to provide a method of effectively utilizing the area of the gate and increasing capacitor capacity while simplifying many of the complex processes in the prior art for forming capacitors.

According to the present invention, a photoresist mask having a window narrower than the width of the gate is formed on a portion of the semiconductor substrate to be a gate in the future, and then a groove is formed by etching silicon to a predetermined depth by a wet etch process. After removing the mask, a gate oxide film is formed on the entire surface of the wafer, and a gate polysilicon, an oxide film on the gate polysilicon, a source drain, and a side wall space are formed by a conventional process, and the oxide film on the recessed portion of the gate polysilicon; A first electrode of a capacitor made of a conductive material is formed on the sidewall space and a gate oxide film on the source or drain region, and an ONO (OXIDE-NITRIDE-OXIDE) dielectric film is formed to surround the first electrode of the capacitor. DRAM comprising the steps of forming a second electrode of a capacitor of a conductive material in the Capacitor manufacturing method of a cell.

1 is a cross-sectional view for explaining a capacitor manufacturing process of a DRAM cell of the present invention, and only the characteristic process of the present invention will be described in detail.

FIG. 1A also shows a cross section in which grooves are formed in the gate region.

After the photoresist 15 is applied on the semiconductor substrate 1, a mask is formed by a photo process, and a well etching (wet etching process) is performed to etch a silicon surface to form a recess. The grooves are sized to occupy a somewhat smaller width than the gate area and are etched to the appropriate depth.

Next, as shown in FIG. 1B, after removing the photoresist pattern, a gate oxide film is formed on the entire wafer surface.

Thereafter, as shown in FIG. 1C, the FET is formed by a usual method. In other words, after the gate polysilicon 3 is coated on the gate oxide layer, an insulating layer 41 (CAP HTO) is applied thereon, a gate electrode is formed by a photo process and an etching process, an impurity implant is formed in the source and drain regions, and the sidewall space is formed. 40 is formed. At this time, the gate electrode is arranged on the silicon substrate groove.

Next, as shown in FIG. 1D, the insulating film on the already formed gate electrode has a surface similar to the shape of the groove formed on the silicon substrate, which covers the upper portion of the groove-shaped insulating film and the rest of the gate electrode portion. A first electrode of the capacitor covering one portion and the spacer and the source or drain portion is formed. The first electrode is made of a conductive material and is formed of polysilicon in which impurities are injected.

The first electrode is wrapped with an ONO (OXIDE-NITRIDE-OXIDE) dielectric film (insulating film) to insulate the second electrode of the capacitor. Of course, in this case, a dielectric film is formed using existing semiconductor manufacturing processes such as a photo process and an etching process.

A capacitor second electrode made of a conductive material is formed around the dielectric film thus formed. This second electrode is also made of polysilicon or the like.

As described above, after forming the first electrode, the dielectric film, and the second electrode of the capacitor, the DRAM cell and the semiconductor chip are manufactured by a conventional semiconductor manufacturing process.

According to the method of the present invention, a capacitor having a large capacity can be obtained to the extent that a step of forming grooves in the gate region is added in a semiconductor manufacturing step that is usually performed, which is very effective.

Claims (1)

Forming a groove on the semiconductor substrate by forming a photoresist mask having a window narrower than the width of the gate in a portion to be a gate in the future, and etching the silicon to a predetermined depth by a wet etching process; Removing the photoresist mask and forming a gate oxide film on the entire surface of the wafer; Forming a gate polysilicon, an oxide film on the gate polysilicon, a source drain, and a side wall space in a conventional process; Forming a first electrode of a capacitor made of a conductive material from the recessed portion of the oxide film on the gate polysilicon to the sidewall space and the gate oxide film on the source or drain region; Forming an ONO dielectric film surrounding the first electrode of the capacitor; And forming a second electrode of a capacitor made of a conductive material outside the dielectric film.