KR930010913B1 - Video signal time axis error correcting apparatus of vcr - Google Patents

Abstract

The device comprises a brightness/color separator (1) for separating the brightness and color signals from the complex video signal, a synchronization separator (11) for separating horizontal synchronization, a delaying device (17,18,19) for delaying oscillating output of the oscillator (20). The phase comparator (13) and the clock selector (14) select the output of the oscillator (20) and the delaying device (17,18,19) to apply them to the line memory as write clock.

Description

Time-base Error Correction Device for Video Signals Reproduced in VR

1 is a block diagram of a conventional VCA time-base error correcting apparatus.

2 is a block diagram of a white clock generator using a PLL method in a conventional VLC time-base error correcting apparatus.

3 is a block diagram of the time-base error correcting apparatus of the present invention.

4 is an exemplary view showing an embodiment of a phase comparator and a clock selector in the time-base error correcting apparatus of the present invention.

5A to 5G are respective waveform diagrams of the time-base error correcting apparatus of the present invention.

* Explanation of symbols for main parts of the drawings

1: luminance / color separation unit 2, 3: A / D converter

4, 5: Line memory 6, 7: D / A converter

8: Synchronous Insertion Part 9: Macon Butter

10: synthesizer 11: round separator

12: monostable multivibrator 13: phase comparison unit

14: clock selector 15: light control pulse generator

16: read control pulse generator 17, 18, 19: delay element

20: oscillator 21-24: sampling element

25: sampling part 26: holding part

SW1-SW4: Switch R1-R4: Resistance

C1-C4: Capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to video signal processing of a video signal, and more particularly, to an apparatus for correcting a time signal error of a video signal reproduced from a video signal by correcting a time axis error of a video signal by making a clock having a phase coincident with the horizontal synchronization being reproduced. .

In the conventional time axis error correction apparatus, as shown in FIG. 1, a color / luminance separation unit 1 for separating a reproduced signal into luminance Y and color C, and the luminance Y and color ( A / D converter (2) (3) for converting C) into digital, line memory (4) (5) for storing the converted digital signal as FIFO (First In First Out), and the stored data as analog A D / A converter 6 (7) for converting into a signal, a synchronization inserter 8 for inserting synchronization of an analog signal with respect to the luminance of the D / A converter 6, and the D / A converter 7 A main converter 9 for processing an analog signal for a color of?), A synthesizer 10 for synthesizing and outputting the output of the synchronous insertion section 8, the main converter 9, and the reproduction luminance signal Y A light clock generator for generating a clock locked by a phase locked loop (PLL) to the separated horizontal synchronization signal; 31, the light control pulse generator 15, the lead control pulse generator 16, which controls the input and output of the line memories 4 and 5 by the light clock generator 31, and the lead control pulse. To the synchronization generator 13 to generate synchronization to the synchronization insertion section 8 by the output control of the generation section 16, and to the line memories 4, 5 and D / A converters 6 and 7. It is composed of an oscillator 20 for applying an oscillation signal.

FIG. 2 is a block diagram of a light clock generator 31 using a PLL method in a conventional time-base error correction device. As shown in FIG. 2, a low pass filter after comparing a reproducing horizontal synchronization signal through a phase comparator 101 is shown in FIG. A light clock is output by applying to the voltage controlled oscillator 103 through 102, and the output white clock is divided by the divider 104 and applied to the phase comparator 101. .

The reproduced video signal is separated into the luminance signal (Y) and the color signal (C) through the luminance / color separation unit (1) and input to the A / D converter (2) (3) and separated into the luminance signal (Y). After separating the horizontal synchronous signal through the synchronous separation unit 11 to make a clock through the PLL of the light clock generator 31.

The clock generated in this way is input to the A / D converters 2 and 3, and the analog signal of the video signal reproduced is sampled and converted into a digital signal.

The digital signal converted as described above is stored in the line memories 4 and 5 by the output of the light clock and the light control pulse generator 15.

The signals stored in the memories 4 and 5 are read out by the read color and the read control pulses of the lead control pulse generator 16 which are constantly oscillated by the oscillator 20.

In this way, the time axis error included in the reproduction signal is eliminated in the signal output through the line memories 4 and 5.

At this time, the digital signal output from the line memories (4, 5) is reduced to an analog signal through the D / A converter (6, 7), and by synthesizing the reference synchronization of the synchronization generator 13 with the signal, You can get

However, in the conventional time-base error correction device as described above, the clock is locked and oscillated in the reproduced horizontal synchronization, so the video signal is sampled. Since the reproduced horizontal synchronization continues to change with the synchronization period (NISC 63, 5 μS), It is difficult to accurately oscillate and oscillate, and the error of the oscillation clock appears in the screen state, and thus there is a problem in that it is impossible to correct the time-base error.

An object of the present invention is to solve the above-mentioned problems, and in order to solve the above-mentioned problems, a time-base error of a video signal reproduced from V-Cal to select a clock closest in phase to an input horizontal synchronization is made in advance. The invention is made in detail with reference to the accompanying drawings.

3 is a block diagram of the time-base error correcting apparatus of the present invention, as shown in FIG. 1, as shown in FIG. 1, the luminance / color separation unit 1, the A / D converters 2 and 3, and the line memory 4 as shown in FIG. 5), D / A converters (6), (7), synchronization inserter (8), main converter (9), synthesizer (10), light control pulse generator (15), lead control pulse generator (16) In the VR, the synchronization / separation unit (11) for separating the horizontal synchronization signal from the luminance signal of the luminance / color separation unit (1) and having a width of 25 msec based on the falling edge of the horizontal synchronization A monostable multivibrator 12 for generating a pulse, a phase comparator 13 for determining whether there is a rising edge among the generated pulses, and a clock selector 14 for selecting a light clock for generating the rising edge among the generated pulses. And an oscillator 20 for generating a constant clock, and a delay element 1 for delaying the phase of the clock to 25 msec, 50 msec, 75 msec. 7,18,19).

4 is an exemplary diagram showing an embodiment of a phase comparator and a clock selector in the time-base error correcting apparatus of the present invention. As shown in FIG. 4, the outputs of the oscillator 20 and the delay elements 17, 17, and 19 are clocked. A sampling unit 25 for sampling the output of the monostable multivibrator 12 by driving the sampling elements 21, 22, 23, 24 in the high potential state of the enable signal EN, and the sampling unit 25 The holding unit 26 holding the sampling output of the resistor R1 through R4 and the capacitors C1 through C4 and the output of the holding unit 26 controls the switch SW1 through SW4 to control the oscillation unit (1). 20) and a clock selector 14 for selecting the output of the delay elements 17, 18, and 19 as a clock.

5A to 5G are waveform diagrams of each part of the time-base error correcting apparatus of the present invention. As shown in (a), (a) is an output waveform of the sync separation unit 11, (b) (c) is a monostable multivibrator ( The output waveform of 12) (L-sa) is the output waveform of the oscillation section 20 and the delay elements 17, 18, 19.

Hereinafter, the effect of the present invention configured as described above will be described.

First, as shown in FIG. 3, the latitude and color are separated from the playback video signal through the luminance / color separation unit 1, and then, as shown in FIG. 5A in the luminance signal through the synchronization separation unit 11. The horizontal synchronous signal is separated and a pulse having the same pulse width of 25 msec is generated through the monostable multivibrator 13 on the basis of the falling edge of the separated horizontal synchronous signal.

At this time, the phase comparator 13 outputs the output of the oscillator 20 as shown in FIG. 3d and the delay elements 17, 18, and 19 delayed by 25 msec, 50 msec, and 75 msec as shown in FIGS. 5f and g. Is applied.

Here, the phase comparator 13 and the clock selector 14, as shown in FIG. 4, through the sampling elements 21-24 in the high potential state of the enable signal EN as shown in FIG. 5C. The output of the monostable multivibrator 12 as shown in FIG. 5B is sampled on the basis of the rising edge of the clock as shown in FIG. 5D-G, and the sampled signals are converted into resistors R1-R4. Hold through the capacitors (C1-C4) and hold until the next sampling.

That is, in the horizontal synchronous signal, the outputs of all monostable multivibrators 12 are sampled, and the sampling clock is performed with four clocks of different phases, and only one of the held outputs is sampled at the rising edge to become high potential. .

In this way, one of the switches SW1-SW4 is turned on with the held high potential signal to select one of the clocks as shown in FIG. 5d-g, and then applies the light control pulse generator 15 to the light clock. The maximum error of can be reduced to within 25m seconds.

Here, the clock as shown in FIG. 5E is selected and used as the white clock.

As described in detail above, the present invention selects a clock closest to a phase to an input horizontal synchronization after the oscillation frequencies having different phases are set in advance, thereby directly obtaining a clock corresponding to the changing horizontal synchronization.

Claims (2)

In the VR which is configured to separate the video signal reproduced by the luminance / color separation unit 1 into luminance and color, store it in the line memories 4 and 5 through the A / D converters 2 and 3, and then process it. The separated luminance signal is separated horizontally through the synchronization separating unit 11 and applied to the phase comparator 13 through the monostable multivibrator 12, and the oscillation unit through the delay elements 17, 18 and 19. Delaying the oscillation output of (20), selecting the output of the oscillator 20 and the delay elements (17, 18, 19) through the phase comparator 13, the clock selector 14 to the line memory (4, 5) And a time clock error correction device for a video signal reproduced from a V-C. 2. The phase comparator 13 according to claim 1, wherein the phase comparator 13 clocks the outputs of the oscillator 20 and the delay elements 17, 18, and 19 in the high potential state of the enable signal EN. And a sampling section 25 for sampling the output of the monostable multivibrator 12 by driving 23 and 24, and a holding section 16 for holding the sampling output of the sampling section 25 for sampling. A time base error correction device for a video signal reproduced from a V-C.