KR930007781Y1 - Overflow signal recording preventing circuit - Google Patents

Abstract

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Description

Overflow signal write prevention circuit

1 is a configuration circuit diagram of a write prevention circuit of an overflow signal according to the present invention;

2 is a flowchart for a method of preventing the recording of an overflow signal performed by a microcomputer employed in FIG.

* Explanation of symbols for main parts of the drawings

10: A / D converter 20: signal processor

30: level detector 31: maximum level detector

32: minimum level detector 33: counter

40: micom 50: recording element

60: display device 70: servo unit

The present invention relates to a recording preventing circuit of an overflow signal in a digital recording and reproducing apparatus, and more particularly to a recording preventing circuit which can be displayed on a display device while being switched so that an overprowler signal of a predetermined level or more is not recorded on a recording medium. will be.

When the overflow signal is generated in the digital signal processing of the conventional audio device, the overflow signal can be counted several times and recognized by the parity check. At this time, the data is recorded on the recording medium in the state that the overflow signal is generated, and the error data is reproduced as it is.

SUMMARY OF THE INVENTION In order to overcome the above problems, an object of the present invention is to provide an overflow signal write prevention circuit for controlling an overflow signal of a reference level or more not exceeding a reference level in a digital signal recording and reproducing processing apparatus and displaying it on a display device. have.

In order to achieve the above object, the present invention provides a digital signal recording and reproducing apparatus comprising: converting means for converting an analog signal introduced from a signal input source into a digital signal, and a level of the digital signal output from the converting means; Comparison means for comparing with a level, switching means for switching recording of a signal output from the conversion means on the recording medium, display means for displaying an output signal of the comparison means, and detection in the comparison means. And control means for controlling the switching means in accordance with the received signal, controlling the recording of the output signal of the conversion means, or controlling the display means.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the overflow signal write prevention circuit according to the present invention.

1 is a configuration circuit diagram of an overflow signal write prevention circuit according to the present invention.

1, the input terminal 11 of the A / D converter 10 is coupled to a signal input source (not shown), and the output terminal is a signal processor 20, a maximum level detector 31 and It is connected to the input terminal of the minimum level detector 32.

The first input terminal of the OR gate G1 is connected to the output terminal of the maximum level detector 31, the second input terminal is connected to the output terminal of the minimum level detector 32, and the output terminal is connected to the input terminal of the cowl 33. do.

In this case, the maximum level detector 31, the minimum level detector 32, the oragate G1, and the counter 33 correspond to the level detector 30.

The contact a1 of the control switch SW1 is connected to the output terminal of the signal processor 20 and the contact b1 is connected to the recording element 50.

The data input terminal of the microcomputer 40 is the output terminal of the counter 33, the first control output terminal is the control contact of the control switch SW1, the second control output terminal is the control input terminal of the display device 60, The third control output terminal is connected to the control input terminal of the servo unit 70.

Next, the operation of FIG. 1 will be described with reference to the flowchart of FIG. 2.

According to FIG. 1, when a recording mode key is set by a user through a key input means (not shown) such as a key mounted on a remote control transmitter or a set (steps S1 and S2), the A / D conversion unit In step 10, the sinusoidal analog signal shown in FIG. 3A is introduced from a signal input source (not shown) and converted into a digital signal form (step S3).

The signal processing unit 20 performs error correction and parity addition on the data output from the A / D changing unit 10.

In the maximum level detector 31 and the minimum level detector 32, the maximum value level 7FFF and the absolute minimum value level 8000, as shown in FIG. 3B, are obtained from the data output from the A / D converter 10. FIG. Detect incoming signal and digital level as reference. That is, a "high" signal is output if the maximum level 7FFF or more, otherwise, a "low" signal is output, and a "high" signal is output if the incoming signal is greater than or equal to the absolute minimum value level 8000, otherwise a "low" signal is output.

The OR gate G1 logically sums the signals output from the maximum level detector 31 and the minimum level detector 32 and outputs the result to the counter 33.

The counter 33 counts the "high" logic signal output from the oragate G1 (step S4).

The microcomputer 40 recognizes that an overflow signal has been generated by inputting the output signal of the counter 33, and outputs a control signal to the control switch SW1 when the output of the counter 33 occurs five times or more continuously. The control unit 20 is controlled to prevent the signal processing unit 20 from being output, and outputs a control signal to the display device 60 to display that an overflow signal has been generated (steps S5 to S7).

In addition, the microcomputer 40 performs the stop mode by controlling the servo unit 70.

At this time, the user adjusts the overflow signal to the reference level by using the recording level adjusting terminal while repeatedly reproducing the currently recorded signal with respect to the overflow signal displayed on the display device 60.

As described above, the overflow signal recording prevention circuit according to the present invention detects the level of the incoming signal in the recording mode for recording the digital signal, and when it is above the reference level, it is not recorded on the recording medium by switching the control switch. By displaying the overflow signal by the display means, the level can be easily adjusted with respect to the overflow signal.

In addition, the present invention is applicable to devices such as digital audio tape (DAT), compact disk (DC), long display player (LDP), digital compact cassette (DCC), and the like in an audio device.

Claims (4)

A digital signal recording and reproducing apparatus provided with a recording medium, comprising: converting means for quantizing an analog signal flowing from a signal input source into a digital signal form, and comparing a level of the digital signal output from the converting means with a reference level; Comparison means, switching means for switching the recording of the signal output from the conversion means on the recording medium, display means for displaying the output signal of the comparison means, and the signal according to the signal detected by the comparison means. And control means for controlling the switching means and controlling the display means to display the output signal of the comparison means. 2. The apparatus of claim 1, wherein the comparing means comprises: a first detector for detecting the maximum level of the signal output from the converting means, a second detector for detecting the minimum level of the signal output from the converting means, and the first detector; And a logic element for logically combining the output signal of the first detector and the second detector signal. 3. The overflow signal write preventing circuit according to claim 2, wherein said comparing means further comprises a counter for counting a logic signal of a predetermined level of said logic element in order to respond to impact noise during signal transmission. 4. The overflow signal recording prevention circuit according to claim 3, wherein the control means controls the display means to be displayed on the display means only when the output signal of the counter is a predetermined number or more.