KR930006985A - Manufacturing method of MESFET - Google Patents

Manufacturing method of MESFET Download PDF

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Publication number
KR930006985A
KR930006985A KR1019910016436A KR910016436A KR930006985A KR 930006985 A KR930006985 A KR 930006985A KR 1019910016436 A KR1019910016436 A KR 1019910016436A KR 910016436 A KR910016436 A KR 910016436A KR 930006985 A KR930006985 A KR 930006985A
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KR
South Korea
Prior art keywords
substrate
etched
oxide film
silicon oxide
etching
Prior art date
Application number
KR1019910016436A
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Korean (ko)
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KR950000869B1 (en
Inventor
신진호
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이헌조
주식회사 금성사
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Priority to KR1019910016436A priority Critical patent/KR950000869B1/en
Publication of KR930006985A publication Critical patent/KR930006985A/en
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Publication of KR950000869B1 publication Critical patent/KR950000869B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials

Abstract

본 발명은 1GHZ 이상의 MMIC의 중심소자인 MESFET(Metal Semiconductor Fi-eld Effect Transistor)의 제조방법에 있어서, MESFET가 필요로하는 기본 구성요건을 만족시키면서 이의 제조공정을 간단하게 할 수 있도록한 것으로, 기판상에 질화규소막이 있는 상태에서 선별 식각과정을 통해 첫번째 기판 식각후, 산화규소막을 전면에 증착하고, 이를 반응성 이온 식각번으로 식각법으로 식각하여 이전에 식각된 질화규소막과 기판의 패턴 측면에 측벽을 형성함과 아울러 게이트 금속을 정의하는 PR 패터닝을 실시한 다음 기판 식각 및 게이트 금속을 정의하도록한 것이다.The present invention provides a method for manufacturing a MESFET (Metal Semiconductor Fi-eld Effect Transistor), which is a central element of MMIC of 1 GHZ or more, to simplify the manufacturing process while satisfying the basic configuration requirements of the MESFET. After the first substrate is etched through the selective etching process with the silicon nitride film on the surface, the silicon oxide film is deposited on the front surface, and the silicon oxide film is etched by the etching method using reactive ion etching, and the sidewalls are formed on the pattern side of the previously etched silicon nitride film and the substrate. Formation and PR patterning to define gate metals are performed, followed by substrate etching and gate metals.

Description

MESFET의 제조방법Manufacturing method of MESFET

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도의 (가) 내지 (바)는 본 발명 MESFET의 제조공정도,(A) to (B) of Figure 3 is a manufacturing process diagram of the MESFET of the present invention,

제4도의 (가) 내지 (다)는 본 발명의 다른 실싱시도.(A) to (c) of FIG. 4 is another sealing attempt of the present invention.

Claims (2)

기판상에 질화규소막이 있는 상태에서 선별 식각과정을 통해 첫번재 기판 식각후, 산화규소막을 전면에 증착하고, 상기 산화규소막을 반응성 이온 식각법으로 식각하여 이전에 식각된 질화규소막과 기판의 패턴 측면에 산화규소막 측벽을 형성함과 아울러 게이트 금속을 정의하는 PR 패터닝을 실시한 다음 기판 식각 및 게이트 금속을 정의하는 과정으로 이루어지는 것을 특징으로 하는 MESFET의 제조방법.After the first substrate is etched through the selective etching process with the silicon nitride film on the substrate, the silicon oxide film is deposited on the front surface, and the silicon oxide film is etched by the reactive ion etching method to the previously etched silicon nitride film and the pattern side of the substrate. And forming a silicon oxide film sidewall, performing PR patterning defining a gate metal, and then etching the substrate and defining a gate metal. 제1항에 있어서, 산화규소막 식각은 CHF3가스를 이용하여 식각하는 것을 특징으로 하는 MESFET 제조방법.The method of claim 1, wherein the silicon oxide film is etched using CHF 3 gas. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910016436A 1991-09-19 1991-09-19 Fabricating method of mesfet KR950000869B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910016436A KR950000869B1 (en) 1991-09-19 1991-09-19 Fabricating method of mesfet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910016436A KR950000869B1 (en) 1991-09-19 1991-09-19 Fabricating method of mesfet

Publications (2)

Publication Number Publication Date
KR930006985A true KR930006985A (en) 1993-04-22
KR950000869B1 KR950000869B1 (en) 1995-02-02

Family

ID=19320177

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910016436A KR950000869B1 (en) 1991-09-19 1991-09-19 Fabricating method of mesfet

Country Status (1)

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KR (1) KR950000869B1 (en)

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Publication number Publication date
KR950000869B1 (en) 1995-02-02

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