KR930005770B1 - Printer emulator having korean editing function - Google Patents

Abstract

The emulator module uses the micro processor (MPU) and the interface of 3270 protocol controller of IBM series. The emulator comprises: a 8-bit MPU (1); a program ROM (4) and a memory (5) for operation, which are connected to the 8-bit MPU through the address bus and the data bus; a 3270 protocol control means (2), which is connected to the 8-bit MPU through the address bus and the data bus; a relay means (3), the input terminal being connected to the special line (A14) of the address bus and the protocol control means (2) and the output terminal being connected to the 8-bit MPU. This emulator leads to the cost down and the simplicity of hardware.

Description

Printer Emulator with Hangul Function

1 is a block diagram of a printer emulator module according to the present invention.

* Explanation of symbols for main parts of the drawings

1: 8-bit MPU 2: 3270 Protocol Controller

3: delay circuit 4: program ROM

5: working memory 6: parallel printer controller

7,8: buffer memory 31: inverter

32: resistance 33, 34: D flip-flop

35: NAND gate 36: OR (negative logic) gate

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a printer emulator with Korean characters added, and more particularly, to a printer emulator compatible with the IBM (registered trademark) family.

In the conventional case, an IBM-based personal computer (hereinafter, simply referred to as a 'PC') manufactured a 3270 emulator board using a 82C570 single chip as a 3270 protocol controller. The 82C570 single chip (3270 protocol controller) used in this case was originally designed and designed to fit the bus for the IBM PC XT / AT using a 16-bit microprocessor, and has an address line (A0-A19) 64K byte input and output (hereinafter simply referred to as' I / O ') address line (A0-A15) is prepared, the timing of the control signal is also microprocessor of IBM PC XT / AT (hereinafter, simply' MPU '(for example, 8088, 8086, 80286, etc.). Therefore, it was very advantageous to manufacture 3270 emulator board as an add-on board of IBM PC XT / AT which is a 16-bit machine using the 82C570 chip, but it is not an add-on board. When building a 3270 emulator as a module, a separate MPU (8088 or 8086) and its associated chips (e.g. 8284 clock generator, 8288 bus controller, 8259 interrupt controller, external latch, etc.) are required separately. do. Therefore, there is a problem of excessively increasing the cost of hardware and complicated circuit.

The present invention has been made to eliminate the above problems, and to provide a printer emulator configured to interface with the 3270 protocol controller (82C570) and 8-bit MPU to add a Hangul function for simplicity and cost reduction of hardware. I put it.

The present invention provides an emulator module using an interface of a microprocessor and an IBM (registered trademark) series of 3270 protocol controllers, the program being connected to the 8-bit MPU through an 8-bit MPU, an address bus, and a data bus. Printer and control means connected to the 8-bit MPU via ROM and working memory, the address bus and the data bus, 3270 protocol control means connected to the 8-bit MPU through the address bus and data bus, the specified line of the address bus and the The input terminal is connected to the 3270 protocol control means, and the output terminal is configured as a delay means connected to the 8-bit MPU, and a buffer memory means connected to the 3270 protocol control means by an address bus and a data bus.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a printer emulator module using an 8-bit MPU and 3270 protocol controller of the present invention, where 1 is an 8-bit central processing unit (MPU), 2 is a 3270 protocol controller, 3 is a delay circuit, and 4 is a Program ROM, 5 is a working memory, 6 is a parallel printer controller, 7 and 8 are buffer memories, respectively.

As shown in the figure, the present invention provides an 8-bit MPU 1, a program ROM 4 and a working memory 5 connected to the 8-bit MPU via an address bus and a data bus, and the 8-bit MPU 1; A parallel printer controller 6 connected via an address bus and a data bus, a 3270 protocol controller 2 connected through an address bus and a data bus to the 8-bit MPU 1, and a specific line A14, A15) and an input connected to the 3270 protocol controller 2 and an output connected to a delay circuit 3 connected to the 8-bit MPU 1D, and a buffer connected to the 3270 protocol controller 2 through an address bus and a data bus. Memory (7,8).

In the preferred embodiment of the present invention, the 8-bit MPU 1 uses Z80 of Intel 80 series, which has 64 memory spaces and 256 I / O spaces. Therefore, the configurations of the program ROM 4 and the working RAM memory 5 are made flat as is known.

The parallel printer controller 6 is configured by connecting a parallel printer interface chip to the 8-bit MPU 1 via an address bus and a data bus.

However, the 82C570, which is employed as the MPU 1, processes the 3270 protocol. The input address is located in 20, that is, 1M memory space, and the I / O space is allocated in the 64K space. Thus, the highest nibble address of the 82C570, i.e., A16-A19, is fixed to a specific state (low state), thereby buffering the buffer memory (7,8) of the 82C570 (2) to the 64K address of the 8-bit MPU (1). It is possible to allocate in space.

Since the 82C570 has an I / O space of 64K, it is necessary to expand the 256 I / O space of the MPU 1 to 64K. This was solved by using indirect I / O commands in the software for operation. That is, when performing the indirect I / O command of the Z80 (1), the value of the "C" register is output as an address low byte, and the value of the "B" register is an address high byte. Output to. Thus, 256 I / O space is expanded to 64K I / O. In other words, because the I / O address of the 82C570 (2) is 16 bits (A0-A15 is valid) and the I / O address of Z80 (1) is 8 bits (A0-A7 is valid), the software is indirect. ) Use the I / O instruction to specify the upper address (A8-A15) during I / O access. That is, the "B" value of the "BC" register of the Z80 (1) is output to the addresses A8-A15.

In addition, the single-chip 3270 protocol controller 2 of the 82C570 is connected to the communication and micro code storage buffers 7 and 8 which are additionally necessary through the address bus and the data bus.

In the 3270 emulator module configured to interface the single chip protocol controller 2 of the 82C570 and the Z80 (1) which is an 8-bit MPU, the interrupt is implemented using the level interrupt terminal of the 82C570.

The delay circuit 3 is connected to the specified lines A14 and A15 of the address bus and the 3270 protocol controller 2, and inputs a ready signal from the 3270 protocol controller 2 to the 8-bit MPU. Wait by ) Outputs a signal. Since the delay circuit 3 is a chip originally designed to be compatible with the 16-bit MPU, the delay circuit 3 compensates for the difference in timing generated when the 3270 protocol controller 2 is interfaced to the 8-bit MPU 1.

FIG. 2 is a detailed diagram of one embodiment of a delay circuit of FIG. 1, in which 31 is an inverter, 32 is a power stage resistor, 33 and 34 are D flip-flops, 35 is a NAND gate, and 36 is an OR (negative logic) gate. Respectively.

As shown in the drawing, the delay circuit 3 includes an inverter 31 connected to a specific address line A14, a preset terminal PR connected to the inverter, and a reset terminal RES connected to the power supply resistor 32. A first 1D flip-flop 33 and an input terminal D are connected to a non-inverting output terminal Q of the 1D flip-flop, and a preset terminal PR is connected to the power supply resistor 32 and a specific address is provided. A second D flip-flop 34 having a reset terminal RES connected to a line A15, and an inverted output terminal of the first D flip-flop ( And an NAND gate 35 having an input terminal connected to a non-inverting output terminal Q of the 2D flip-flop, an input terminal connected to an output terminal of the NAND gate and a 3270 protocol controller 2, and a standby signal ( ) Is composed of an OR (negative logic) gate output to the 8-bit MPU 1.

The delay circuit 3 configured as described above is " READY " outputted from the 3270 protocol controller 2 when the MPU 1 wishes to access the communication buffers 7, 8 through the 3270 protocol controller 2. Input signal to adjust the mutual collision MPU 1 and 3270 protocol controller 2 accessing the communication buffers 7 and 8 simultaneously.

At this time, the timing of the " READY " signal is set to " standby " Since the MPU 1 accesses the buffers 7 and 8, the MPU 1 waits for Signal) to insert one cycle of standby cycles so that the MPU 1 recognizes a " READY " signal output from the 3270 protocol controller 2;

The printer emulator of the present invention configured as described above processes and outputs the Hangul code sent from the host computer by software.

The effects of the present invention described above are as follows.

First of all, the implementation of a separate emulator module rather than an add-on board simplifies the structure, greatly reduces the manufacturing cost, and makes it easy to manufacture. It also adds Hangul functions to the simpler printer emulator to increase its utility.

Claims (6)

An emulator module using an interface of a microprocessor (MPU) and an IBM (registered trademark) series of 3270 protocol controllers; An 8-bit MPU 1, a program ROM 4 connected to the 8-bit MPU 1 via an address bus and a data bus and a working memory 5, the 8-bit MPU 1 via the address bus and a data bus A 3270 protocol control means 2 connected to an input terminal and a delay line 3 connected to a specific line A14 of the address bus and the 3270 protocol control means 2 and an output end connected to the 8-bit MPU 1. The printer emulator with the Hangul function, characterized in that configured to include. The printer emulator of claim 1, further comprising parallel printer control means (6) connected to said 8-bit MPU (1) via an address bus and a data bus. The printer emulator according to claim 1, further comprising buffer memory means (7,8) connected to the 3270 protocol control means (2) via an address bus and a data bus. The printer emulator of claim 1, wherein the 8-bit MPU (1) is an Intel 80 series Z80. 5. The printer emulator according to claim 4, wherein the 3270 protocol control means (2) is an 82C570 single chip which fixes the highest nibble address (A16-A19) to a specific state. 6. The delay means (3) according to claim 5, wherein the delay means (3) comprises an inverter (31) connected to a specific address line (A14), a preset terminal (PR) connected to the inverter, and a reset terminal (" A first D flip-flop 33 to which a RES is connected, an input terminal D is connected to a non-inverting output terminal Q of the first D flip-flop, and a preset terminal PR is connected to the power supply resistor 32. And a second D flip-flop 34 having a reset terminal RES connected to a specific address line A15, and an inverted output terminal of the first D flip-flop ( And an NAND gate 35 having an input terminal connected to a non-inverting output terminal Q of the 2D flip-flop, an input terminal connected to an output terminal of the NAND gate and a 3270 protocol control means 2, and a standby signal ( A printer emulator with a Hangul function, characterized in that it consists of an OR (negative logic) gate (36) for outputting the .8) to the 8-bit MPU (1).