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Application filed by 이헌조, 주식회사 금성사filedCritical이헌조
Priority to KR1019910014776ApriorityCriticalpatent/KR930005241A/en
Publication of KR930005241ApublicationCriticalpatent/KR930005241A/en
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명 TFT의 공정단면도.2 is a process cross-sectional view of a TFT of the present invention.
Claims (2)
기판상에 게이트전극(2), 절연막(3), 비정질실리콘막(4), n+a-Si : H막(5), 소오스/드레인 전극(6) 형성후 상기 소오스/드레인 전극(6)을 패터닝하여 채널을 형성하고 P/R(7)을 사용하여 상기 채널 부분을 가린 상태에서 R/R(7) 에싱률과 비정질실리콘막(4)의 에칭률에 따라 O2가스 첨가하여 에싱과 동시에 비정질실리콘막(4)을 에칭함을 특징으로 하는 TFT의 제조방법.The source / drain electrodes 6 are formed after forming a gate electrode 2, an insulating film 3, an amorphous silicon film 4, an n + a-Si: H film 5, and a source / drain electrode 6 on a substrate. Patterning to form a channel and adding O 2 gas according to the etching rate of the R / R (7) and the etching rate of the amorphous silicon film 4 in the state of covering the channel portion using the P / R (7). And at the same time etching the amorphous silicon film (4).제1항에 있어서, 에칭 가스로 CH4가스를 사용함을 특징으로 하는 TFT의 제조방법.The method of manufacturing a TFT according to claim 1, wherein CH 4 gas is used as an etching gas.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.