KR930004368Y1 - Power circit - Google Patents

Power circit Download PDF

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Publication number
KR930004368Y1
KR930004368Y1 KR2019880020936U KR880020936U KR930004368Y1 KR 930004368 Y1 KR930004368 Y1 KR 930004368Y1 KR 2019880020936 U KR2019880020936 U KR 2019880020936U KR 880020936 U KR880020936 U KR 880020936U KR 930004368 Y1 KR930004368 Y1 KR 930004368Y1
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South Korea
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output
transistor
voltage
resistor
pulse
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KR2019880020936U
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Korean (ko)
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KR900013536U (en
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정민형
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삼성전자 주식회사
안시환
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H7/00Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
    • H02H7/10Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
    • H02H7/12Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
    • H02H7/1213Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16533Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
    • G01R19/16538Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • G01R19/16576Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing DC or AC voltage with one threshold
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc-Dc Converters (AREA)

Abstract

내용 없음.No content.

Description

스위칭모드 전원의 단락 보호회로Short-circuit protection circuit of switching mode power supply

제1도는 종래의 회로도.1 is a conventional circuit diagram.

제2도는 본 고안의 회로도.2 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

BD : 브리지다이오드 T1 : 트랜스BD: Bridge Diode T1: Trans

PWM : 펄스폭 변조기 OC : 광결합기PWM: Pulse Width Modulator OC: Optical Coupler

PO1 : 비교기 Vref : 기준전원PO1: Comparator Vref: Reference Power

C1-C3 : 캐패시터 Rs,R1-R10 : 저항C1-C3: Capacitor Rs, R1-R10: Resistance

Q1-Q10 : 트랜지스터Q1-Q10: transistor

본 고안은 스위칭모드 전원회로에 관한 것으로, 특히 스위칭모드 전원의 단락 보호회로에 관한 것이다.The present invention relates to a switching mode power supply circuit, and more particularly to a short circuit protection circuit of the switching mode power supply.

스위칭모드 전원(Swiching Mode Power Supply)은 출력전압의 안정화 기능을 갖고 있는데, 종래에는 제1도와 같은 방법으로 구현하였다.The switching mode power supply has a function of stabilizing an output voltage, and is conventionally implemented in the same manner as in FIG.

상기 제1도의 동작을 살펴보면, 입력 교류전원(AC)은 브리지다이오드(BD11)를 통해 정류되며, 캐패시터(C11)에서 평활된 후 트랜스(T11)에 인가된다. 이때 펄스변조기(Pulse Width Moulator)(PWM)에서 발생하는 펄스출력에 의해 출력트랜스터(Q11)가 제어되는데, 출력트랜지스터(Q11)가 턴온되면 상기 트랜스(T11)에 인가된 전원이 1차 코일에 유기되며, 턴오프시 유기된 전원이 2차 코일로 인가된다. 이때 상기 트랜스(T11)의 2차 코일에 유기된 전원은 다이오드(D11) 및 캐패시터(C12)를 통해 정류되어 부하측으로 인가된다. 상기 부하측으로 인가되는 출력전압(V0)은 저항(R13,R14)의 분압을 거쳐 반전단자로 소정 기준전압(Vref)을 입력하는 배교기(OP11)의 비반전단자로 인가된다. 따라서 비교기(OP11)는 상기 두전압 상태를 비교하여 광결합기(Opto Coupler)(OC11)의 발광다이오드 측으로 하며, 발광상태에 따라 포트트랜지스터가 제어되어 상기 펄스변조기(PWM)으로 출력전압의 상태를 알려준다. 그러므로 펄스변조기(PWM)는 출력전압(V0)이 커지게 되면 상기 트랜스(T11)에 유기되는 전원이 적어지도록 출력트랜지스터(Q11)의 “온”주기를 적게하고, 출력전압(V0)이 작아지게 되면 상기 트랜스(T11)에 유기되는 전원이 커지도록 출력트랜지스터(Q11)의 “온”주기를 적게하고, 출력전압(V0)이 작아지게 되면 상기 트랜스(T11)에 유기되는 전원이 커지도록 출력트랜진스터(Q11)의 “온”주기를 크게할 수 있는 펄스신호를 발생한다.Referring to the operation of FIG. 1, the input AC power source AC is rectified through the bridge diode BD11, smoothed at the capacitor C11, and applied to the transformer T11. At this time, the output transistor Q11 is controlled by a pulse output generated by a pulse width modulator (PWM). When the output transistor Q11 is turned on, the power applied to the transformer T11 is supplied to the primary coil. Induced, the turned off power is applied to the secondary coil. At this time, the power induced in the secondary coil of the transformer T11 is rectified through the diode D11 and the capacitor C12 and applied to the load side. The output voltage V0 applied to the load side is applied to the non-inverting terminal of the cross-connector OP11 which inputs the predetermined reference voltage Vref to the inverting terminal through the divided voltage of the resistors R13 and R14. Accordingly, the comparator OP11 compares the two voltage states to the light emitting diode side of the optocoupler OC11, and the port transistor is controlled according to the light emitting state to inform the pulse modulator PWM of the output voltage. . Therefore, when the output voltage V0 is increased, the pulse modulator PWM reduces the “on” period of the output transistor Q11 so that the power induced by the transformer T11 is reduced, and the output voltage V0 is decreased. When the output transistor Q11 decreases the "on" period so that the power induced in the transformer T11 becomes large, and the output voltage V0 decreases, the power induced in the transformer T11 increases. Generates a pulse signal that can increase the "on" period of the Jinster Q11.

상기와 같은 종래의 스위칭모드 전원회로는 과부하 또는 단락상태 발생시 출력전압(V0)의 하강을 억제하기 위하여 펄스변조기는 출력트랜지스터의 “온”주기를 크게하기 위한 구동펄스를 발생함으로서 출력트랜지스터를 파괴하는 문제점이 있었다.In the conventional switching mode power supply circuit as described above, in order to suppress the fall of the output voltage V0 when an overload or short circuit occurs, the pulse modulator generates a driving pulse to increase the "on" period of the output transistor, thereby destroying the output transistor. There was a problem.

따라서 본 고안의 목적은 스위칭모드 전원에서 스위칭 전류량을 검출하여 한계전류를 초과할시 구동펄스를 중지시킴으로서 출력트랜지스터를 보호할 수 있는 회로를 제공함에 있다.Accordingly, an object of the present invention is to provide a circuit that can protect an output transistor by detecting the amount of switching current in a switching mode power supply and stopping the driving pulse when the limit current is exceeded.

이하 본 고안을 도면을 참조하여 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the drawings.

제2도는 본 고안의 구체회로도로서, 브리지다이오드(BD) 및 캐패시터(C1)로 구성되어 입력 교류전원을 정류하는 제1정류수단과, 상기 제1정류수단의 출력을 소정 스위칭신호에 의해 변압하는 트랜스(T1)와, 다이오드(D3) 및 캐패시터(C3)로 구성되어 상기 변압출력을 정류하여 출력전압을 발생하는 제2정류수단과, 저항(R8-R10), 비교기(OP1), 기준전원(Vref) 및 광결합기(OC1)로 구성되어 상기 출력전압과 기준전압을 비교하여 출력전압의 변동상태를 검출하고 오차 정정을 위한 비교검출 신호를 발생하는 출력안정화 수단과, 저항(R4) 및 펄스변조기(PWM)로 구성되어 상기 비교검출신호에 따라 출력전압을 제어하기 위한 이동펄스를 발생하는 펄스발생수단과, 저항(R1) 및 트랜지스터(Q1)로 구성되어 상기 구동펄스에 의해 상기 스위칭신호를 발생하는 수단과, 상기 트랜지스터(Q1)의 이미터 전류를 검출하기 위한 저항(Rs)와 트랜지스터(Q4-Q10)와 저항(R5-R6)으로 구성되어 소정 기준전류값과 상기 저항(R5)에 의해 검출된 전류량을 비교하여 한계치를 초과할시 출력레벨을 변환하는 비교수단고, 저항(R2), 캐패시터(C2) 및 트랜지스터(Q3)로 구성되어 상기 비교수단의 출력을 일정시간 지연하는 지연수단고, 다이오드(D1), 트랜지스터(Q2) 및 저항(R3)로 구성되어 상기 지연수단 및 펄스발생수단의 구동펄스를 입력하여 상기 지연수단의 출력이 변화할시 상기 트랜지스터(Q1)로 인가되는 구동펄스를 중지시키는 버퍼수단으로 구성된다.FIG. 2 is a specific circuit diagram of the present invention, and includes a bridge diode BD and a capacitor C1, the first rectifying means for rectifying an input AC power, and the output of the first rectifying means for transforming the output of the first rectifying means by a predetermined switching signal. A second rectifying means composed of a transformer T1, a diode D3, and a capacitor C3 for rectifying the transformer output to generate an output voltage, resistors R8-R10, a comparator OP1, a reference power source ( Vref) and an optical coupler (OC1), output stabilization means for comparing the output voltage and the reference voltage to detect a change state of the output voltage and generating a comparison detection signal for error correction, a resistor (R4) and a pulse modulator. A pulse generating means for generating a moving pulse for controlling the output voltage according to the comparison detection signal, and a resistor (R1) and a transistor (Q1) to generate the switching signal by the driving pulse. Means for doing It is composed of a resistor Rs for detecting the emitter current of the jitter Q1, the transistors Q4-Q10, and the resistors R5-R6, and compares a predetermined reference current value with the amount of current detected by the resistor R5. Comparison means for converting the output level when the threshold value is exceeded, and a delay means for delaying the output of the comparison means for a predetermined time by comprising a resistor R2, a capacitor C2, and a transistor Q3, a diode D1, A buffer means comprising a transistor (Q2) and a resistor (R3) to input the driving pulse of the delay means and the pulse generating means to stop the driving pulse applied to the transistor (Q1) when the output of the delay means is changed. It is composed.

상술한 구성에 의거 본 고안을 제2도를 참조하여 상세히 설명한다.Based on the above configuration, the present invention will be described in detail with reference to FIG.

전술한 바와같이 스위칭모드 전원은 펄스변조기(PWM)의 펄스듀티비에 따라 출력트랜지스터(Q1)를 제어하여 출력전압(V0)을 발생하여 부하측으로 공급한다. 이때 출력부하가 증가하면 트랜스(T1) 및 다이오드(D3)의 전압강하에 의해 출력전압(V0)이 감소하게 되며, 이 감소분이 비교기(OP1) 및 광결합기(OC1)에 의해 펄스변조기(PWM)으로 피드백되므로 펄스폭 변조시(PWM)는 출력 트랜지스터(Q1)로 인가되는 구동펄스의 펄스폭을 증가하게 된다. 따라서 출력트랜지스터(Q1)의 이미터단에 접속된 전류검출저항(Rs) 양단간의 전압강하가 증가하며, 이로인해 차동증폭용 트랜지스터(Q7)의 베이스전압인 V2도 증가하게 된다. 한편 차동증폭용 트랜지스터(Q6)의 베이스전압인 V1은 정전류원 트랜지스(Q4,Q8)의 컬렉터 전류인 iC4 및 iC8의 값이 거의 같으므로 하기(1)식과 같이 결정하 수 있다.As described above, the switching mode power source controls the output transistor Q1 according to the pulse duty ratio of the pulse modulator PWM to generate an output voltage V0 and supply it to the load side. At this time, when the output load increases, the output voltage V0 decreases due to the voltage drop of the transformer T1 and the diode D3, and this decrease is performed by the pulse modulator PWM by the comparator OP1 and the optical coupler OC1. In the pulse width modulation PWM, the pulse width of the driving pulse applied to the output transistor Q1 is increased. Accordingly, the voltage drop across the current detection resistor Rs connected to the emitter terminal of the output transistor Q1 increases, thereby increasing the base voltage V2 of the differential amplifying transistor Q7. On the other hand, V1, which is the base voltage of the differential amplification transistor Q6, has almost the same value as the collector currents iC4 and iC8 of the constant current source transistors Q4 and Q8.

그러므로 트랜지스터(Q4-Q8) 및 저항(R5,R6)으로 구성되는 비교 수단의 차동입력전압(Vd)는 하기(2)식으로 결정할 수 있다.Therefore, the differential input voltage Vd of the comparison means composed of the transistors Q4-Q8 and the resistors R5 and R6 can be determined by the following equation (2).

여기서 V2 : 차동증폭용 트랜지스터(Q7)의 베이스전압. V2 : 차동증폭용 트랜지스터(Q6)의 베이스전압. i1 : 출력트랜지스터(Q1)의 이미터전류. Rs : 전류검출용 저항. 따라서 상기 (2)식의 차동 입력전압에서 Vd〉0가 되는 시점에서(즉 V2〉V1), 비교수단의 출력전압인 V3가 “하이”상태가 된다.Where V2 is the base voltage of the differential amplifier transistor Q7. V2 is the base voltage of the differential amplifier transistor Q6. i1: Emitter current of the output transistor Q1. Rs: current detection resistor. Therefore, at the time when Vd> 0 (i.e., V2> V1) in the differential input voltage of the above formula (2), the output voltage V3 of the comparing means becomes "high".

상기 사항을 출력트랜지스터(Q1)의 이미터전i으로 표시하면 하기(3)식과 같다.If the above is indicated by the i before the emitter of the output transistor Q1, the following equation (3) is obtained.

즉 (3)식과 같은 시점에서 비교수단이 출력인 V3는 “하이”가 된다.In other words, at the same time as the expression (3), the output of the comparison means V3 becomes "high".

만일 스위칭보드 전원이 정격출력시에 출력트랜지스터(Q1)에 흐르는 전류를 IO라 하고, 정격전류의 n배에서 과전류를 제어하고자 할때 전류검출용 저항(Rs)는 하기(4)식과 같이 구하면 된다.If the switching board power supply is the output current of the output transistor (Q1) at the rated output as IO, the current detection resistance (Rs) can be obtained as shown in the following formula (4) when the overcurrent is controlled at n times the rated current. .

즉, 상기 (4)식에서 유추하면 출력트랜지스터(Q1)의 이미터 전류가 정격전류의 n배 이상인 과전류일시(i1≥n IO인 경우) 비교수단은 “하이”신호를 출력하게 된다.In other words, inferring from Equation (4), the comparison means outputs a high signal when the emitter current of the output transistor Q1 is at least n times the rated current (i1 ≥ n IO).

이때 상기 V3전압에 의해 트랜지스터(Q3)가 턴오프 되므로, V4전압은 저항(R2) 및 캐패시터(C2)의 시정수(τ=R2C2)에 의해 서서히 증가되며, 증가하는 V4전압이 다이오드(D1)의 순방향전압(VF)보다 커지는 순간 버퍼기능을 수행하는 트랜지스터(Q2)를 차단시키게 된다. 즉 구동버퍼 트랜지스터(Q2)간 차단되면 펄스변조기(PWM)에서 발생하는 구동펄스가 출력트랜지스터(Q1)에 공급되지 못하므로 출력트랜지스터의 전위가 감소되어 발진을 멈추게 된다.At this time, since the transistor Q3 is turned off by the V3 voltage, the V4 voltage is gradually increased by the time constant (τ = R2C2) of the resistor R2 and the capacitor C2, and the increasing V4 voltage is increased by the diode D1. The transistor Q2, which performs the buffer function, is cut off when the forward voltage VF becomes greater than. That is, when the driving buffer transistor Q2 is cut off, the driving pulse generated by the pulse modulator PWM cannot be supplied to the output transistor Q1, and thus the potential of the output transistor is reduced to stop oscillation.

상술한 바와같이 저항(R5,R6) 및 저항(Rs) 값을 적절하게 설정하여 출력트랜지스터(Q1)의 과전류를 제어할 수 있으므로 과부하 및 단락상태에서 회로를 보호할 수 있으며, 저항(R2) 및 캐패시터(C2)로 구성된 지연수단에 의해 순간정전 및 외부 노이즈에 대한 오동작을 방지할 수 있는 이점이 있다.As described above, the overcurrent of the output transistor Q1 can be controlled by appropriately setting the values of the resistors R5, R6 and Rs so that the circuit can be protected from overload and short circuit conditions. Delay means composed of the capacitor (C2) has the advantage that can be prevented from malfunctioning against instantaneous power failure and external noise.

Claims (1)

펄스폭 제어회로에 의해 출력트랜지스터 구동을 제어하여 출력안정화 기능을 갖는 스위칭모드 전원회로에 있어서, 상기 출력트랜지스터의 이미터 전류를 검출하는 저항과, 소정 기준전류값과 상기 저항에 의해 검출된 전류량을 비교하여 한계치를 초과할시에만 출력레벨을 변환하는 비교수단과, 상기 비교수단의 변화출력을 일정시간 지연하는 지연수단과, 상기 지연수단 및 펄스폭 제어회로의 출력을 입력하여 상기 지연수단의 출력이 변화할시 상기 출력트랜지스터로 인가되는 구동펄스의 공급을 중지시키는 버퍼수단으로 구성됨을 특징으로 하는 스위칭모드 전원의 단락 보호회로.A switching mode power supply circuit having an output stabilization function by controlling an output transistor drive by a pulse width control circuit, comprising: a resistor for detecting an emitter current of the output transistor, a predetermined reference current value, and a current amount detected by the resistor; A comparison means for converting the output level only when the threshold value is exceeded by comparison, a delay means for delaying the change output of the comparison means for a predetermined time, an output of the delay means and the pulse width control circuit, and outputting the delay means. And a buffer means for stopping the supply of the driving pulse applied to the output transistor when this change occurs.
KR2019880020936U 1988-12-17 1988-12-17 Power circit KR930004368Y1 (en)

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