KR930001112Y1 - Synchronizing generating circuit for vtr - Google Patents

Synchronizing generating circuit for vtr Download PDF

Info

Publication number
KR930001112Y1
KR930001112Y1 KR2019870020505U KR870020505U KR930001112Y1 KR 930001112 Y1 KR930001112 Y1 KR 930001112Y1 KR 2019870020505 U KR2019870020505 U KR 2019870020505U KR 870020505 U KR870020505 U KR 870020505U KR 930001112 Y1 KR930001112 Y1 KR 930001112Y1
Authority
KR
South Korea
Prior art keywords
vertical
synchronization
forced
vtr
vertical synchronization
Prior art date
Application number
KR2019870020505U
Other languages
Korean (ko)
Other versions
KR890011470U (en
Inventor
박세영
Original Assignee
주식회사 금성사
최근선
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사, 최근선 filed Critical 주식회사 금성사
Priority to KR2019870020505U priority Critical patent/KR930001112Y1/en
Publication of KR890011470U publication Critical patent/KR890011470U/en
Application granted granted Critical
Publication of KR930001112Y1 publication Critical patent/KR930001112Y1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10222Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)

Abstract

내용 없음.No content.

Description

VTR의 강제 동기 발생회로Forced Sync Generation Circuit of VTR

제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

제2도는 제1도의 각 단자점의 출력 파형도.2 is an output waveform diagram of each terminal point of FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 재생영상처리부 2 : 동기분리부1: playback image processing unit 2: synchronization separation unit

3 : 미분회로 4 : MM발생기3: differential circuit 4: MM generator

5 : 전압비교부 6 : 강재수직동기 발생부5: Voltage comparison part 6: Steel vertical synchronization generating part

SP : 스피드 재생단자 out : 출력단자SP: Speed playback terminal out: Output terminal

a,b,c,d 각 단자점 R1: 가변저항a, b, c, d terminal points R 1 : Variable resistor

본 고안은 VTR의 강제 공기 발생장치에 관한 것으로서, 특히 VTR재생시에 테이프의 노이즈 부분에 강재동기시킬수 있도록 하여 테이프의 노이즈 부분에서 화면이 흔들리지 않도록 하므로서, 항상 안전된 화면을 시청 할수 있게한 것에 주안점을 둔 것이다.The present invention relates to a forced air generating device of the VTR. In particular, it is possible to strongly synchronize the noise portion of the tape during VTR playback so that the screen does not shake in the noise portion of the tape, so that a safe screen can always be viewed. I put it.

일반적으로 VTR재생시에 테이프가 나쁜 부근(노이즈가 낀 부분)에서는 화면의 흔들림 현상이 발생하게 되는데, 종래의 강재 동기는 스틴이나 변속모드시에만 강제 동기를 부여 하므로서, 이 스틸이나 변속 모드시에는화면의 떨림을 방지 할수 있으나, 테이프가 나쁜 부분(노이즈가 낀 부근)에서는 화면의 흔들림을 방지할수 없으므로서 시청자에게 불쾌감을 주게되는 등의 문재점을 가지고 있었다.In general, when the tape is bad (noisy areas) during VTR playback, the screen shake occurs. Conventional steel synchronization gives forced synchronization only in the stein or shift mode. It can prevent the shaking, but the bad part of the tape (near noise) can not prevent the shaking of the screen, causing discomfort to viewers.

본 고안은 상기와 같은 종래의 문재점을 해결하고자, VTR재생시에 테이프의 나쁜부분에서 화면이 떨림을 방지하기 위하여 강제동기 시키므로서, 항상 안정된 화면으로 시청할수 있게한 것에 목적을 둔 것으로서, 이를 첨부된 도면에 따라서 설명하면 다음과 같다.The present invention aims to solve the conventional problem as described above, by forcing synchronization to prevent the screen shake in the bad part of the tape during VTR playback, so that it is always possible to watch a stable screen, attached to this Referring to the drawings as follows.

제1도에 나타낸 바와같이 본 고안장치는 VTR과 같은 자기 기록 재생장치의 재생회로에 있어서, 비디오 재생신호를 영상처리하는 재생영상처리부(1)와, 상기 재생영상 신호중 수직동기를 분리하는 동기신호 분리부(2)와, 상기 동기 신호부(2)의 출력은 M, M(Multiple Module)발생기(4)에 입력됨과 동시에 수직동기 신호를 직류레벨로 변환하여 전압비교부(5)에 입력되게 하여 미리 지정한 일정수직동기 주기동안 수직동기가 검파되지 않으면 강제수직동기 발생부(6)의 수직동기를 출력하도록 구성된 것이다.As shown in FIG. 1, the present invention is a reproduction circuit of a magnetic recording / playback apparatus such as a VTR, comprising: a reproduction image processing unit 1 for image processing a video reproduction signal and a synchronization signal for separating vertical synchronization among the reproduction image signals; The separation unit 2 and the output of the synchronization signal unit 2 are input to the M, M (Multiple Module) generator 4 and at the same time convert the vertical synchronization signal to a DC level to be input to the voltage comparator 5 If vertical synchronization is not detected during a predetermined vertical synchronization period, the vertical synchronization of the forced vertical synchronization generating unit 6 is configured.

상기한 강제 수직동기 발생부(6)는 스틸, 변속모드 신호가 입력되거나, 또는 재생시 일정기간동안 수직동기신호가 검파되지 않으면 수직동기 발생을 위한 스위칭 트랜지스터(Q1)가 온되어 강제수직동기를 출력하도록 구성됨을 특징으로 한다.The forced vertical synchronization generator 6 is a forced vertical synchronizer when the steel, shift mode signal is input, or when the vertical synchronization signal is not detected for a predetermined time during regeneration, the switching transistor Q 1 is turned on to generate the vertical synchronization. Characterized in that configured to output.

미설명부호 D1∼D3,는 다이오드, R1은 가변저항, SP는 스피드 재생단자이고,OUT는 출력단자이다. 이와같이 구성된 본 고안의 동작을 제2도를 참조하여 설명한다.Unexplained symbols D 1 to D 3 are diodes, R 1 is a variable resistor, SP is a speed regeneration terminal, and OUT is an output terminal. The operation of the present invention configured as described above will be described with reference to FIG.

즉, 제1도에서와 같이 재생영상 처리부(1)에서 처리되어 출력되는 비데오신호(a)는 제2도의 (a)와 같은 파형으로 출력된다.That is, as shown in FIG. 1, the video signal a processed and output by the playback image processor 1 is output as a waveform as shown in FIG.

이때 재생신호가 '하이'(H)로 인가되면 재생계로 스위치되어 동기신호 분리부(2)에서 수직동기 신호를 분리하게 된다.At this time, when the reproduction signal is applied to the 'high' (H), it is switched to the regeneration system to separate the vertical synchronization signal from the synchronization signal separation unit (2).

상기 동기신호 분리부(2)에서 분리된 수직동기 신호는 제2도의 (b)와 같이 나타나며, 이러한 수직동기 신호는 직류레벨화 되어 전압 비교부(5)에 입력되는데, 상기 동기신호 분리부(2)의 수직동기 신호의 주기마다 동기신호 유무에 따라 직류전압값이 다르게 입력되고 이는 전압 비교부(5)내의 도시생략된 기준전압 발생부와 비교하여 수직동기 유무를 검출하게 된다.The vertical synchronizing signal separated by the synchronizing signal separating unit 2 is shown as (b) of FIG. 2, and the vertical synchronizing signal is DC-leveled and input to the voltage comparator 5. The DC voltage value is input differently according to the presence or absence of the synchronization signal for each period of the vertical synchronization signal of 2), which detects the presence or absence of the vertical synchronization in comparison with the reference voltage generator shown in the voltage comparator 5.

즉, 전압비교부(5)에 입력되는 수직동기를 직류화한 전압과 기준전압이 같으면 동기신호가 있음을 검출하고, 같지 않으면 동기신호가 없음을 검출하게 된다.That is, if the voltage obtained by direct-verting the vertical synchronization inputted to the voltage comparator 5 is the same as the reference voltage, it is detected that there is a synchronous signal.

한편, 동기신호 분리부(2)에서 분리된 수직동기 신호는 미분회로(3)에 입력되어 미분동작으로 제2도의 (C)와 같은 파형으로 출력되며, 이것은 M, M발생기(4)에서는 R, C회로를 통해 제2도의 (d)와 같은 구형파로 만들게 되는데, 이때 M, M발생기(4)에서 생성된 구형파는 가변저항(R1)의 조정에 의해 주기값을 조정하며, 전압비교부(5)의 출력값을 일정수직동기 주기동안 체크하여 스위칭 트랜지스터(Q1)를 구동시키도록 하므로서 강제수직동기 발생부(6)에서는 강제 수직동기 신호가 출력(OUT)된다.On the other hand, the vertical synchronizing signal separated by the synchronizing signal separating unit 2 is inputted to the differential circuit 3 and outputted in a waveform as shown in FIG. 2C by differential operation, which is R in the M and M generator 4. delivery, over the C circuit there is tailored to the square wave such as a second-degree (d), wherein M, the square wave generated by the M generator 4 is adjusting the frequency value by adjusting the variable resistor (R 1), and voltage ratio ( The forced vertical synchronous generator 6 outputs the forced vertical synchronous signal OUT by checking the output value of 5) for a predetermined number of vertical synchronous periods to drive the switching transistor Q 1 .

이상에서 설명한 바와같이 본 고안은 VTR재생시 테이프 상태가 나쁜 부분(노이즈가 낀 부근)에서 흔들림 현상을 방지하고자 강제동기 시키므로서 항상 화면의 흔들림이 없는 안정된 상태의 화면을 시청할수 있는 효과를 제공한다.As described above, the present invention provides an effect of always watching a stable state without shaking the screen by forcibly synchronizing to prevent a shaking phenomenon in a bad tape state (near noise) during VTR playback. .

Claims (2)

VTR과 같은 자기기록 재생장치의 재생회로에 있어서, 비데오 재생신호를 영상처리하는 재생영상 처리부(1)와 상기 재생영상 신호중 수직동기를 분리하는 동기신호 분리부(2)와 상기 동기신호부의 출력은 M, M발생기(4)에 입력됨과 동시에 수직동기신호를 직류레벨로 변환하여 전압비교부(5)에 입력되게 하여 미리 지정한 일정수직동기 주기동안 수직동기가 검파되지 않으면 강제 수직동기 발생부(6)의 수직동기를 출력하는 VTR의 강제 동기 발생장치.In a reproducing circuit of a magnetic recording / reproducing apparatus such as a VTR, a reproducing image processing unit (1) for image processing a video reproducing signal, a synchronizing signal separating unit (2) for separating vertical synchronization among the reproducing image signals, and an output of the synchronizing signal portion Forced vertical synchronous generator 6 when the vertical synchronous signal is inputted to the M and M generator 4 and converted to a DC level to be input to the voltage comparator 5 so that vertical synchronous is not detected for a predetermined number of vertical synchronous cycles. Forced synchronization generating device for VTR that outputs vertical synchronization. 제1항에 있어서, 강제 수직동기 발생부는 스틸 변속 모드신호가 입력되거나 재생시 일정기간동안 수직동기가 검파되지 않으면 수직동기 발생을 위한 스위칭 트랜지스터(Q1)가 온되어 강제 수직동기를 출력하는 VTR의 강제 동기 발생장치.The VTR of claim 1, wherein the forced vertical synchronization generating unit outputs a forced vertical synchronization by turning on the switching transistor Q 1 for generating vertical synchronization when the steel shift mode signal is input or the vertical synchronization is not detected for a predetermined time during reproduction. Forced synchronization generator.
KR2019870020505U 1987-11-25 1987-11-25 Synchronizing generating circuit for vtr KR930001112Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019870020505U KR930001112Y1 (en) 1987-11-25 1987-11-25 Synchronizing generating circuit for vtr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019870020505U KR930001112Y1 (en) 1987-11-25 1987-11-25 Synchronizing generating circuit for vtr

Publications (2)

Publication Number Publication Date
KR890011470U KR890011470U (en) 1989-07-13
KR930001112Y1 true KR930001112Y1 (en) 1993-03-11

Family

ID=19269754

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019870020505U KR930001112Y1 (en) 1987-11-25 1987-11-25 Synchronizing generating circuit for vtr

Country Status (1)

Country Link
KR (1) KR930001112Y1 (en)

Also Published As

Publication number Publication date
KR890011470U (en) 1989-07-13

Similar Documents

Publication Publication Date Title
JPH04271685A (en) Synchronous signal restoring circuit
US4409626A (en) Video disc player having vertical timing signal generator
KR930001112Y1 (en) Synchronizing generating circuit for vtr
US5923377A (en) Jitter reducing circuit
KR930005339B1 (en) Error correcting circuit for double azimus vtr when a change of speed
KR940011875B1 (en) Horizontal synchronizing signal separation circuit
KR950011010B1 (en) Screen trembling prevention apparatus for video casette recoder
JP3038867B2 (en) TV receiver
KR0132984B1 (en) High-speed mode switching apparatus for cdg player system
KR960014400B1 (en) Cdg player
KR930003724Y1 (en) V-corresponding signal rocking stabilizing circuit for vcr
JP2783609B2 (en) Image signal processing device
JP2570383B2 (en) Digital signal insertion device
KR910000648B1 (en) Stopping circuit of video display and sound in case of reproducing end for digital vtr
JP3058315U (en) Pseudo sync signal insertion device
KR900005065B1 (en) Video signal improvement system of video tape recoder
JPS62239684A (en) Magnetic recording and reproducing device
KR960006531B1 (en) Character display apparatus of image signal treating system
JP3067199B2 (en) VTR
KR940006721Y1 (en) Circuit for compensating control signal
JPH11103440A (en) Circuit for preventing vtr recording
JPS59167801A (en) Device for recording or recording and reproducing video signal
JPS59117381A (en) Magnetic recording and reproducing device
JPH1175085A (en) Digital synchronizing separator device
JPH0158571B2 (en)

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20020302

Year of fee payment: 10

EXPY Expiration of term