KR920017235A - Metal wiring manufacturing method - Google Patents

Metal wiring manufacturing method Download PDF

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Publication number
KR920017235A
KR920017235A KR1019910002555A KR910002555A KR920017235A KR 920017235 A KR920017235 A KR 920017235A KR 1019910002555 A KR1019910002555 A KR 1019910002555A KR 910002555 A KR910002555 A KR 910002555A KR 920017235 A KR920017235 A KR 920017235A
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KR
South Korea
Prior art keywords
metal wiring
layer
silicon substrate
insulating layer
metal
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Application number
KR1019910002555A
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Korean (ko)
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KR930010105B1 (en
Inventor
김헌도
조경수
김상영
김정태
양근모
Original Assignee
정몽헌
현대전자산업 주식회사
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Priority to KR1019910002555A priority Critical patent/KR930010105B1/en
Publication of KR920017235A publication Critical patent/KR920017235A/en
Application granted granted Critical
Publication of KR930010105B1 publication Critical patent/KR930010105B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음No content

Description

금속배선 제조방법Metal wiring manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2A 내지 2D도는 본 발명에 의해 콘택홀 형성후 성장된 산화막을 스퍼터 시스템(sputter system)에서 스퍼터애칭, 배리어 금속층 증착, 어닐링 및 금속층 증착을 실시하는 공정단계를 나타낸 단면도.2A through 2D are cross-sectional views illustrating process steps of sputter etching, barrier metal layer deposition, annealing, and metal layer deposition of an oxide film grown after contact hole formation in a sputter system.

Claims (2)

실리콘 기판 상부에 절연층을 형성하고 이 절연층의 소정부분에 콘택홀을 형성한 다음, 금속배선을 하부의 실리콘 기판에 접속하는 금속배선 제조방법에 있어서, 실리콘 기판 상부에 절연층을 형성하고 이 절연층의 소정부분에 콘택홀을 형성한 다음, 노출된 실리콘 기판 상부에 성장되는 산화막층을 스퍼터시스템(sputter system)에서 스퍼터 에칭을 이용하여 제거한 다음 대기중에 노출됨이 없이 고진공하의 전달모듈을 통해 또다른 챔버로 이동되어 금속배선을 형성하는 것을 특징으로 하는 금속배선 제조방법.A method of manufacturing a metal wiring in which an insulating layer is formed on a silicon substrate and a contact hole is formed in a predetermined portion of the insulating layer, and then the metal wiring is connected to the lower silicon substrate. A contact hole is formed in a predetermined portion of the insulating layer, and then an oxide layer grown on the exposed silicon substrate is removed by sputter etching in a sputter system, and then, through a high vacuum transfer module without being exposed to the atmosphere. Moving to another chamber to form a metal wiring, characterized in that the metal wiring. 제1항에 있어서, 상기 금속배선은 배리어 금속층을 증착한 다음 금속배선층을 어닐링한 후 금속층을 형성하는 것을 포함하는 것을 특징으로 하는 금속배선 제조방법.The method of claim 1, wherein the metal wiring comprises depositing a barrier metal layer and then annealing the metal wiring layer to form a metal layer. ※참고사항:최초출원 내용에 의하여 공개되는 것임※ Note: The information will be disclosed based on the initial application.
KR1019910002555A 1991-02-18 1991-02-18 Making method of metal wire KR930010105B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910002555A KR930010105B1 (en) 1991-02-18 1991-02-18 Making method of metal wire

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910002555A KR930010105B1 (en) 1991-02-18 1991-02-18 Making method of metal wire

Publications (2)

Publication Number Publication Date
KR920017235A true KR920017235A (en) 1992-09-26
KR930010105B1 KR930010105B1 (en) 1993-10-14

Family

ID=19311176

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910002555A KR930010105B1 (en) 1991-02-18 1991-02-18 Making method of metal wire

Country Status (1)

Country Link
KR (1) KR930010105B1 (en)

Also Published As

Publication number Publication date
KR930010105B1 (en) 1993-10-14

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