KR920013766A - MOSFET manufacturing method - Google Patents

MOSFET manufacturing method Download PDF

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Publication number
KR920013766A
KR920013766A KR1019900020765A KR900020765A KR920013766A KR 920013766 A KR920013766 A KR 920013766A KR 1019900020765 A KR1019900020765 A KR 1019900020765A KR 900020765 A KR900020765 A KR 900020765A KR 920013766 A KR920013766 A KR 920013766A
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KR
South Korea
Prior art keywords
forming
impurity
concentration
conductivity type
region
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KR1019900020765A
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Korean (ko)
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권기조
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문정환
금성일렉트론 주식회사
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Priority to KR1019900020765A priority Critical patent/KR920013766A/en
Publication of KR920013766A publication Critical patent/KR920013766A/en

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  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음No content

Description

MOSFET의 제조방법MOSFET manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도 (a)~(f)는 본 발명의 1실시예에 따른 MOSFET의 제조 공정도이다2 (a) to 2 (f) are manufacturing process diagrams of a MOSFET according to an embodiment of the present invention.

Claims (3)

제1도전형의 기판상에 드레인 형성영역의 양측에 제2도전형의 저농도 불순물을 확산시켜 고저항층을 형성하는 공정과, 상기 고저항층 및 소자격리영역상에 필드 산화막을 형성하는 공정과, 노출된 제1도전형의 기판상에 게이트 산화막을 형성한후 선택부분에 게이트 전극을 형성하는 공정과, 소오스 형성영역에 제1도전형의 고농도 불순물을 주입하여 불순물영역을 형성하는 공정과, 제2도전형의 고농도 불순물의 주입으로 소오스 및 드레인 영역을 형성하는 공정과, 그위에 절연막 및 배선층을 형성하는 공정으로 이루어진 MOSFET의 제조방법Forming a high resistance layer by diffusing low concentration impurities of the second conductivity type on both sides of the drain formation region on the first conductivity type substrate, and forming a field oxide film on the high resistance layer and the device isolation region; Forming a gate oxide film on the exposed first conductive substrate and forming a gate electrode at a selected portion, and implanting a high concentration of impurities of the first conductive type into the source formation region to form an impurity region; A method of manufacturing a MOSFET comprising a process of forming a source and a drain region by implanting a high concentration impurity of a second conductivity type, and a process of forming an insulating film and a wiring layer thereon. 제1항에 있어서, 상기 고저항층을 형성하기 위한 제2도전형의 저농도 불순물을 P-형으로 할때 불순물농도는 8×1016-3,2×1017-3,접합깊이는 0.9㎛로 하는 것을 특징으로 하는 MOSFET의 제조방법.The impurity concentration of claim 1, wherein the impurity concentration is 8 × 10 16 cm -3 , 2 × 10 17 cm -3 , and the depth of contact when the low concentration impurity of the second conductivity type for forming the high resistance layer is P −. MOSFET manufacturing method characterized by the above-mentioned. 제1항에 있어서 , 상기 불순물영역을 형성하기 위한 제1도전형의 고농도 불순물을 n+형으로 할때 불순물 농도는 9×1017-3~2×1018-3로 하는 것을 특징으로 하는 MOSFET의 제조방법.The impurity concentration according to claim 1, wherein the impurity concentration is 9 × 10 17 cm -3 to 2 × 10 18 cm -3 when the high conductivity impurity of the first conductivity type for forming the impurity region is n + . MOSFET manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900020765A 1990-12-17 1990-12-17 MOSFET manufacturing method KR920013766A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900020765A KR920013766A (en) 1990-12-17 1990-12-17 MOSFET manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900020765A KR920013766A (en) 1990-12-17 1990-12-17 MOSFET manufacturing method

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KR920013766A true KR920013766A (en) 1992-07-29

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KR1019900020765A KR920013766A (en) 1990-12-17 1990-12-17 MOSFET manufacturing method

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KR (1) KR920013766A (en)

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