KR920013177A - 연산장치 - Google Patents

연산장치 Download PDF

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KR920013177A
KR920013177A KR1019910022227A KR910022227A KR920013177A KR 920013177 A KR920013177 A KR 920013177A KR 1019910022227 A KR1019910022227 A KR 1019910022227A KR 910022227 A KR910022227 A KR 910022227A KR 920013177 A KR920013177 A KR 920013177A
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KR100233555B1 (ko
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미쯔하루 오오끼
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오오가 노리오
소니 가부시끼가이샤
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00Image coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/14Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/147Discrete orthonormal transforms, e.g. discrete cosine transform, discrete sine transform, and variations therefrom, e.g. modified discrete cosine transform, integer transforms approximating the discrete cosine transform

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Abstract

내용 없음

Description

연산장치
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일실시예의 2차원 8X8 DCT 연산회로의 구성을 나타낸 블럭도, 제2도는 상기 DCT 연산회로에 있어서 〈v〉계산블럭의 일예를 나타낸 구성도, 제3도는 상기 DCT 연산회로에 있어서 〈w〉계산블럭의 일예를 나타낸 구성도, 제5도는 n입력에서 1출력의 가감산회로의 일예를 나타낸 구성도.

Claims (2)

  1. 실공간상의 N행 XN렬(N은 2인상의 정수)의 화상데이타로 부터 주파수 공간상의 N행 XN렬의 데이타를 구하는 이산코사인 변환의 연산을 행하는 연산장치에 있어서, 미리 상기 실공간상의 N행 XN렬의 화상 데이타를 소정의 순서로 일렬로 배열하여 요소의 수가 N2개의 실공간상의 벡터를 형성하여 두고, 상기 실공간상의 벡터에서 제1의 벡터를 계산하는 제1의 벡터 연산회로와, 상기 실공간상의 벡터에서 제2의 벡터를 계산하는 제2의 벡터연산회로와, 상기 제1의 벡터의 요소와 상기 제2의 벡터요소를 가감산하므로서 요소의 수가 N2개의 주파수 공간상의 벡터를 구하는 가감산회로를 구비하고, 상기 주파수 공간상의 벡터의 요소를 재배열하여 상기 주파수 공간상의 N행 XN렬의 데이타를 구하도록 함을 특징으로 하는 연산장치.
  2. 주파수공간상의 N행 XN렬(N은 2이상의 정수)의 데이타로 부터 실공간상의 N행 XN렬의 화상데이타를 구하는 역이산 코사인 변환의 연사능 행하는 연산장치에 있어서, 미리 상기 주파수공간상의 N행 XN렬의 데이타를 소정의 순서로 일렬로 배열하여 요소의 수가 N2개의 주파수 공간상의 벡터를 형성하여 두고 상기 주파수 공간상의 벡터의 요소를 가감산하므로서 제1의 벡터의 요소 및 제2의 벡터의 요소를 구하는 제1의 벡터연한회로와, 상기 제1의 벡터로 부터 제3의 벡터를 계산하는 제2의 벡터 연산회로와, 상기 제2의 벡터로 부터 제4의 벡터를 계산하는 제3의 벡터연산회로와, 상기 제3의 벡터의 용소와 상기 제4의 벡터의 요소를 계산하므로서 요소의 수가 N2개의 실공간상의 벡터를 구하는 가산회로를 구비하고, 상기 실공간상의 벡터의 요소를 재배열하여 상기 실공간상의 N행 XN렬의 화상데이타를 구하도록 함을 특징으로 하는 연산장치.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910022227A 1990-12-28 1991-12-05 연산장치 Expired - Fee Related KR100233555B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP90-417119 1990-12-28
JP90417119A JPH04242860A (ja) 1990-12-28 1990-12-28 演算装置

Publications (2)

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KR920013177A true KR920013177A (ko) 1992-07-28
KR100233555B1 KR100233555B1 (ko) 1999-12-01

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KR1019910022227A Expired - Fee Related KR100233555B1 (ko) 1990-12-28 1991-12-05 연산장치

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US (1) US5276784A (ko)
JP (1) JPH04242860A (ko)
KR (1) KR100233555B1 (ko)

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GB9405914D0 (en) * 1994-03-24 1994-05-11 Discovision Ass Video decompression
EP0576749B1 (en) 1992-06-30 1999-06-02 Discovision Associates Data pipeline system
SG45281A1 (en) * 1992-06-26 1998-01-16 Discovision Ass Method and arrangement for transformation of signals from a frequency to a time domain
US5821885A (en) 1994-07-29 1998-10-13 Discovision Associates Video decompression
US5809270A (en) 1992-06-30 1998-09-15 Discovision Associates Inverse quantizer
US6067417A (en) 1992-06-30 2000-05-23 Discovision Associates Picture start token
US6047112A (en) 1992-06-30 2000-04-04 Discovision Associates Technique for initiating processing of a data stream of encoded video information
US7095783B1 (en) 1992-06-30 2006-08-22 Discovision Associates Multistandard video decoder and decompression system for processing encoded bit streams including start codes and methods relating thereto
US6079009A (en) 1992-06-30 2000-06-20 Discovision Associates Coding standard token in a system compromising a plurality of pipeline stages
US6435737B1 (en) 1992-06-30 2002-08-20 Discovision Associates Data pipeline system and data encoding method
US5768561A (en) 1992-06-30 1998-06-16 Discovision Associates Tokens-based adaptive video processing arrangement
US5603012A (en) * 1992-06-30 1997-02-11 Discovision Associates Start code detector
US6330665B1 (en) 1992-06-30 2001-12-11 Discovision Associates Video parser
US6112017A (en) 1992-06-30 2000-08-29 Discovision Associates Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus
JP2725544B2 (ja) * 1992-11-12 1998-03-11 日本電気株式会社 Dct及び逆dct演算装置並びにその演算方法
JPH06266747A (ja) * 1993-03-12 1994-09-22 Sharp Corp Dct/逆dct演算装置
US5861894A (en) 1993-06-24 1999-01-19 Discovision Associates Buffer manager
US5699544A (en) * 1993-06-24 1997-12-16 Discovision Associates Method and apparatus for using a fixed width word for addressing variable width data
US5805914A (en) 1993-06-24 1998-09-08 Discovision Associates Data pipeline system and data encoding method
JP3697717B2 (ja) * 1993-09-24 2005-09-21 ソニー株式会社 2次元離散コサイン変換装置および2次元逆離散コサイン変換装置
CA2145365C (en) 1994-03-24 1999-04-27 Anthony M. Jones Method for accessing banks of dram
CA2145361C (en) 1994-03-24 1999-09-07 Martin William Sotheran Buffer manager
CA2145379C (en) 1994-03-24 1999-06-08 William P. Robbins Method and apparatus for addressing memory
GB9417138D0 (en) * 1994-08-23 1994-10-12 Discovision Ass Data rate conversion
US5761328A (en) * 1995-05-22 1998-06-02 Solberg Creations, Inc. Computer automated system and method for converting source-documents bearing alphanumeric text relating to survey measurements
GB2303012B (en) * 1995-07-01 1999-11-03 Motorola Inc Image processing circuit and method
US6141761A (en) * 1996-11-05 2000-10-31 Samsung Electronics Co., Ltd. Low power consuming operating device for digital signal processing using a probability distribution of input digital signals and predetermined output signals
US8069201B2 (en) * 2003-11-25 2011-11-29 Texas Instruments Incorporated 8×8 transform and quantization

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US4449194A (en) * 1981-09-25 1984-05-15 Motorola Inc. Multiple point, discrete cosine processor
US4481605A (en) * 1982-03-05 1984-11-06 Sperry Corporation Display vector generator utilizing sine/cosine accumulation
US4791598A (en) * 1987-03-24 1988-12-13 Bell Communications Research, Inc. Two-dimensional discrete cosine transform processor

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Publication number Publication date
JPH04242860A (ja) 1992-08-31
US5276784A (en) 1994-01-04
KR100233555B1 (ko) 1999-12-01

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