KR920013114A - Fault Diagnosis Device in Multiprocessor System - Google Patents

Fault Diagnosis Device in Multiprocessor System Download PDF

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Publication number
KR920013114A
KR920013114A KR1019900021849A KR900021849A KR920013114A KR 920013114 A KR920013114 A KR 920013114A KR 1019900021849 A KR1019900021849 A KR 1019900021849A KR 900021849 A KR900021849 A KR 900021849A KR 920013114 A KR920013114 A KR 920013114A
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KR
South Korea
Prior art keywords
diagnostic
unit
fault diagnosis
information
board
Prior art date
Application number
KR1019900021849A
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Korean (ko)
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KR930002856B1 (en
Inventor
오세웅
허현규
윤용호
박진원
Original Assignee
경상현
재단법인 한국전자통신연구소
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Priority to KR1019900021849A priority Critical patent/KR930002856B1/en
Publication of KR920013114A publication Critical patent/KR920013114A/en
Application granted granted Critical
Publication of KR930002856B1 publication Critical patent/KR930002856B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

내용 없음No content

Description

다중처리기 시스템에서의 고장진단장치Fault Diagnosis Device in Multiprocessor System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 구성을 나타낸 블럭도, 제3조는 본 발명의 시스템진단 감시기 및 국부진단 감시기의 구성을 나타낸 블럭도, 제4도는 본 발명 시스템 감시기의 사용자 접합부의 동작을 나타낸 플로우챠트.Figure 2 is a block diagram showing the configuration of the present invention, Article 3 is a block diagram showing the configuration of the system diagnostic monitor and the local diagnostic monitor of the present invention, Figure 4 is a flow chart showing the operation of the user junction of the system monitor of the present invention.

Claims (1)

콘솔(21)의 키보드(21a)로 부터 직렬포트(22)를 통해 사용자의 명령어를 전달받아 2진코드로 변환하여 명령큐에 저장하는 사용자 접합부(23)과, 상기 사용자접합부(23)로 부터의 명령큐를 입력받아 자체의 진단 또는 다른 보드의 진단인가를 따라 필요한 정보를 고장진단부(25) 또는 진단메시지처리부(26)로 전단하면서 이들로부터의 정보를 상기 사용자접합부(23)로 전하는 실행부(24)와 상기 실행부(24)로 부터 메모리어드레스와 진단정보 입력받아 자체의 고장진단을 수행하는 고장진단부(25)와 상기 실행부(24)로부터 메모리 어드레스, 진단정보 및 메시지를 전달받아 버스(18)를 통하여 해당되는 보드의 국부진단 감시기(15)(15a)로 전하거나 진단결과를 실행부(24)로 전하는 진단메시지 처리부(26)들로 이루어진 시스템진단 감시기(12)를 시스템제어보드(11)에 위치시키고, 상기 시스템 진단감시기(12)와 버스(16)를 통하여 연결되어 인터럽트가 발생되면 공유메모리(17)의 지정된 저장장소에서 메모리어드레스 및 진단정보를 읽어들여 실행부(32)로 전하거나 전달되는 지난결과를 버스(16)로 구동하는 진단 메시지 처리부(31)와, 상기 진단 메시지처리부(31)하고, 고장 진단부(33)사이에서 정보를 전달하는 실행부(32)와, 상기 실행부(32)로 부터의 메모리 어드레스 및 진단정보에 의해 고정진단을 수행한후 그 결과를 실행부(32)로 전하는 고장진단부(33)들로 이루어진 국부진단감시기(17)(17a)를 중앙처리장치보드(13)와 입출력처리보드(14)에 각각 위치시켜 빠르고 정확한 고장진단을 수행함을 특징으로 하는 다중처리기 시스템에서의 고장진단장치.The user junction 23 receives the user's command from the keyboard 21a of the console 21 through the serial port 22, converts the binary code into a command queue, and stores the command in the command queue. Execution of transferring the information from these to the user junction unit 23 while receiving necessary command queues and shearing necessary information to the fault diagnosis unit 25 or the diagnostic message processing unit 26 according to the diagnosis of the own board or another board. Receives a memory address and diagnostic information from the unit 24 and the execution unit 24, and transmits a memory address, diagnostic information and messages from the fault diagnosis unit 25 and the execution unit 24 to perform its own fault diagnosis. A system diagnostic monitor 12 comprising a diagnostic message processing unit 26 for receiving a local diagnostic monitor 15 and 15a of a corresponding board through a bus 18 or transmitting a diagnostic result to the execution unit 24. Located on the control board (11) In addition, when an interrupt occurs when the system diagnostic monitor 12 and the bus 16 are connected, the memory address and diagnostic information are read from a designated storage location of the shared memory 17 and transmitted to the execution unit 32. A diagnostic message processing unit 31 for driving the past result by the bus 16, an execution unit 32 for transferring information between the diagnostic message processing unit 31 and the failure diagnosis unit 33, and the execution unit ( The central processing unit comprises a local diagnostic monitor (17) (17a) consisting of fault diagnosis units (33) for performing a fixed diagnosis according to the memory address and the diagnostic information from 32) and conveying the result to the execution unit (32). Located in the board (13) and the input and output processing board 14, the fault diagnosis device in the multi-processor system, characterized in that for performing a quick and accurate fault diagnosis. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900021849A 1990-12-26 1990-12-26 Diagnosing apparatus for multi-processor system KR930002856B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900021849A KR930002856B1 (en) 1990-12-26 1990-12-26 Diagnosing apparatus for multi-processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900021849A KR930002856B1 (en) 1990-12-26 1990-12-26 Diagnosing apparatus for multi-processor system

Publications (2)

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KR920013114A true KR920013114A (en) 1992-07-28
KR930002856B1 KR930002856B1 (en) 1993-04-12

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Application Number Title Priority Date Filing Date
KR1019900021849A KR930002856B1 (en) 1990-12-26 1990-12-26 Diagnosing apparatus for multi-processor system

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100259795B1 (en) * 1997-06-28 2000-07-01 김영환 Method and apparatus for self testing of subscriber of bus network

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100259795B1 (en) * 1997-06-28 2000-07-01 김영환 Method and apparatus for self testing of subscriber of bus network

Also Published As

Publication number Publication date
KR930002856B1 (en) 1993-04-12

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