KR920010427A - Address mapping circuit - Google Patents
Address mapping circuit Download PDFInfo
- Publication number
- KR920010427A KR920010427A KR1019900018132A KR900018132A KR920010427A KR 920010427 A KR920010427 A KR 920010427A KR 1019900018132 A KR1019900018132 A KR 1019900018132A KR 900018132 A KR900018132 A KR 900018132A KR 920010427 A KR920010427 A KR 920010427A
- Authority
- KR
- South Korea
- Prior art keywords
- address
- bit
- output
- inputting
- bits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
내용 없음.No content.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제5도는 본 발명의 메모리 제어 블록 구성도이고,5 is a configuration diagram of a memory control block of the present invention.
제6도는 제5도의 어드레스 맵핑 회로의 블록 구성도이고,FIG. 6 is a block diagram of the address mapping circuit of FIG.
제7도는 본 발명의 어드레스 맵핑 회로도이다.7 is an address mapping circuit diagram of the present invention.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900018132A KR930007044B1 (en) | 1990-11-09 | 1990-11-09 | Circuit for mapping address |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900018132A KR930007044B1 (en) | 1990-11-09 | 1990-11-09 | Circuit for mapping address |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920010427A true KR920010427A (en) | 1992-06-26 |
KR930007044B1 KR930007044B1 (en) | 1993-07-26 |
Family
ID=19305817
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900018132A Expired - Fee Related KR930007044B1 (en) | 1990-11-09 | 1990-11-09 | Circuit for mapping address |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930007044B1 (en) |
-
1990
- 1990-11-09 KR KR1019900018132A patent/KR930007044B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR930007044B1 (en) | 1993-07-26 |
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Legal Events
Date | Code | Title | Description |
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A201 | Request for examination | ||
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19901109 |
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PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 19901109 Comment text: Request for Examination of Application |
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PG1501 | Laying open of application | ||
G160 | Decision to publish patent application | ||
PG1605 | Publication of application before grant of patent |
Comment text: Decision on Publication of Application Patent event code: PG16051S01I Patent event date: 19930630 |
|
E701 | Decision to grant or registration of patent right | ||
PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19931019 |
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GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 19931230 Patent event code: PR07011E01D |
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