KR920009750B1 - Photo-diode structure of ccd imager - Google Patents

Photo-diode structure of ccd imager Download PDF

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KR920009750B1
KR920009750B1 KR1019900008480A KR900008480A KR920009750B1 KR 920009750 B1 KR920009750 B1 KR 920009750B1 KR 1019900008480 A KR1019900008480 A KR 1019900008480A KR 900008480 A KR900008480 A KR 900008480A KR 920009750 B1 KR920009750 B1 KR 920009750B1
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well
photodiode
shallow
over
vccd
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KR1019900008480A
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Korean (ko)
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KR920001738A (en
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이성민
박홍준
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금성일렉트론 주식회사
문정환
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14887—Blooming suppression
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14806—Structural or functional details thereof
    • H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

In side over-flow structure of charge coupled device (CCD) for controlling the excess charge, the dip P-well (3) is formed at the lower part of the photodiode (5) and the vertical CCD (VCCD,6). The shallow P-well (4) is formed at the side well under the layer of the photodiode and formed at the lower part of the transfer gate (8) and the channel stop part (7). This structure is useful for decreasing the over-flow drain phenomena and the smear phenomena. Also, this improves the sensitivity of the photodiode.

Description

CCD영상소자의 측면 오버-플로우 드레인 구조Lateral Over-flow Drain Structure of CCD Image Device

제1a도는 종래의 설계 평면도.1A is a plan view of a conventional design.

(b)도는 (a)도의 전위 윤관도.(b) is a potential lubrication diagram of (a).

제2a-d도는 종래의 제조공정 단면도.Figure 2a-d is a cross-sectional view of a conventional manufacturing process.

제3a도는 본 발명의 설계 평면도.Figure 3a is a plan view of the present invention.

(b)도는 (a)도의 전위 윤곽도.(b) is a potential contour of FIG.

제4a-d도는 본 발명의 제조공정 단면도.Figure 4a-d is a cross-sectional view of the manufacturing process of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

1 : 기판 2 : N-에피층1: substrate 2: N-epi layer

3 : 팁 P-웰 4 : 샬로우 P-웰3: Tip P-well 4: Shallow P-well

5 : 포토다이오우드 6 : VCCD5: photodiode 6: VCCD

7 : 채널-스톱부 8 : 트랜스퍼 게이트7: channel-stop 8: transfer gate

본 발명은 CCD(Charge Coupled Device) 영상소자의 사이드 오버-플로우(Side Over-Flow) 드레인 구조에 관한 것으로, 특히 과다한 전하의 제어에 적당하도록 한 것이다.The present invention relates to a side over-flow drain structure of a charge coupled device (CCD) imaging device, and is particularly suitable for controlling excessive charge.

종래 기술로는 수평 오버-플로우 드레인 구조와 수직 오버-풀로우드레인 구조가 있으나 이중 수평 오버-플로우 드레인 구조는 현재거의 사용되지 않고 제1a도와 같은 수직 오버-플로우 드레인 구조가 널리 사용되어 왔다.The prior art includes a horizontal over-flow drain structure and a vertical over-pull drain structure, but a double horizontal over-flow drain structure is rarely used, and a vertical over-flow drain structure such as FIG. 1a has been widely used.

이것의 제조공정은 첨부된 제2도에 의거하여 상술하면 다음과 같다. 먼저(A)(B)와 같이 기판(1)위에 N-에피층(2)을 형성한 후 딥(Deep) P-웰(3)/샬로우(Shallow) P-웰(Well)(4)을 차례로 분리하여 형성한 다음(C)와 같이 샬로우 P-웰(4) 상측에 포토다이오우드(5)를 형성하고 딥 P-웰(3) 상측에는 VCCD(6)와 채널스톱부(7)를 형성하면 제1a도와 같이 포토다이오우드(5) 하측에 샬로우 P-웰(4)이 위치한 형태의 수직 오버-플로우 드레인 구조가 완성된다.The manufacturing process thereof is as follows based on the attached FIG. First, an N-epitaxial layer 2 is formed on the substrate 1 as shown in (A) and (B), followed by a deep P-well (3) / Shallow P-well (4). Are formed by separating them in turn, and as shown in (C), the photodiode 5 is formed on the shallow P-well 4, and the VCCD 6 and the channel stop 7 are formed on the deep P-well 3. Forming a vertical over-flow drain structure in which the shallow P-well 4 is positioned below the photodiode 5 as shown in FIG. 1A is completed.

이와 같이 완성된 수직 오버-플로우 드레인 구조는 제1b도에 나타낸 전위 윤곽과 같이 포토다이오우드(5)에 엠프티(empty)상태에서 임의의 풀(Full) 상태까지 전하를 저장할 수 있으나 만약 풀 상태 이상의 전하가 축적되면 바로밑에 위치한 샬로우 P-웰(4)을 통해 과잉전하를 기판(1)으로 흘려보내게 된다.The completed vertical over-flow drain structure can store charge in the photodiode 5 from an empty state to an arbitrary full state as shown in the potential contour shown in FIG. 1b. When charge accumulates, excess charge flows to the substrate 1 through the shallow P-well 4 located directly below.

이상과 같이 상기 종래기술은 오버-플로우 드레인 현상을 줄이기 위한 구조로는 적합하나 스미어(Smear) 감쇄능력은 없기 때문에 스미어 감쇄를 위한 별도의 공정이 필요하다는 단점이 있었다.As described above, the conventional technology is suitable as a structure for reducing the overflow-drain phenomenon, but there is a disadvantage in that a separate process for smear attenuation is required since there is no smear attenuation ability.

즉, 제2d도와 같이 포토다이오우드(5)에 쌓인 데이터 전하는 영역(e)로부터 영역(f)을 통해 VCCD(6)로 흘러가 원하는 신호로 동작하게 되지만 이중 일부 전하는 영역(e)에서 영역(g)을 거쳐 영역(h)에 머물면서 스미어 노이즈로 작용하기 때문에 이를 방지하기 위한 별도의 공정이 필요하였다.That is, as shown in FIG. 2D, the data charge accumulated in the photodiode 5 flows from the region e to the VCCD 6 through the region f to operate as a desired signal, but some of the charges in the region e are the regions g. Since it acts as smear noise while staying in the region (h) through, a separate process to prevent this was required.

본 발명은 상기 단점을 제거키 위한 것으로, 이의 제조공정을 첨부된 제4도에 의거하여 상술하면 다음과 같다.The present invention is to eliminate the above disadvantages, and the manufacturing process thereof will be described in detail with reference to FIG.

먼저(A)(B)와 같이 기판(1)위에 N-에피층(2)을 형성한 후 딥 P-웰(3)/샬로우 P-웰(4)을 차례로 형성하고 이어(C)와 같이 포토다이오우드(5)를 샬로우 P-웰(4)의 측면 상측에 형성함과 동시에 채널스톱부(7)를 샬로우 P-웰(4)의 상측에 형성한 후(D)와 같이 포토다이오우드(5)와 VCCD(6)의 상측에 트랜스퍼게이트(8)를 형성하면 제3a도와 같이 포토다이오우드(5)의 둘레를 샬로우 P-웰(4)이 감싸고 있는 형태로 완성된다.First, as in (A) and (B), an N-epitaxial layer 2 is formed on the substrate 1, and then a deep P-well 3 / shallow P-well 4 is formed in turn, followed by (C) and Similarly, the photodiode 5 is formed above the side of the shallow P-well 4, and the channel stop 7 is formed above the shallow P-well 4, as shown in (D). When the transfer gate 8 is formed above the diodes 5 and VCCD 6, the shallow P-wells 4 surround the photodiodes 5 as shown in FIG. 3A.

이상과 같이 완성된 본 발명은 포토다이오우드(5) 하측의 딥 P-웰(3)이 두껍고 전하가 전송되는 영역인 트랜스퍼 게이트(8)와 채널 스톱부(7)의 하측의 샬로우 P-웰(4)은 얇기 때문에 제3b도에 나타낸 전위윤곽과 같이 과잉전하는 포토다이오우드(5)로부터 수직으로 딥 P-웰(3)을 통해서 기판(1)으로 흐르지않고 측면에 위치한 트랜스퍼 게이트(8)와 채널스톱부(7)의 하측에 위치한 샬로우 p-웰(4)을 거쳐 기판(1)으로 흐르게 된다.The present invention completed as described above has a shallow P-well under the transfer gate 8 and the channel stop portion 7 in which the deep P-well 3 under the photodiode 5 is thick and the charge is transferred. (4) is thin, so as in the potential contour shown in FIG. 3B, the excessive charge from the photodiode 5 does not flow vertically through the deep P-well 3 to the substrate 1 but with the transfer gate 8 located on the side surface. It flows through the shallow p-well 4 located below the channel stop 7 to the substrate 1.

또한, 제4d도와 같이 포토다이오우드(5)에 축적된 데이터 전하는 종래 구조와 같이 영역(a)로부터 영역(b)을 거쳐 VCCD(6)로 전송되어 신호로 동작하게되나 만약 일부 전하가 영역(c)에 머물게되는 경우 이들 전하는 영역(d)으로 흐르기 보다는 샬로우 P-웰(4)로 흐를 가능성이 훨씬 높기 때문에 스미어 현상이 감소하게 된다.In addition, as shown in FIG. 4D, the data charge accumulated in the photodiode 5 is transferred from the region a to the VCCD 6 through the region b as in the conventional structure to operate as a signal. ), The smear phenomenon is reduced because these charges are much more likely to flow into the shallow P-well 4 than to the region d.

또한, 포토다이오우드(5)의 하측에 위치한 딥 P-웰(3)의 깊이가 깊기 때문에 장파장인 적색계열의 빛까지 처리할 수 있어서 포토다이오우드(5)의 동작영역이 넓게된다.In addition, since the depth of the deep P-well 3 located below the photodiode 5 is deep, it is possible to process light of a red wavelength having a long wavelength, thereby widening the operating area of the photodiode 5.

이상과 같이 본 발명은 전하의 오보-플로우 억제 능력을 구비할 뿐만 아니라 스미어 현상을 감쇄시킬 수 있고 포토다이오우드(5)의 감도를 향상시킬 수 있는 뛰어난 효과가 있다.As described above, the present invention not only has the ability to suppress the misflow of charges, but also can reduce the smear phenomenon and has an excellent effect of improving the sensitivity of the photodiode 5.

Claims (1)

CCD영상소자의 구조에 있어서, 딥 P-웰(3)은 포토다이오우드(5)와 VCCD(6)의 하측에 형성하고 샬로우 P-웰(4)은 포토다이오우드(5)의 측면 하측이면서 트랜스퍼 게이트(8)의 하측인 부분에 형성함과 동시에 채널스톱부(7)의 하측에 형성함을 특징으로 하는 CCD영상소자의 측면 오버-플로우 드레인 구조.In the structure of the CCD image device, the deep P-well 3 is formed below the photodiode 5 and the VCCD 6, and the shallow P-well 4 is the lower side of the photodiode 5 and is transferred. A side over-flow drain structure of the CCD image element, characterized in that it is formed at the lower side of the gate (8) and at the same time as the lower portion of the channel stop (7).
KR1019900008480A 1990-06-09 1990-06-09 Photo-diode structure of ccd imager KR920009750B1 (en)

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KR920009750B1 true KR920009750B1 (en) 1992-10-22

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