KR920008743A - Address generation method for recording compact disk ROM data and its circuit - Google Patents

Address generation method for recording compact disk ROM data and its circuit Download PDF

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Publication number
KR920008743A
KR920008743A KR1019900016945A KR900016945A KR920008743A KR 920008743 A KR920008743 A KR 920008743A KR 1019900016945 A KR1019900016945 A KR 1019900016945A KR 900016945 A KR900016945 A KR 900016945A KR 920008743 A KR920008743 A KR 920008743A
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KR
South Korea
Prior art keywords
block
address
data
signal
recording
Prior art date
Application number
KR1019900016945A
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Korean (ko)
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KR930008036B1 (en
Inventor
유호중
Original Assignee
강진구
삼성전자 주식회사
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Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019900016945A priority Critical patent/KR930008036B1/en
Publication of KR920008743A publication Critical patent/KR920008743A/en
Application granted granted Critical
Publication of KR930008036B1 publication Critical patent/KR930008036B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

내용 없음.No content.

Description

콤팩트 디스크 롬 데이타의 기록용 어드레스 발생방법과 그 회로Address generation method for recording compact disk ROM data and its circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 이 발명에 따른 버퍼메모리의 구성도.1 is a block diagram of a buffer memory according to the present invention.

제 2 도는 이 발명에 따른 버퍼링 어드레스 발생 회로도.2 is a buffering address generation circuit diagram according to the present invention.

제 3 도는 제 2 도에서의 각부 동작 파형도이다.3 is an operation waveform diagram of each part in FIG. 2.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 멀티 플렉서 2 : 블럭 카운터1: multiplexer 2: block counter

3 : 오퍼레이터 4 : 어드레스 카운터3: operator 4: address counter

Claims (2)

콤팩트 디스크 롬의 데이타에서 동기패턴을 제외한 데이타만을 블럭단위로 기록하는 과정과, 상기 과정후 블럭단위의 번호를 지정하여 데이타 기록용 스타트 어드레스를 발생하여 메모리 풀 어드레스 지정을 행하는 과정과, 로 이루어지는 콤팩트 디스크 롬 데이타의 기록용 어드레스 발생방법.A process of recording only data excluding a synchronization pattern from the data of a compact disk ROM in block units, and after the above process, specifying a block number to generate a start address for data writing to designate a memory pool address, and An address generation method for recording disk ROM data. 버퍼링 스타트시에 입력 포인터의 신호를 제공받아 셀렉트 신호에 의해 입력포인터에 의한 어드레스와 블럭포인터 신호를 선택 출력하는 멀티플렉서(1)와, 동기 패턴을 검출하여서 되는 펄스로 블럭과 블럭을 구분시키는 동기신호와 버퍼링 시작시에 블럭넘버를 블럭 로딩신호에 의해 현재 기록중인 블럭 넘버를 출력하는 블럭카운터(2)와, 상기 멀티플렉서(1)의 출력신호에 의한 스타트 블럭넘버를 입력받아 해당 블럭의 스타트 어드레스로 계산하는 오퍼레이터(3)와, 오퍼레이터(3)의 출력에 의해 로딩되어서 매 동기 주기로 발생하는 어드레스 로딩신호에 의해 각 블럭의 스타트 어드레스를 입력하여 매 데이타 주기로 카운터를 증가시켜 기록될 메모리의 어드레스를 발생하는 어드레스 카운터(4)와, 로 이루어진 콤팩트 디시크 롬 데이타의 기록용 어드레스 발생회로.The multiplexer 1 receives the input pointer signal at the start of buffering and selects and outputs the address and the block pointer signal by the input pointer by the select signal, and a synchronization signal that distinguishes the block from the block by a pulse that detects a synchronization pattern. And a block counter 2 which outputs the block number currently being written by the block loading signal at the start of buffering, and a start block number obtained by the output signal of the multiplexer 1 to the start address of the corresponding block. The start address of each block is inputted by the operator 3 to calculate and the address loading signal loaded by the output of the operator 3 and generated at every synchronization period, and the counter is incremented every data period to generate an address of the memory to be written. A term for recording the compact disc data comprising an address counter 4 and Les generating circuit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900016945A 1990-10-22 1990-10-22 Method and circuit generating address for registering data in compact disk rom KR930008036B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900016945A KR930008036B1 (en) 1990-10-22 1990-10-22 Method and circuit generating address for registering data in compact disk rom

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900016945A KR930008036B1 (en) 1990-10-22 1990-10-22 Method and circuit generating address for registering data in compact disk rom

Publications (2)

Publication Number Publication Date
KR920008743A true KR920008743A (en) 1992-05-28
KR930008036B1 KR930008036B1 (en) 1993-08-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900016945A KR930008036B1 (en) 1990-10-22 1990-10-22 Method and circuit generating address for registering data in compact disk rom

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KR (1) KR930008036B1 (en)

Also Published As

Publication number Publication date
KR930008036B1 (en) 1993-08-25

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