KR920006952A - Horizontal Scanning Frequency Correction Circuit of VCR Servo System - Google Patents

Horizontal Scanning Frequency Correction Circuit of VCR Servo System Download PDF

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Publication number
KR920006952A
KR920006952A KR1019900014276A KR900014276A KR920006952A KR 920006952 A KR920006952 A KR 920006952A KR 1019900014276 A KR1019900014276 A KR 1019900014276A KR 900014276 A KR900014276 A KR 900014276A KR 920006952 A KR920006952 A KR 920006952A
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KR
South Korea
Prior art keywords
correction circuit
frequency correction
servo system
control unit
multiply
Prior art date
Application number
KR1019900014276A
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Korean (ko)
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KR920009644B1 (en
Inventor
김영수
Original Assignee
김광호
삼성전자 주식회사
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Priority to KR1019900014276A priority Critical patent/KR920009644B1/en
Publication of KR920006952A publication Critical patent/KR920006952A/en
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Publication of KR920009644B1 publication Critical patent/KR920009644B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

내용 없음.No content.

Description

VCR 서보시스템의 수평주사주파수 보정회로Horizontal Scanning Frequency Correction Circuit of VCR Servo System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래 수평주사주파수 보정회로의 ROM 구성을 나타낸 도면.1 is a diagram showing a ROM configuration of a conventional horizontal scan frequency correction circuit.

제2도는 본 발명 수평주사주파수 보정회로의 블록구성도.2 is a block diagram of a horizontal scan frequency correction circuit of the present invention.

제3도는 제2도에 도시한 제어부(20)의 구체적인 상세회로도.3 is a detailed detailed circuit diagram of the control unit 20 shown in FIG.

제4도는 제2도에 도시한 디지털승산부(40)의 구체적인 상세회로도,4 is a detailed circuit diagram of the digital multiplication unit 40 shown in FIG.

제5도는 제4도에 도시한 하나의 멀티플라이셀의 상세도,5 is a detailed view of one multiply cell shown in FIG.

제6도는 제3도에 도시한 제어부(20)의 입출력파형도이다.6 is an input / output waveform diagram of the control unit 20 shown in FIG.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1~3,10 : ROM 20 : 제어부1 ~ 3,10: ROM 20: Control part

30 : 테이터선택부 40 : 디지털승산부30: data selector 40: digital multiplier

41 : 멀티플라이셀부 42 : Q레지스터부41: multiply cell part 42: Q register part

50~52 : 제1~제3래치부 F0~F10, DF1~DFn: D형 플립플롭50 ~ 52: 1st ~ 3rd latch part F 0 ~ F 10 , DF 1 ~ DF n : D type flip flop

MK : 마스크 NC : N진카운터MK: Mask NC: N jin counter

MC1~MCn: 멀티플라이셀 MX1, MX2: 멀티플렉서MC 1 to MC n : Multiplier MX 1 , MX 2 : Multiplexer

FA : 전가산기FA: Full adder

Claims (4)

배속정보(SM)를 입력하여 스케일팩터(Scale Factor)를 결정하는 ROM(10)과, 써어치신호(SD)에 따라 회로 각 부를 제어하는 제어부(20), 상기 제어부(20)의 출력인 제어신호(DSL0~DSL2)에 따라 입력되는 상기 ROM(10)의 3Xn비트 출력데이터중 해당 데이터를 선택하는 데이터선택부(30), 상기 제어부(20)의 출력에 따라 ROM(10)의 n비트출력(An)과 데이터선택부(30)에 의해서 선택된 n비트데이터(Bn)을 입력하여 승산연산을 하는 디지털승산부(40) 및 상기 제어부(20)의 출력인 샘플신호(SP0~SP2)에 따라 디지털승산부(40)의 연산결과를 래치하는 제1~제3래치부(50~51)로 구성된 VCR 서보시스템의 수평주사주파수 보정회로.ROM 10 for determining the scale factor by inputting the speed information SM, a control unit 20 for controlling each part of the circuit according to the search signal SD, and a control which is an output of the control unit 20. Data selection unit 30 for selecting the corresponding data from the 3Xn bit output data of the ROM 10 input in response to the signals DSL 0 to DSL 2 , n of the ROM 10 in accordance with the output of the control unit 20. A sample signal SP 0 to SP that is an output of the digital multiplier 40 and the controller 20 that multiply and perform n-bit data Bn selected by the bit output An and the data selector 30. 2 ) The horizontal scan frequency correction circuit of the VCR servo system comprising first to third latch units 50 to 51 for latching the calculation result of the digital multiplication unit 40 according to 2 ). 제1항에 있어서, 제어부(20)가 노아게이트(NR1~NR=)와 앤드게이트(AD1~AD4), D형 플림플롭(F0~F8), 마스크(MK) 및 N진카운터(NC)로 구성됨을 특징으로 하는 VCR 서보시스템의 수평주사주파수 보정회로.2. The control unit (20) according to claim 1, wherein the control unit (20) comprises noar gates (NR 1 to NR = ) and end gates (AD 1 to AD 4 ), a D-type flip-flop (F 0 to F 8 ), a mask (MK), and an N binary Horizontal scanning frequency correction circuit of the VCR servo system, characterized by consisting of a counter (NC). 제1항에 있어서, 디지털승산부(40)가 오아케이트 (OR)와 n개의 D형 플립플롭(DF1~DF7)으로 이루어지는 Q래지스터(42) 및 n개의 멀티플라이셀 (MC1~MC7)로 이루어지는 멀티플라이셀부(41)로 구성됨을 특징으로 하는 VCR 서보시스템의 수평주사주파수 보정회로.The digital multiplier (40) according to claim 1, wherein the digital multiplier (40) comprises an orate (OR) and n D-type flip-flops (DF 1 to DF 7 ) and n multiply cells (MC 1 to MC). 7 ) A horizontal scan frequency correction circuit of a VCR servo system, characterized in that it is composed of a multiply-cell unit (41). 제3항에 있어서, 멀티플라이셀부(41)에 있는 n개의 멀티풀라이셀(MC1~MC7) 각각이 앤드게이트(AD5)와 멀티플랙서(MX1, MX2)전자산기 (FA) 및 D형 플립플롭(F10)으로 구성됨을 특징으로 하는 VCR 서보시스템의 수평주사주파수 보정회로.4. The multiplier cells MC 1 to MC 7 of the multiply cell unit 41 each include an AND gate AD 5 , a multiplexer MX 1 , MX 2 , and an electronic calculator FA. A horizontal scan frequency correction circuit of a VCR servo system, characterized by a D flip-flop (F 10 ). ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019900014276A 1990-09-10 1990-09-10 Horizontal scanning frequency compensating circuit of vtr servo system KR920009644B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900014276A KR920009644B1 (en) 1990-09-10 1990-09-10 Horizontal scanning frequency compensating circuit of vtr servo system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014276A KR920009644B1 (en) 1990-09-10 1990-09-10 Horizontal scanning frequency compensating circuit of vtr servo system

Publications (2)

Publication Number Publication Date
KR920006952A true KR920006952A (en) 1992-04-28
KR920009644B1 KR920009644B1 (en) 1992-10-22

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KR1019900014276A KR920009644B1 (en) 1990-09-10 1990-09-10 Horizontal scanning frequency compensating circuit of vtr servo system

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KR920009644B1 (en) 1992-10-22

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