KR920003419A - Thin film transistor - Google Patents

Thin film transistor Download PDF

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Publication number
KR920003419A
KR920003419A KR1019900010216A KR900010216A KR920003419A KR 920003419 A KR920003419 A KR 920003419A KR 1019900010216 A KR1019900010216 A KR 1019900010216A KR 900010216 A KR900010216 A KR 900010216A KR 920003419 A KR920003419 A KR 920003419A
Authority
KR
South Korea
Prior art keywords
layer
thin film
film transistor
chromium
gate electrode
Prior art date
Application number
KR1019900010216A
Other languages
Korean (ko)
Other versions
KR920010427B1 (en
Inventor
김영호
Original Assignee
김정배
삼성전관 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김정배, 삼성전관 주식회사 filed Critical 김정배
Priority to KR1019900010216A priority Critical patent/KR920010427B1/en
Publication of KR920003419A publication Critical patent/KR920003419A/en
Application granted granted Critical
Publication of KR920010427B1 publication Critical patent/KR920010427B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

내용 없음.No content.

Description

박막 트랜지스터Thin film transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래 박막 트랜지스터의 개략적 단면도.1 is a schematic cross-sectional view of a conventional thin film transistor.

제2도는 본 발명에 따른 박막 트랜지스터의 한 실시예의 개략적 단면도.2 is a schematic cross-sectional view of one embodiment of a thin film transistor according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

10 : 기판 G : 게이트 전극10: substrate G: gate electrode

Cr : (게이트 전극의)크롬층 Cu : (게이트전극의)구리층Cr: chromium layer (of gate electrode) Cu: copper layer (of gate electrode)

Ta : (게이트 전극의)탄탈륨층 Ta2O5: (게이트 전극의)산화 탈륨층Ta: tantalum layer (of gate electrode) Ta 2 O 5 : thallium oxide layer (of gate electrode)

I : 절연층 SC : 반도체층I: insulation layer SC: semiconductor layer

R : 오믹층 S : 소오스 전극R: ohmic layer S: source electrode

D : 드레인 전극D: drain electrode

Claims (2)

절연성 기판상에 형성되는 최하위층의 게이트 전극과 이의 상부로 순차적층되는 절연층과 반도체층과, 이 반도체층의 양측 상부에 적층되는 오믹층과, 이 오믹층의 각 상부에 형성되는 소오스 전극과, 드레인 전극을 구비한 박막 트랜지스터에 있어서, 상기 게이트 전극이, 기저의 크롬층과, 이 크롬층의 상부에 형성되는 중간의 구리층과, 상기 크롬층과 구리층과 전체적으로 포개어지는 중상위의 탄탈륨층과 최상위의 Ta2O5층으로 이루어지도록 된 것을 그 특징으로 하는 박막 트랜지스터.A gate electrode of the lowest layer formed on the insulating substrate, an insulating layer and a semiconductor layer sequentially layered thereon, an ohmic layer stacked on both sides of the semiconductor layer, a source electrode formed on each of the ohmic layers, In a thin film transistor having a drain electrode, the gate electrode includes a base chromium layer, an intermediate copper layer formed on an upper portion of the chromium layer, and a middle upper tantalum layer overlapped with the chromium layer and the copper layer as a whole. And a Ta 2 O 5 layer at the top. 제1항에 있어서, 상기 구리층이 상기 크롬층보다 그 폭이 좁게 형성되도록 된 것을 특징으로 하는 박막 트랜지스터.The thin film transistor of claim 1, wherein the copper layer is formed to have a smaller width than the chromium layer. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019900010216A 1990-07-06 1990-07-06 Thin film transistor KR920010427B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900010216A KR920010427B1 (en) 1990-07-06 1990-07-06 Thin film transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900010216A KR920010427B1 (en) 1990-07-06 1990-07-06 Thin film transistor

Publications (2)

Publication Number Publication Date
KR920003419A true KR920003419A (en) 1992-02-29
KR920010427B1 KR920010427B1 (en) 1992-11-27

Family

ID=19300960

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900010216A KR920010427B1 (en) 1990-07-06 1990-07-06 Thin film transistor

Country Status (1)

Country Link
KR (1) KR920010427B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100226572B1 (en) * 1997-02-17 1999-10-15 윤종용 Assembly for testing semiconductor package

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100226572B1 (en) * 1997-02-17 1999-10-15 윤종용 Assembly for testing semiconductor package

Also Published As

Publication number Publication date
KR920010427B1 (en) 1992-11-27

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