KR920002463B1 - Method of making an article comprising a buried sio2 layer and article produced thereby - Google Patents

Abstract

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Description

Semiconductor device manufacturing method

1 schematically illustrates an SOI heterostructure in accordance with the present invention.

2 is a flow diagram schematically illustrating the main processing steps of a typical two embodiment of the method of the present invention.

3 schematically illustrates a typical semiconductor device formed on an SOI wafer in accordance with the present invention.

4 and 5 are leaderford backscatter spectroscopy (RBS) spectral diagrams of a typical SOI heterostructure.

* Explanation of symbols for main parts of the drawings

10: SOI heterostructure 11: SiO ₂ layer

12: Si upper layer 31: oxide region

The present invention relates to a semiconductor device manufacturing method. In particular, it relates to silicon-on-insulator (SOI) technology and SOI devices.

It is known that SOI devices have advantages over conventional silicon devices (ie, reduced junction capacity, increased anisotropy). Several techniques are known for producing SOI heterostructures, in particular Si / SiO ₂ / Si heterostructures of the type schematically shown in FIG. Among the known techniques for producing such heterostructures are oxygen injection techniques, the application of which relates to the particular technique for forming such heterostructures (often referred to as "separation by injected oxygen" [SIMOX]). will be. For example, to review the SIMOX technology. L. F. See Hement, Materials Research Society Symposium, and Bulletin 53, pages 207-221 (1986).

As generally practiced in the present technology, SIMOX technology involves injecting a sufficiently high amount of oxygen into a silicon body (typically a Si wafer), so that regions of oxygen-rich stoichiometry are formed within the body. The invention thus far means that the oxygen distribution into the silicon body reaches a maximum concentration of at least two oxygen atoms per silicon atom. Typical dosage is 2 × 10 ¹⁸ oxygen atoms / cm 2. The critical dose ØC is the minimum dose that is the result of stoichiometric injection for a given injection energy. For example, ØC is about 1.4 × 10 ¹⁸ cm −2 at 200 KeV.

The stoichiometric implantation of the prior art results in a structure of a relatively thick (typically about 0.3 μm or more) layer of relatively thin SiO ₂ and a relatively thin (typically about 0.1 μm) silicon top layer. For a variety of reasons, it is desirable to be able to produce SOI wafers with lower implant dosages and thinner buried oxide layers. Lower dosages are usually preferred because less damage occurs in the Si body and allows for increased throughput. Thinner oxide layers enable devices that require less back bias insulation voltage as compared to devices using prior art (thicker) buried oxide layers.

Subskoichiometric injection regions, i.e., have been attempted to achieve the desired result by simply reducing the injection amount below Øc such that the maximum oxygen concentration is formed wherever less than two oxygen atoms per silicon atom are formed. . For example, see J. Stoemenos et al., Applied Physics 48 (21), pages 1470-1472 (1986). The authors note that (only slightly) injection of sub-critical oxygen (1.3 × 10 ¹⁸ cm ^-2 , 200 KeV) results in a Si-rich layer of oxygen-rich layers that are dispersed therein at 1150 ° C. It is reported that the annealing of the sample, such as, results in a structure of SiO ₂ precipitate in the Si top layer near the Si / SiO ₂ interface and the dispersion of the dispersed Si. In general, such wafers are unacceptable for device manufacturing. Stoemenos et al. Also report that annealing such wafers to 1300 ° C. for 6 hours produces a buried SiO ₂ layer consisting of a significant size of the dispersed Si protrusions, although it can produce a Si top layer regardless of the SiO ₂ precipitate. . It is known that such protrusions can serve as redundant flow gates if MOS devices are formed on such SOI wafers. Thus, such prior art SIMOX wafers are typically unacceptable for device manufacturing.

In general, two different states can be perceived. If the silicon substrate is present at a relatively low nominal temperature (typically about 350 ° C. or less), during sub-critical ion implantation, a suitable heat treatment can result in a structure of a thin SiO ₂ layer that is relatively homogeneous with recrystallization of the silicon top layer. However, under these conditions, the top layer regions adjacent to the Si / SiO ₂ interface are generally paired heavily and often form heterogeneous structures that are not suitable for device fabrication. On the other hand, if the substrate is at a relatively high nominal temperature (ie, typically at or above about 350 ° C.) during subcritical implantation, the following heat treatment generally results in a structure of an inhomogeneous buried SiO ₂ layer comprising dispersed Si regions, The silicon top layer typically also has a dispersed second phase (SiO ₂ ) region. In this case, the method also typically does not become a heterostructure useful for device manufacture.

In view of the advantages of SIMOX heterostructures having relatively thin buried SiO ₂ layers and the potential advantages associated with small amounts of implantation, the stoichiometric (subcritical) implantation technique that can be used reliably is independent of the buried SiO ₂ layer being associated with Si protrusions. The Si top layer produces a Si / SiO ₂ / Si heterostructure with relatively low defect density and characterizes the device, which makes sense. The application reveals such a technique.

The present inventors have found an injection method that can eliminate the above-mentioned disadvantages for the injection method below the grain boundaries of the prior art. The method of the present invention comprises sub-critical implantation, and also includes at least one randomized implant followed by appropriate heat treatment, and is a substantially homogeneous relatively thin buried SiO ₂ layer and device-grade (typically Xmin <5 A Si / SiO ₂ / Si heterostructure with a top layer of Si) may be produced.

In broad terms, the method of the present invention involves the randomization of at least the region of the silicon top layer adjacent to the buried SiO ₂ layer with a Si / SiO ₂ / Si heterostructure formed by any suitable technique, by any suitable oxygen implantation technique. Followed by a suitable heat treatment. The detailed description of the method of the present invention is determined first of all according to the substrate temperature during oxygen injection, as described below.

In a typical preferred embodiment, the method of the present invention provides a step of providing a single crystal Si body having a set crystal orientation and a major surface, wherein an oxygen rich layer is formed in the Si body to have a relatively low oxygen content silicon top layer thereon. Implanting into the Si body through the surface. In addition, this embodiment includes the step of heat treating the oxygen implanted Si body with at least some degree of Si top layer material having a predetermined crystal orientation such that a nearly stoichiometric embedded SiO ₂ layer is formed from an oxygen rich layer.

This embodiment also includes implanting Si ions through the major surface, wherein the implant amount is effective to cause actual randomization of the top layer material near the SiO ₂ layer / top layer interface, and in fact the embedded SiO ₂ layer / top layer interface. Implanted Si body heat treatment, such as device grade top layer material of established crystal orientation with a relatively low defect density in the vicinity.

1 schematically shows a SOI heterostructure 10 of the type related to this specification. The SiO ₂ layer 11 is embedded in the monocrystalline Si body. Preferably, the Si top layer 12 is of the quality of the device and maintains the nearly original lattice orientation of the Si body.

2 is a combined flow diagram for two alternative exemplary embodiments of the process of the present invention, wherein the left and right branches each apply a relatively low and high nominal temperature injection below the threshold.

As will be appreciated by those skilled in the art, the major surface of the substrate (usually 100 surface) is cleaned and otherwise prepared prior to subcritical implantation. Such techniques are known and not discussed here. It can be seen that the injection is carried out in a suitable vacuum.

By way of example, it has been found that sub-critical doses are advantageously in the range of about 3 × 10 ¹⁷ to about 7 × 10 ¹⁷ oxygen ions / cm 2. However, this range does not have a limit considered, since higher sub-threshold doses may advantageously be used occasionally, while lower doses may result in useful buried SiO ₂ layers.

In a preferred embodiment (consistent with the left branch of FIG. 2), the nominal substrate temperature during the subcritical oxygen injection is relatively low, usually below 350 ° C. “Nominal” substrate temperature Here we mean the temperature at the substrate without any beam heating effect. For example, a Si wafer is typically clamped to a stainless steel block maintained at a given temperature. The temperature of the block is considered the nominal substrate temperature.

As shown in the left branch of FIG. 2, oxygen injection below the (low temperature) threshold is accompanied by a suitable heat treatment so that the stoichiometric SiO ₂ is actually formed from an oxygen rich injection layer. Such heat treatment advantageously usually includes low temperature annealing (typically preferably not exceeding 700 ° C., but between 30 minutes and 3 hours at temperatures between 500 ° C. and 800 ° C.) to recrystallize amorphous Si. The heat treatment also occurs at high temperature annealing, typically at temperatures above 1200 ° C., for a longer period of time, typically more than 3 hours. As predicted by those skilled in the art, the annealing time is inversely related to the annealing temperature. A small number of experiments are usually sufficient to determine the appropriate time / temperature combination. Although a two step heat treatment has been taken as described above, other annealing programs (ie, slow lapping of the temperature in hot quenching or simple hot annealing) may also be useful.

What is clear in the art is that the heat treatment must be done in non-oxidizing conditions. That is, in vacuum or in an inert gas state. The prior art knows a relatively thick oxide cap layer (ie 50 nm) as a means to protect the Si top layer during high temperature annealing. We have been thinking of valid techniques for protecting the Si top layer during hot annealing. The technology currently selected by us is the oxygen concentration effective for the slow growth that protects the thin SiO ₂ layer (ie 20 nm) during the heat treatment, which is the oxygen content of the small constituents (ie 1%) and the main component (ie 99%). Loosening takes place in the atmosphere, which occurs under inert gas. The presence of this thin protective layer is a thick oxide layer that occurs if the annealing is carried out under the puncture of the Si top layer, which often occurs when the annealing occurs in nominal non-oxidizing conditions (vacuum or inert gas) and the annealing is well oxidized. Interfere with the increase.

As shown in the left branch of FIG. 2, the silicon body is susceptible to randomized ion implantation after high temperature annealing. It has been found that random injection at a nominal substrate temperature of about 100 ° C. or less is easy. In general, the substrate is nominally room temperature, and we also get good results when the substrate is cooled to near liquid nitrogen temperature (77'K). Although we believe that a relatively low substrate temperature during randomization implants prevents the implant-produced lattice from compensating for it, it may be acceptable for a nominal substrate temperature above 100 ° C under certain conditions.

For example, silicon ions are implanted during randomization implantation, typically at a capacity of 3 × 10 ¹⁴ Si / cm 2. Very useful amounts of Si are currently known to range from 2 × 10 ¹⁴ to 1 × 10 ¹⁵ / cm 2. Implant energy of 400 KeV was randomized for subcritical injection, respectively. However, a wide range of energy, i.e., about 2 MeV at 100 IKeV, is also expected to be useful. Moreover, the random implantation does not necessarily need to be Si implantation. For example, Ar or other rare gas injection can be used under certain conditions.

The randomization implant function is to neutralize the area of the silicon top layer adjacent to the interface of the buried SiO ₂ layer. In general, however, the silicon sublayer region adjacent to the interface of the buried SiO ₂ layer will also be immobilized. In general, the portion of the Si top layer adjacent to the major surface of the silicon body remains crystal to provide a seed region for regrowth of the single crystal towards a certain direction of the silicon top layer.

In the preferred embodiment (left branch of FIG. 2) the required randomized implantation is carried out by a suitable heat treatment. For example, annealing occurs at a relatively low temperature (up to 60 ° C., 1 hour or less). More generally, annealing in the range 500 ° C. to 800 ° C. (preferably not over 700 ° C.) is considered to be effective, but under certain conditions annealing at temperatures outside the above range may lead to regrowth of the device-quality Si top layer material. Can cause. After the annealing treatment, the heterostructure is stable to heat treatment when determined in the device process.

However, although currently not well used, embodiments of the method of the present invention (the right branch of FIG. 2) show that the embodiments of the method of the invention (the right branch of FIG. 2) are oxygen injected at a relatively high normal temperature (generally at least about 350 ° C.). It is carried out by the first randomized injection of the type described above. Following completion of the first randomized implant, the implanted Si body is essentially heat treated as mentioned in the context of the presently preferred embodiment. The heat treatment is preferably performed by an optional second randomized implant. In general, the conditions of the second randomization injection are similar to the first randomization conditions. An optional second randomized implant will generally be performed by annealing at low temperatures of the type as mentioned in the context of the presently preferred embodiment.

After the proper heat treatment is completed, according to the general invention, the SOI wafer is being prepared for device fabrication by known methods. For example, a review of several such methods can be found in D. H. Elliott's Integrated Circuit Manufacturing Technology, McGraw-Hill (1982).

One exemplary electronic device (enhanced n-channel MOS transistor) according to the present invention is shown in FIG. 3, where layer 11 is a buried SiO ₂ layer and 12 is a portion of a Si top layer. The upper layer portion is doped in a P shape with two sub- portions being n +. Oxide region 31 helps to isolate 12 from other devices, define a contact window, and provide gate insulation in all conventional ways. Reference numeral 32 refers to the source, gate and drain metal contacts.

[Example 1]

The A (100) oriented single crystal Si wafer is cleaned by conventional procedures and clamped to a stainless steel block in the target chamber of the ion implanter. If a stainless steel block is injected by 170 KeV at nominally 100 ° C and 3 × 10 ⁷ oxygen / cm 2, oxygen-rich charge formation with approximate Gaussian data (depth up to about 370 nm, half full width about 180 nm) Will result. The wafer is transferred to a tube furnace and maintained with argon + 1% oxygen at 600 ° C. for 2 hours and 1390 ° C. for 30 minutes. The annealing will result in the formation of a thick oxide layer of about 60 nm from the oxygen rich injection layer of Si twinned at both interfaces. The RBS spectrum of the wafer thus produced is obtained by standard means [2MeV He +, (100) and 5 ° off (100)], and is shown in FIG. As is known, such spectra including the known about Xmin derived from the spectra are standard guidelines for the quality of thin crystal layers. Curves 40 and 41 are random and channeled yields respectively, the actual stoichiometry of the buried oxide layer, the adjacent portions of the Si top layer are monocrystalline materials and the Si / SiO ₂ interface regions are flawed.

Transfer electron microscopy represents areas of the defect that will be heavily paired. Following the RBS, the wafer is transferred back to the injector and at liquid nitrogen temperature the wafer is injected with a nominal 3 × 10 ¹⁴ silicon / cm 2 (400 KeV). The RBS yield of the randomized wafer is shown in FIG. 5, where curves 50 and 51 are random and channeled yields. The immobilization of Si adjacent to the SiO ₂ layer, which is an immobilized region extended on the Si surface, is evident. According to RBS, the wafer is unwound at 60 ° C. for 2 hours in vacuum. The results of the successive RBSs are shown in FIG. 5, where curve 52 is the channeled yield of the wafer after the second cryogenic unwinding.

The improvement of crystalline, in particular the Si top layer, is quite evident. In particular, the SiO ₂ / Si top layer interface was free from defects with a top layer of about 3% Xmin device quality. Electron microscopy was also performed on the wafer, and the buried SiO ₂ layer was shown to be essentially continuous with sharp interfaces, without Si protrusions, demonstrating the absence of twins in the top layer.

[Example 2]

The second SOI wafer is provided as sub-critical oxygen injection is nearly as described in Example 1 except for the prescribed wafer temperature for 500 ° C., and the arithmetic injection (4 × 10 ¹⁷ oxygen / cm 2, 200 KeV) is randomized Si injection (nominal) Temperature 30 ° C., 1 × 10 ¹⁵ / cm 2, 460 KeV, followed by a second randomized Si implantation (same conditions as above), which is accompanied by 600 ° C. annealing. The quality of the heterostructures thus formed is almost as described in Example 1.

Claims (12)

a) preparing a single crystal Si body having a main surface and a crystal orientation, b) injecting oxygen ions into the Si body through the main surface so that a multilayer of oxygen embedded in the Si body is formed, and having a Si upper layer thereon; c) a semiconductor device comprising a layer of SiO ₂ embedded in a Si body comprising heat treating an Si-implanted Si body to form an SiO ₂ layer embedded from a multilayer of oxygen, and d) completing the manufacture of the product. In the method of manufacturing, e) oxygen injection is sub-critical oxygen injection, the method further comprising: f) the resulting Si top layer is suitable for fabrication of devices with relatively low defect density near the SiO ₂ / upper layer interface. And b) subsequently implanting randomization and performing a heat treatment. The method of claim 1, wherein the randomized implant comprises Si ion implantation, wherein Si is maintained at a nominal temperature lower than about 100 ° C. during the body randomized implant. The semiconductor of claim 2, wherein about 2 × 10 ¹⁴ to about 1 × 10 ¹⁵ Si / cm 2 is implanted during the implantation of randomization, and the Si ions have an energy in the range of about 0.1 MeV to about 2MeV. Device manufacturing method. The Si body of claim 1, wherein the Si body is maintained at a process temperature lower than about 350 ° C. during the subcritical oxygen injection, and the randomization injection is performed following step c), wherein the Si body is about 100 ° C. during the randomization injection. A method for manufacturing a semiconductor device, characterized in that it is maintained at a lower nominal temperature. The method of claim 4, wherein step c) comprises annealing the Si body to a temperature higher than about 1200 ° C., wherein the heat treatment of step f) is followed by a randomization implantation and at a temperature in the range of about 500 ° C. to 700 ° C. 6. Method of manufacturing a semiconductor device, characterized in that the loosening. 6. The method of claim 5, wherein step c) further comprises annealing the Si body to a temperature in the range of about 500 &lt; 0 &gt; C to 700 &lt; 0 &gt; C. The Si body of claim 1, wherein the Si body is maintained at a nominal temperature of at least about 350 ° C. during the stoichiometric oxygen injection, and before step c) a first randomized implantation is performed, wherein the Si body is about 100 A method for manufacturing a semiconductor device, characterized in that it is maintained at a nominal temperature lower than ℃. 8. The method of claim 7, wherein step c) unwinds the Si body at a temperature higher than about 1200 &lt; 0 &gt; C. The method of claim 8, wherein the method also includes a second randomized implant, which is performed subsequent to step c), and wherein the Si body is uncoiled to a temperature in the range of about 500 ° C. to 700 ° C. following the second randomized implant. The semiconductor device manufacturing method characterized by the above-mentioned. 9. The method of claim 8, wherein step c) comprises annealing the Si body to a temperature in the range of about 500 &lt; 0 &gt; C to 700 &lt; 0 &gt; C. The method of claim 1, wherein step c) comprises contacting the Si body to an atmosphere suitable for causing slow growth of the relatively thin SiO ₂ layer. 12. The method of claim 11, wherein the atmosphere contains an inert gas as a main component and oxygen as a hydrophobic component.

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