KR920001719A - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- KR920001719A KR920001719A KR1019910009214A KR910009214A KR920001719A KR 920001719 A KR920001719 A KR 920001719A KR 1019910009214 A KR1019910009214 A KR 1019910009214A KR 910009214 A KR910009214 A KR 910009214A KR 920001719 A KR920001719 A KR 920001719A
- Authority
- KR
- South Korea
- Prior art keywords
- power supply
- voltage
- predetermined voltage
- supply voltages
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims description 4
- 238000001514 detection method Methods 0.000 claims 3
- 238000006243 chemical reaction Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
Landscapes
- Power Engineering (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Power Sources (AREA)
- Stand-By Power Supply Arrangements (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제 1도는 이 발명의 제 1의 실시예에 의한 반도체장치의 구성을 표시하는 블록도이다.1 is a block diagram showing the configuration of a semiconductor device according to the first embodiment of this invention.
제 2도는 제 1도의 반도체장치의 주요부의 회로구성을 표시하는 도면이다.FIG. 2 is a diagram showing the circuit configuration of the main part of the semiconductor device of FIG.
제 3도는 제 2도에 표시되는 전압레벨차 검출회로의 입출력 특성을 표시하는 도면이다.3 is a diagram showing input / output characteristics of the voltage level difference detecting circuit shown in FIG.
Claims (1)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2148130 | 1990-06-05 | ||
JP2-148130 | 1990-06-05 | ||
JP2148130A JP2544993B2 (en) | 1990-06-05 | 1990-06-05 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920001719A true KR920001719A (en) | 1992-01-30 |
KR960002775B1 KR960002775B1 (en) | 1996-02-26 |
Family
ID=15445932
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910009214A KR960002775B1 (en) | 1990-06-05 | 1991-06-04 | Semiconductor device |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP2544993B2 (en) |
KR (1) | KR960002775B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003007835A (en) * | 2001-06-25 | 2003-01-10 | Hitachi Ltd | Semiconductor device and method of testing semiconductor device |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2721151B2 (en) * | 1986-04-01 | 1998-03-04 | 株式会社東芝 | Semiconductor integrated circuit device |
JPH0415949A (en) * | 1990-05-09 | 1992-01-21 | Mitsubishi Electric Corp | Semiconductor device |
-
1990
- 1990-06-05 JP JP2148130A patent/JP2544993B2/en not_active Expired - Lifetime
-
1991
- 1991-06-04 KR KR1019910009214A patent/KR960002775B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP2544993B2 (en) | 1996-10-16 |
KR960002775B1 (en) | 1996-02-26 |
JPH0439963A (en) | 1992-02-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20010222 Year of fee payment: 6 |
|
LAPS | Lapse due to unpaid annual fee |