KR920000843Y1 - Automatic gain control circuit for audio apparatus - Google Patents
Automatic gain control circuit for audio apparatus Download PDFInfo
- Publication number
- KR920000843Y1 KR920000843Y1 KR2019880020736U KR880020736U KR920000843Y1 KR 920000843 Y1 KR920000843 Y1 KR 920000843Y1 KR 2019880020736 U KR2019880020736 U KR 2019880020736U KR 880020736 U KR880020736 U KR 880020736U KR 920000843 Y1 KR920000843 Y1 KR 920000843Y1
- Authority
- KR
- South Korea
- Prior art keywords
- recording
- circuit
- graphic equalizer
- amplifier
- automatic gain
- Prior art date
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/027—Analogue recording
- G11B5/03—Biasing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/027—Analogue recording
- G11B5/035—Equalising
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- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Abstract
내용 없음.No content.
Description
제1도는, 종래의 회로 구성도.1 is a conventional circuit configuration diagram.
제2도는, 제1도의 동작 특성 그래프.2 is a graph of the operating characteristics of FIG.
제3도는, 본 고안의 회로 구성도.3 is a circuit configuration diagram of the present invention.
제4도는, 제3도의 동작 특성 그래프.4 is a graph of the operating characteristics of FIG.
제5도는, 제3도에서의 이득조정 회로부의 상세회로도.FIG. 5 is a detailed circuit diagram of the gain adjustment circuit section in FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings
1 : 그래픽 이퀄라이저회로 2 : 메인증폭기1: Graphic equalizer circuit 2: Main amplifier
3 : 녹음 앰프 4 : 녹음 바이어스 회로3: recording amplifier 4: recording bias circuit
10 : 이득조정회로 H : 녹음/재생용 헤드10: Gain adjustment circuit H: Head for recording / playback
VR : 메인 볼륨 S1: 녹음/재생 전환 스위치VR: Main Volume S 1 : Record / Playback Switch
Q1: 트랜지스터 VR1-VR3: 가변저항Q 1 : Transistor VR 1- VR 3 : Variable resistor
R2-R5: 저항 C2-C8: 콘덴서R 2 -R 5 : Resistor C 2 -C 8 : Capacitor
본 고안은 녹음/재생 겸용 음향기기에 있어서, 재생시에만 조정이 가능한 그래픽 이퀄라이저(Graphic Equalizer)회로를 녹음시에도 각 주파수별로 이득을 조정하여 녹음시에 찌그러짐 현상을 미연에 방지함으로써 재생시와 녹음시의 이득을 자동으로 조정할 수 있도록 한 회로에 관한 것이다.The present invention provides a recording / playback audio device in which a graphic equalizer circuit that can only be adjusted during playback is used to adjust the gain for each frequency during recording to prevent distortion during recording. It is about a circuit that allows the gain to be adjusted automatically.
종래에는, 제1도 및 제2도에 나타낸 바와같이 그래픽 이퀄라이저(1)의 전단에서 녹음앰프(3)의 입력을 공급하는 구성을 이루어지고 있는 것이기 때문에, 녹음시에는 그래픽 이퀄라이저 회로가 조정되지 못하므로 각 주파수 별로 이득을 조정할수가 없기 때문에 녹음시에 찌그러짐 현상이 발생되는 문제점이 있었다.Conventionally, as shown in FIGS. 1 and 2, since the input of the recording amplifier 3 is supplied at the front end of the graphic equalizer 1, the graphic equalizer circuit cannot be adjusted during recording. Therefore, there is a problem that distortion occurs during recording because the gain cannot be adjusted for each frequency.
본 고안은 이러한 종래의 문제점을 해소하기 위하여 그래픽 이퀄라이저회로(1)의 후단에 녹음 앰프를 연결하고 상기 그래픽 이퀄라이저 입력단의 부귀환량을 조정하는 이득 조정회로를 연결하여 녹음시에도 그래픽 이퀄라이저 회로가 동작하여 각 주파수별 이득을 조정할 수 있도록 고안한 것으로서, 이를 첨부한 도면에 의하여 상술하면 다음과 같다.The present invention connects a recording amplifier to the rear end of the graphic equalizer circuit 1 and a gain adjusting circuit for adjusting the negative feedback amount of the graphic equalizer input stage to solve the conventional problems, so that the graphic equalizer circuit operates during recording. It is designed to adjust the gain for each frequency as described above with reference to the accompanying drawings as follows.
제3도에서와 같이, 그래픽 이퀄라이저회로(1)의 출력단(OUT)과 (-)측 입력단 사이에 일정폭 이상이 되지 않도록 레벨번화폭을 제한 조정하는 이득조정회로(10)와 저항(R3), 콘덴서(C9)를 통하여 통상의 녹음앰프(3) 및 녹음/재생 헤드(H)를 연결하여 구성한 것이다.As shown in FIG. 3, the gain adjusting circuit 10 and the resistor R 3 limit the level number width so as not to exceed a predetermined width between the output terminal OUT and the negative input terminal of the graphic equalizer circuit 1. And a conventional recording amplifier 3 and a recording / playback head H through the condenser C 9 .
미설명 부호 IN은 음성신호 입력단자, 4는 녹음 바이어스 회로, 2는 메인 증폭기, SP는 스피커, VR은 메인 증폭기용의 음량 조정볼륨이다.Reference numeral IN denotes an audio signal input terminal, 4 denotes a recording bias circuit, 2 denotes a main amplifier, SP denotes a speaker, and VR denotes a volume control volume for the main amplifier.
제5도는 상기 이득조정회로(10)의 상세회로도를 나타내고 있는 것으로서, 이는 가변저항(VR1-VR3), 트랜지스터(Q1) 및 콘덴서(C2-C8), 저항(R2)으로 연결 구성된 것이다.5 shows a detailed circuit diagram of the gain adjustment circuit 10, which is composed of the variable resistors VR 1- VR 3 , the transistors Q 1 , the capacitors C 2- C 8 , and the resistors R 2 . The connection is made up.
이와같이 구성된 본 고안의 작용효과를 설명하면 다음과 같다.Referring to the effect of the present invention configured as described above are as follows.
제3도에서 그래픽 이퀄라이저 회로(1)를 거쳐 자유롭게 변화된 음원을 픽업하고, 저항(R3) 및 콘덴서(C2)를 통하여 녹음앰프(3)에 공급된다.In Fig. 3, the freely changed sound source is picked up via the graphic equalizer circuit 1 and supplied to the recording amplifier 3 through the resistor R 3 and the condenser C 2 .
이때, 그래픽 이퀄라이저회로(1)의 이득이 필요이상으로 크게 변화하여 너무 높아지면 녹음/재싱용 헤드(H)에 신호전류가 증대되어 음원이 찌그러진 상태로 녹음되기 때문에 그래픽 이퀄라이저 회로(1)의 이득을 재생시와 동일하게 하면 과대 입력상태로 된다.At this time, if the gain of the graphic equalizer circuit 1 changes too much and becomes too high, the signal current is increased in the recording / ashing head H and the sound source is recorded in a distorted state, so the gain of the graphic equalizer circuit 1 is increased. If is made the same as during playback, it becomes an excessive input state.
이를 방지하고자 재생시와 녹음시의 이득을 자동적으로 조정(일정폭 이상이 되지 않도록 그래픽 이퀄라이저 회로의 레벨 변화폭에 제한을 가함)하도록 한다.To prevent this, adjust the gain during playback and recording automatically (limiting the level change of the graphic equalizer circuit so that it does not exceed a certain width).
즉, 제5도에 나타낸 바와같이, 그래픽 이퀄라이저회로(1)의 출력단(OUT)에 연결된 병렬접속의 저항(R2) 및 콘덴서(C8)를 녹음/재생 전환스위치(S1)의 전환 상태에 따라 트랜지스터(Q1)를 온. 오프시키는 것에 의하여 상기 그래픽 이퀄라이저 회로(1)의 (-)측 입력단에 연결시킴으로써 전체적인 이득폭을 제한한다.That is, as shown in FIG. 5, the resistance R 2 and the capacitor C 8 of the parallel connection connected to the output terminal OUT of the graphic equalizer circuit 1 are switched state of the recording / playback switching switch S 1 . According to turn on transistor Q 1 . By turning it off, it connects to the negative input of the graphic equalizer circuit 1 to limit the overall gain width.
즉 녹음시에는 트랜지스터(Q1)가 도통하게 되고, 이때 가변저항(VR1-VR3)의 변화 주파수를 100HZ·1KHZ·10KHZ로 3밴드로 가정하면, 제4도에 나타낸 바와같이 도시될수 있다.That is, it is a transistor (Q 1) when conducting recording, wherein assuming a change in frequency of the variable resistor (VR 1 -VR 3) in 3-band to 100HZ · 1KHZ · 10KHZ, it can be illustrated as shown in FIG. 4 .
따라서 녹음시에도 자유로운 음색의 조정을 찌그러짐 없이 녹음할수가 있으며, 여기서 변화폭(6dB)은 일예를 든 것이다.Therefore, even during recording, you can record freely tonal adjustment without distortion, where the change range (6dB) is an example.
이상에서와 같이 동작되는 본 고안은 재생시에만 국한되어 있던 그래픽 이퀄라이져 회로의 조정을 녹음시에도 자유롭게 행할수가 있는 것이어서, 그 음을 모니터하면서 그 음색을 그대로 녹음할수 있을뿐만 아니라, 녹음시 그래픽 이퀄라이저의 높은 이득으로 찌그러짐 현상을 미연에 방지할수 있는 효과가 있는 것이다.The present invention, which operates as described above, can freely adjust the graphic equalizer circuit, which was limited only during playback, during recording, so that the sound can be recorded as it is while the sound is monitored, and the graphic equalizer high during recording. The gain is effective in preventing distortion in advance.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019880020736U KR920000843Y1 (en) | 1988-12-15 | 1988-12-15 | Automatic gain control circuit for audio apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019880020736U KR920000843Y1 (en) | 1988-12-15 | 1988-12-15 | Automatic gain control circuit for audio apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900013012U KR900013012U (en) | 1990-07-04 |
| KR920000843Y1 true KR920000843Y1 (en) | 1992-01-31 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019880020736U KR920000843Y1 (en) | 1988-12-15 | 1988-12-15 | Automatic gain control circuit for audio apparatus |
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| Country | Link |
|---|---|
| KR (1) | KR920000843Y1 (en) |
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1988
- 1988-12-15 KR KR2019880020736U patent/KR920000843Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
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| KR900013012U (en) | 1990-07-04 |
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