KR920000357Y1 - Charge coupled pevice - Google Patents

Charge coupled pevice Download PDF

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Publication number
KR920000357Y1
KR920000357Y1 KR2019890004483U KR890004483U KR920000357Y1 KR 920000357 Y1 KR920000357 Y1 KR 920000357Y1 KR 2019890004483 U KR2019890004483 U KR 2019890004483U KR 890004483 U KR890004483 U KR 890004483U KR 920000357 Y1 KR920000357 Y1 KR 920000357Y1
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South Korea
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output
gate
diffusion region
horizontal transfer
ccd
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KR2019890004483U
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Korean (ko)
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KR900019537U (en
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전인상
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삼성전자 주식회사
김광호
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

내용 없음.No content.

Description

전하 결합소자Charge-coupled device

제1도는 종래의 전하 결합소자 출력부 구성도.1 is a configuration diagram of a conventional charge coupling device output unit.

제2도는 본 고안의 전하 결합소자 출력부 구성도.2 is a configuration diagram of the charge coupled device output unit of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

1,7 : 리세트 트랜지스터의 드레인 2,8 : 리세트 트랜지스터의 게이트1,7 Drain of reset transistor 2,8 Gate of reset transistor

3,9 : 출력부 확산영역 4,10 : 출력게이트3,9: output diffusion region 4,10: output gate

5,6,11,12 : 수평전송 CCD채널 vout, vout1, vout2: 출력신호5,6,11,12: Horizontal transfer CCD channel vout, vout 1 , vout 2 : Output signal

본 고안은 2행 동시 수평출력형 전하 결합소자(CCD : Charge Couplde dev ice)에 관한 것으로, 상세하게는 2개의 수평전송 CCD를 하나로 구성하고 고정패턴 잡음을 억제하기 위한 전하 결합소자에 관한 것이다.The present invention relates to a two-row simultaneous horizontal output type charge coupled device (CCD: Charge Couplde dev ice), and more particularly to a charge coupled device for suppressing fixed pattern noise by configuring two horizontal transfer CCD in one.

전화 결합소자는 전송전극하에 형성된 전위 우물에 신호전하를 축적하고 전송전극으로 인가전압을 이동시킴으로써 인접전송전극하에 형성된 전위우물에 신호전하를 전송하는 소자로서 이를 고체촬영소자에 사용된다.The telephone coupling element accumulates signal charges in the potential well formed under the transfer electrode and transfers the applied voltage to the transfer electrode and transfers the signal charges to the potential well formed under the adjacent transfer electrode.

그런데 전하 결합소자형 고체촬영소자가 다(多)화소화 됨에 따라 수평전송의 구동주파수를 낮추기 위해 2행동시 수평출력형 CCD가 쓰이고 있다.However, as the charge-coupled solid-state imaging device becomes more multi-pixel, the horizontal output CCD is used in two actions to lower the driving frequency of the horizontal transfer.

종래의 2행 동시출력 CCD는 제1도에 도시된 바와같이 리세트 드레인 전압 (VRD)에 한쌍의 리세트 트랜지스터의 드레인(1)을 연결하고, 이어서 리세트 트랜지스터의 게이트(2)를 연결하며, 상기 게이트(2)에 출력부 확산 영역(3)을 연결하여 력 게이트(4)에 접속하되 상기 출력부 확산영역(3)에서 두 출력신호(vout1)(vout2)를 연결한다.A conventional two-row simultaneous output CCD connects the drain 1 of a pair of reset transistors to the reset drain voltage V RD as shown in FIG. 1, and then connects the gate 2 of the reset transistor. The output diffusion region 3 is connected to the gate 2 so as to be connected to the output gate 4, and two output signals vout 1 and vout 2 are connected to the output diffusion region 3.

상기 출력게이트(4)에는 수평전송 CCD 채널(5)(6)을 연결하여 구성된다.The output gate 4 is configured by connecting a horizontal transfer CCD channel 5, 6.

이와 같은 구성을 갖는 종래의 2행 동시출력 CCD에서는 두개의 수평전송 CCD에 각각의 출력부를 만들어 신호를 검출 하고 있다.In a conventional two-row simultaneous output CCD having such a configuration, each output unit is made on two horizontal transfer CCDs to detect a signal.

따라서, 각각의 리세트 트랜지스터 게이트와 출력부 확산 영역 및 출력게이트에 의해 형성되는 출력용량에 차이가 발생하는 문제점이 있다.Therefore, there is a problem that a difference occurs in the output capacitance formed by each of the reset transistor gate, the output diffusion region, and the output gate.

또한 두출력신호는 수평전송 CCD를 통해 전송되어온 신호 전하량을 출력용량으로 나눈것이므로 출력용량이 서로 다르면 전송되어온 신호량이 같아도 출력신호에 차이가 발생된다.In addition, since the two output signals are divided by the output capacitance divided by the output capacitance of the signal transmitted through the horizontal transfer CCD, the output signal is different even if the output capacitance is the same.

즉, 고정패턴 잡음의 발생원으로 되는 문제점이 있다.That is, there is a problem of being a source of fixed pattern noise.

또한 두 출력단자에는 각각의 신호검출회로(소오스 플로워)가 동일 칩상에 형성되므로 넓은 면적을 필요로 하는 단점이 있다.In addition, each signal detection circuit (source follower) is formed on the same chip at both output terminals, which requires a large area.

따라서 본 고안은 상기한 문제점들을 해결하기 위하여 안출한 것인바, 2개의 수평전송 CCD가 각각의 출력단을 가지는 종래구조를 개선하여 1개의 출력단으로 구성함으로써 고정 패턴의 잡음을 억제하도록 하는데 그 목적이 있다.Therefore, the present invention has been made to solve the above problems, and the object of the present invention is to reduce noise of a fixed pattern by constructing one output stage by improving the conventional structure having two output CCDs having respective output stages. .

이하 첨부된 도면에 의하여 본 고안을 설명한다.Hereinafter, the present invention will be described with reference to the accompanying drawings.

제2도는 본 고안의 회로 블럭도로서, 2개의 수평전송 CCD(11)(12)를 하나로 통합하여 구성하고, 상기 수평전송 CCD(11)(12)에 공통의 출력게이트(10)를 연결하며, 상기 출력게이트(10)에는 출력확산영역(9)을 연결하되 출력확산영역(9)에는 출력 (Vout)을 연결한다.2 is a circuit block diagram of the present invention, in which two horizontal transfer CCDs 11 and 12 are integrated into one, and a common output gate 10 is connected to the horizontal transfer CCDs 11 and 12. The output diffusion region 9 is connected to the output gate 10, but the output Vout is connected to the output diffusion region 9.

상기 출력확산영역(9)에는 리세트 트랜지스터의 드레인(7)을 통하여 게이트 (8)를 연결하며 상기 게이트(8)에 리세트 드레인 전압(VRD)을 접속하여 구성한다.A gate 8 is connected to the output diffusion region 9 through a drain 7 of a reset transistor, and a reset drain voltage V RD is connected to the gate 8.

따라서 수평전송 CCD(11)(12)에서 각각의 출력부 신호를 검출할때 리세트 트랜지스터의 게이트(8)와 출력부 확산영역(9) 및 출력게이트(10)에 의해 형성되는 출력용량에 차이가 발생하지 않는다.Therefore, the output capacitance formed by the gate 8 of the reset transistor, the output diffusion region 9 and the output gate 10 of the reset transistor when the horizontal transmission CCDs 11 and 12 detect the respective output signals. Does not occur.

그러므로 수평전송 CCD채널(11)(12)를 통해 전송되어온 신호전하량은 상기 출력용량이 차이가 없이 같으므로 출력신호(Vout)가 일정하게 유지된다.Therefore, the signal charge amount transmitted through the horizontal transfer CCD channels 11 and 12 is the same without difference in output capacity, so that the output signal Vout is kept constant.

이상에서 설명한 바와 같이 본 고안은 2행 동시출력 구조의 CCD형 고체〔촬영소자에 있어서 2개의 수평전송 CCD를 하나로 구성하여 1개의 출력부로 구성함으로써 고정패턴 잡음의 발생을 방지하고, 또한 1개의 신호검출회로(소오스 플로워) 만을 필요로 하므로 소요면적도 줄일 수 있는 장점이 있는 것이다.As described above, the present invention prevents the occurrence of fixed pattern noise and prevents the occurrence of fixed pattern noise by configuring two horizontal transmission CCDs in one and two output units in a CCD type solid state [two-stage simultaneous output structure]. Since only a detection circuit (source follower) is required, the required area can be reduced.

Claims (1)

두개의 수평전송 CCD를 통해 신호전하를 출력시키는 2행 동시 출력구조로된 CCD형 고체촬용 소자에 있어서, 두개의 수평전송 CCD채널을 하나로 구성하여 공통의 출력게이트를 통해 확산영역에 연결하고, 상기 확산 영역은 리세트 게이트를 통해 리세트 드레인단에 연결하되 상기 확산영역과 리세트 게이트는 각각 분리하여인접연결시킨 것을 특징으로 하는 전하결합소자.In a CCD type solid-state imaging device having a two-row simultaneous output structure for outputting signal charges through two horizontal transfer CCDs, the two horizontal transfer CCD channels are configured in one and connected to a diffusion region through a common output gate. The diffusion region is connected to the reset drain terminal via a reset gate, wherein the diffusion region and the reset gate are separated and adjacently connected to each other.
KR2019890004483U 1989-04-11 1989-04-11 Charge coupled pevice KR920000357Y1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100363407B1 (en) * 1993-07-24 2003-02-05 롤프 스트로스만 Electric auxiliary drive for a travelling device primarily driven, in particular drawn or pushed, by human or animal power

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100363407B1 (en) * 1993-07-24 2003-02-05 롤프 스트로스만 Electric auxiliary drive for a travelling device primarily driven, in particular drawn or pushed, by human or animal power

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