KR910019213A - Method for manufacturing stacked trench capacitor cells of DRAM - Google Patents

Method for manufacturing stacked trench capacitor cells of DRAM Download PDF

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Publication number
KR910019213A
KR910019213A KR1019900004993A KR900004993A KR910019213A KR 910019213 A KR910019213 A KR 910019213A KR 1019900004993 A KR1019900004993 A KR 1019900004993A KR 900004993 A KR900004993 A KR 900004993A KR 910019213 A KR910019213 A KR 910019213A
Authority
KR
South Korea
Prior art keywords
dram
oxide film
trench capacitor
capacitor cells
stacked trench
Prior art date
Application number
KR1019900004993A
Other languages
Korean (ko)
Other versions
KR930000582B1 (en
Inventor
정재승
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019900004993A priority Critical patent/KR930000582B1/en
Publication of KR910019213A publication Critical patent/KR910019213A/en
Application granted granted Critical
Publication of KR930000582B1 publication Critical patent/KR930000582B1/en

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/038—Making the capacitor or connections thereto the capacitor being in a trench in the substrate
    • H10B12/0387—Making the trench
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음No content

Description

디램의 스택 트렌치 커패시터 셀의 제조방법.A method for manufacturing a stacked trench capacitor cell of a DRAM.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

첨부된 도면(A)는 본 발명 제조후의 설계도, (B)내지 (G)는 (A)의 가-가선 단면도로 본 본발명의 공정순서도이다.The attached drawing (A) is a schematic drawing after manufacture of this invention, (B)-(G) is the process flowchart of this invention seen from the temporary cross-sectional view of (A).

Claims (1)

기판(1)위에 필드 산화막(4) 성장후 폴리 실리콘(2)과 유전체(3)를 형성하여 선택적으로 식각하므로 식각된 부분에 패드 폴리 실리콘(6)이 형성되게 하고, 산화막(7)과 질화막(8) 형성후 트렌치(9)를 형성하여 이 트랜치(9)에 첫번째 스토리지 전극(10)을 형성하며, 산화막(11)형성후 상기 산화막(7)(11)과 질화막(8)을 에치하여 에치된 부분과 산화막(11)위에 두번째 스토리지 전극(13)을 형성하고, 상기 산화막(11) 제거후 유전체(14)를 형성하고 이어서 플레이트 폴리 실리콘(15)을 디포지션 함을 특징으로 하는 디램의 스택 트렌치 커패시터 셀의 제조방법.After the growth of the field oxide film 4 on the substrate 1, the polysilicon 2 and the dielectric 3 are formed and selectively etched so that the pad polysilicon 6 is formed in the etched portion, and the oxide film 7 and the nitride film (8) After the formation of the trench 9, the first storage electrode 10 is formed in the trench 9, and after the oxide film 11 is formed, the oxide films 7 and 11 and the nitride film 8 are etched. The second storage electrode 13 is formed on the etched portion and the oxide film 11, the dielectric 14 is formed after the oxide film 11 is removed, and then the plate polysilicon 15 is deposited. A method of making a stacked trench capacitor cell. ※ 참고사항 : 최초출원내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900004993A 1990-04-11 1990-04-11 Method of fabricating stacked and trench capacitor cell KR930000582B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900004993A KR930000582B1 (en) 1990-04-11 1990-04-11 Method of fabricating stacked and trench capacitor cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900004993A KR930000582B1 (en) 1990-04-11 1990-04-11 Method of fabricating stacked and trench capacitor cell

Publications (2)

Publication Number Publication Date
KR910019213A true KR910019213A (en) 1991-11-30
KR930000582B1 KR930000582B1 (en) 1993-01-25

Family

ID=19297901

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900004993A KR930000582B1 (en) 1990-04-11 1990-04-11 Method of fabricating stacked and trench capacitor cell

Country Status (1)

Country Link
KR (1) KR930000582B1 (en)

Also Published As

Publication number Publication date
KR930000582B1 (en) 1993-01-25

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