KR910017617A - Method of manufacturing a semiconductor wafer - Google Patents

Method of manufacturing a semiconductor wafer Download PDF

Info

Publication number
KR910017617A
KR910017617A KR1019900003074A KR900003074A KR910017617A KR 910017617 A KR910017617 A KR 910017617A KR 1019900003074 A KR1019900003074 A KR 1019900003074A KR 900003074 A KR900003074 A KR 900003074A KR 910017617 A KR910017617 A KR 910017617A
Authority
KR
South Korea
Prior art keywords
manufacturing
semiconductor wafer
trench capacitor
dielectric
breakdown
Prior art date
Application number
KR1019900003074A
Other languages
Korean (ko)
Other versions
KR920007536B1 (en
Inventor
박남규
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019900003074A priority Critical patent/KR920007536B1/en
Publication of KR910017617A publication Critical patent/KR910017617A/en
Application granted granted Critical
Publication of KR920007536B1 publication Critical patent/KR920007536B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

내용 없음No content

Description

반도체 웨이퍼의 제조방법Method of manufacturing a semiconductor wafer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 2도의 (A)는 본 발명의 (100)면을 자른 웨이퍼의 개략도, (B)는 (A)의 Q부분을 이용한 트렌치 패턴도면.2A is a schematic view of a wafer cut from the (100) plane of the present invention, and (B) is a trench pattern drawing using the Q portion of (A).

Claims (1)

트렌치 커패시터의 유전물질로 열산화막(H)을 사용할때(100) 실리콘 웨이퍼의 기준 평면영역(E)을 (100)에 형성하고 트렌치 커패시터의 모서리부분이(110)이 되게 형성하므로 유전체의 브레이크 다운 전압을 높일 수 있게한 반도체 웨이퍼의 제조방법.When the thermal oxide film (H) is used as the dielectric material of the trench capacitor (100), the reference plane region (E) of the silicon wafer is formed at (100), and the corner portion of the trench capacitor is formed to be (110), so that the breakdown of the dielectric A method of manufacturing a semiconductor wafer, which makes it possible to increase the voltage. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900003074A 1990-03-08 1990-03-08 A method of fabricating wafer KR920007536B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900003074A KR920007536B1 (en) 1990-03-08 1990-03-08 A method of fabricating wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900003074A KR920007536B1 (en) 1990-03-08 1990-03-08 A method of fabricating wafer

Publications (2)

Publication Number Publication Date
KR910017617A true KR910017617A (en) 1991-11-05
KR920007536B1 KR920007536B1 (en) 1992-09-05

Family

ID=19296780

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900003074A KR920007536B1 (en) 1990-03-08 1990-03-08 A method of fabricating wafer

Country Status (1)

Country Link
KR (1) KR920007536B1 (en)

Also Published As

Publication number Publication date
KR920007536B1 (en) 1992-09-05

Similar Documents

Publication Publication Date Title
KR870005459A (en) Semiconductor device
KR850000803A (en) Semiconductor devices
KR930005259A (en) Semiconductor device and manufacturing method thereof
KR850001642A (en) Amplifier circuit
KR900003963A (en) Semiconductor device
KR910016061A (en) Semiconductor device and manufacturing method
KR910017617A (en) Method of manufacturing a semiconductor wafer
KR930022601A (en) Manufacturing Method of Semiconductor Device
KR920013776A (en) Field effect transistor
KR900004040A (en) Semiconductor integrated circuit devices
KR910003802A (en) Semiconductor device and manufacturing method
KR900017213A (en) Semiconductor devices
KR900005561A (en) Semiconductor device
KR920022491A (en) Semiconductor device and manufacturing method thereof
KR950021050A (en) Wafer step relaxation method
KR920022385A (en) Semiconductor device having an additional oxide film and method of manufacturing the same
KR920017213A (en) Device isolation method of semiconductor device
KR920015439A (en) Metal contact manufacturing method of semiconductor device
KR950025918A (en) Method for forming conductive film of semiconductor device
KR920020604A (en) Capacitor Manufacturing Method of Semiconductor Device
KR920013600A (en) Method of forming planar isolation region of semiconductor device
KR930014825A (en) Semiconductor Cutting Method
KR920001680A (en) Active separation method of semiconductor integrated device
KR920007146A (en) High voltage transistor
KR850005133A (en) Semiconductor devices

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20020820

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee