KR910010384A - Dot Matrix Control Circuit and Control Method - Google Patents

Dot Matrix Control Circuit and Control Method Download PDF

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Publication number
KR910010384A
KR910010384A KR1019890016543A KR890016543A KR910010384A KR 910010384 A KR910010384 A KR 910010384A KR 1019890016543 A KR1019890016543 A KR 1019890016543A KR 890016543 A KR890016543 A KR 890016543A KR 910010384 A KR910010384 A KR 910010384A
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KR
South Korea
Prior art keywords
terminal
latch
signal
data
dot matrix
Prior art date
Application number
KR1019890016543A
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Korean (ko)
Inventor
최수인
이규선
Original Assignee
김정상
삼성시계 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김정상, 삼성시계 주식회사 filed Critical 김정상
Priority to KR1019890016543A priority Critical patent/KR910010384A/en
Publication of KR910010384A publication Critical patent/KR910010384A/en

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Abstract

내용 없음No content

Description

도트 매트릭스의 제어회로 및 제어방법Dot Matrix Control Circuit and Control Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 원리에 따라 축조한 상세 회로도이다.2 is a detailed circuit diagram constructed in accordance with the principles of the present invention.

Claims (3)

다이나믹 방식과 스태릭 방식을 복합한 다색 LED도트 매트릭스 회로의 제어 회로에 있어서, 각색에 해당하는 16개의 기억부로 이루어지는 메모리부와, 하나이상의 어드레스 단자로부터의 어드레스 신호를 데코딩하는 데코더와, 상기 데코더로 부터의 데코딩된 신호를 일측단자로 수신하고 타측단자가 래치단자에 접속된 하나이상의 AND게이트 회로와, 적색 및 녹색 이네이블 신호에 응답하여 상기 기억부에 저장된 데이터를 출력하도록 적색 및 녹색 이네이블단자에 일측이 접속되고 타측이 대향단자에 접속되는 16개의 게이트로 이루어지는 하나이상의 AND게이트 회로와, 제2클럭단자로 부터의 클록신호를 데코딩하여 해당 도트 매트릭스의 라인을 구동제어하는 데코더들로 구성시킨 제어회로.A control circuit of a multicolor LED dot matrix circuit combining a dynamic method and a static method, comprising: a memory unit consisting of 16 memory units corresponding to various colors, a decoder for decoding address signals from one or more address terminals, and the decoder Receive the decoded signal from the one terminal and output one or more AND gate circuits the other terminal is connected to the latch terminal and output the data stored in the storage in response to the red and green enable signals. One or more AND gate circuits consisting of 16 gates having one side connected to the cable terminal and the other terminal connected to the opposite terminal, and decoders for decoding the clock signal from the second clock terminal to drive and control the line of the dot matrix. Control circuit composed of 제1항에 있어서, 기억부가 16비트 레지스터와 16비트 래치로 구성되어 제1클럭단자로 부터의 클럭 신호에 따라 표시 데이터를 시프트하고, 소정 래치신호에 의해 자체의 래치에 저장하고, 16클럭 이상에서는 다음 기억부로 데이터가 시프트되게 한 제어회로.A storage unit according to claim 1, wherein the storage unit is composed of a 16-bit register and a 16-bit latch to shift the display data in accordance with a clock signal from the first clock terminal, store it in its own latch by a predetermined latch signal, and store at least 16 clocks. Is a control circuit which causes data to be shifted to the next storage unit. 다이나믹 방식과 스태릭 방식을 복합한 다색 LED매트릭스 회로의 제어방법에 있어서, 제1클럭신호에 따라 데이터를 각 그룹의 레지스터에 입력하는 단계와, 어드레스 신호를 데코딩시켜 AND게이트에 인가하고 동시에 AND게이트에 인가되는 래치신호에 따라 해당 16비트의 시프트레지스터의 데이터를 래치에 저장하는 단계와, 적색 이네이블 신호 및 녹색 이네이블 신호가 각 그룹의 해당 래치에 인가되는 단계와, 제2의 클럭 신호를 데코딩하여 도트 매트릭스의 해당 라인을 구동제어하는 단계와, 데이터 표시중에 상기의 데이터 저장을 할 수 있게 한 단계들로 구성시킨 제어방법.A method of controlling a multicolor LED matrix circuit combining a dynamic method and a static method, the method comprising: inputting data into a register of each group according to a first clock signal, and encoding and applying an address signal to an AND gate and simultaneously Storing data of the 16-bit shift register in a latch according to a latch signal applied to the gate; applying a red enable signal and a green enable signal to the corresponding latch of each group; and a second clock signal. And controlling driving of the corresponding line of the dot matrix by decoding the same; and storing the data during data display. ※참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is to be disclosed based on the initial application.
KR1019890016543A 1989-11-15 1989-11-15 Dot Matrix Control Circuit and Control Method KR910010384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890016543A KR910010384A (en) 1989-11-15 1989-11-15 Dot Matrix Control Circuit and Control Method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890016543A KR910010384A (en) 1989-11-15 1989-11-15 Dot Matrix Control Circuit and Control Method

Publications (1)

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KR910010384A true KR910010384A (en) 1991-06-29

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890016543A KR910010384A (en) 1989-11-15 1989-11-15 Dot Matrix Control Circuit and Control Method

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KR (1) KR910010384A (en)

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