KR910005628A - Link path test method of digital exchange - Google Patents

Link path test method of digital exchange Download PDF

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Publication number
KR910005628A
KR910005628A KR1019890012180A KR890012180A KR910005628A KR 910005628 A KR910005628 A KR 910005628A KR 1019890012180 A KR1019890012180 A KR 1019890012180A KR 890012180 A KR890012180 A KR 890012180A KR 910005628 A KR910005628 A KR 910005628A
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KR
South Korea
Prior art keywords
link means
switch device
time switch
test
maintenance unit
Prior art date
Application number
KR1019890012180A
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Korean (ko)
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KR920002905B1 (en
Inventor
오돈성
강구홍
박권철
Original Assignee
경상현
재단법인 한국전자통신연구소
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Priority to KR1019890012180A priority Critical patent/KR920002905B1/en
Publication of KR910005628A publication Critical patent/KR910005628A/en
Application granted granted Critical
Publication of KR920002905B1 publication Critical patent/KR920002905B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q1/00—Details of selecting apparatus or arrangements
    • H04Q1/18—Electrical details
    • H04Q1/20—Testing circuits or apparatus; Circuits or apparatus for detecting, indicating, or signalling faults or troubles
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

내용 없음No content

Description

디지틀 교환기의 링크 경로 시험 방법Link path test method of digital exchange

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 타임스위치 장치와 공간스위치 간의 하디웨이적 경로도.1 is a hard path diagram between a time switch device and a space switch.

제2도 및 제3도는 본 발명의 시험 흐름도.2 and 3 are test flow charts of the present invention.

Claims (1)

시험 및 유지보수 유니트(TTMA), 상기 시험 및 유지보수 유니트(TTMA)를 각각 구비하고 있는 복수의 타임스위치 장치(TSWO 내지 TSWn) 상기 시험 및 유지보수 유니트(TTMA)에 연결되어 상기 타임스위치장치를 제어하기 위한 복수의 타임스위치 프로세서(TSPO 내지 TSPn), 공간 스위치 장치(SSW), 및 상기 타임스위치 장치 및 공간 스위치 장치를 서로 연결하는 송신링크 수단(Tx)과 수신링크수단(Rx)을 구비하고 있는 디지틀 전자 교환기에 있어서, 상기 프로세서가 링크 경로중 상기 송신링크 수단(Tx)을 연결하기 위해 상기 타임스위치 장치와 공간 스위치 장치간의 상기 송신링크 수단(Tx) 채널번호를 할당하고 상기 타임스위치 프로세서(TSP)는 상기 타임스위치 장치(TSW)의 상기 시험 및 유지보수 유니트(TTMA)를 통해 자체 경로 및 상기 시험 및 유지보수 유니트를 시험하는 제1단계와, 상기 제1단계에서의 상태 판단을 한 후 정상이면 상기 송신링크 수단(Tx)을 연결하고 비정상이면 종료하는 제2단계, 상위 프로세서가 링크경로 중 상기 수신링크수단(Rx)을 연결하기 위해 상기 타임스위치 장치(TSW)과 공간스위치장치(SSW)간 수신링크수단(Rx) 채널번호를 할당하고 상기 타임스위치 프로세서(TSP)는 상기 시험 및 유지보수 유니트(TTMA)를 통해 자체 경로 및 상기 시험 및 유지보수 유니트(TTMA)를 시험하는 제3단계, 상기 제3단계에서의 상태 판단을 한 후 정상이면 상기 수신링크수단(Rx)을 연결하고 비정상이면 종료하는 제4단계, 상기 송신링크 수단(Tx) 및 상기 수신링크수단(Rx)을 통해 전송되는 패턴데이터를 해당 타임스위치 장치(TSW)의 시험 및 유지보수 유니트(TTMA)를 통해 수신하여 비교하고 그 결과를 상위 프로세서에 보고하고 상위 프로세서로 부터 상기 수신링크수단(Rx)의 경로 해제 요구 없이 자동적으로 해제하는 제5단계, 및 상위프로세서로 부터의 송신 링크 수단(Tx)의 경로 해제 요구에 의해 패턴 데이터를 발생시킨 타임스위치 장치(TSW)가 상기 송신 송신링크 수단(Tx)을 해제하는 제6단계로 구성된 것을 특징으로 하는 디지틀전자교환기의 링크 경로 시험방법.A plurality of time switch devices (TSWO to TSWn) each having a test and maintenance unit (TTMA) and the test and maintenance unit (TTMA) are connected to the test and maintenance unit (TTMA) to connect the time switch device. A plurality of time switch processors (TSPO to TSPn), a space switch device (SSW) for controlling, and a transmission link means (Tx) and a reception link means (Rx) for connecting the time switch device and the space switch device to each other; In the digital electronic switch, the processor allocates the transmission link means (Tx) channel number between the time switch device and the space switch device to connect the transmission link means (Tx) in the link path and the time switch processor ( TSP tests its path and the test and maintenance unit via the test and maintenance unit (TTMA) of the time switch device (TSW). A first step and a second step of connecting the transmission link means Tx if it is normal after determining the state in the first step and terminating if it is abnormal, and the higher processor disconnects the receiving link means Rx from the link path. To connect, assign a receiving link means (Rx) channel number between the time switch device (TSW) and the space switch device (SSW) and the time switch processor (TSP) has its own path through the test and maintenance unit (TTMA). And a third step of testing the test and maintenance unit (TTMA), a fourth step of connecting the receiving link means Rx if normal after determining the state in the third step, and terminating if abnormal. The pattern data transmitted through the link means Tx and the receiving link means Rx are received and compared through the test and maintenance unit TTMA of the corresponding time switch device TSW, and the results are reported to the upper processor.A fifth step of automatically releasing the path without the path release request of the receiving link means Rx from the upper processor, and a time switch device generating pattern data by the path release request of the transmission link means Tx from the higher processor; And a sixth step (TSW) of releasing said transmission transmission link means (Tx). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890012180A 1989-08-26 1989-08-26 Link channel testing method of digital exchanger KR920002905B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890012180A KR920002905B1 (en) 1989-08-26 1989-08-26 Link channel testing method of digital exchanger

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890012180A KR920002905B1 (en) 1989-08-26 1989-08-26 Link channel testing method of digital exchanger

Publications (2)

Publication Number Publication Date
KR910005628A true KR910005628A (en) 1991-03-30
KR920002905B1 KR920002905B1 (en) 1992-04-06

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Application Number Title Priority Date Filing Date
KR1019890012180A KR920002905B1 (en) 1989-08-26 1989-08-26 Link channel testing method of digital exchanger

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100267848B1 (en) * 1997-06-13 2000-10-16 윤종용 Method for testing voice path in full electronic exchange system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100267848B1 (en) * 1997-06-13 2000-10-16 윤종용 Method for testing voice path in full electronic exchange system

Also Published As

Publication number Publication date
KR920002905B1 (en) 1992-04-06

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