KR910003665Y1 - Trapezoid distortion control circuit for crt - Google Patents

Trapezoid distortion control circuit for crt Download PDF

Info

Publication number
KR910003665Y1
KR910003665Y1 KR2019860005561U KR860005561U KR910003665Y1 KR 910003665 Y1 KR910003665 Y1 KR 910003665Y1 KR 2019860005561 U KR2019860005561 U KR 2019860005561U KR 860005561 U KR860005561 U KR 860005561U KR 910003665 Y1 KR910003665 Y1 KR 910003665Y1
Authority
KR
South Korea
Prior art keywords
resistor
output
operational amplifier
trapezoidal distortion
inverting input
Prior art date
Application number
KR2019860005561U
Other languages
Korean (ko)
Other versions
KR870017511U (en
Inventor
김연동
Original Assignee
주식회사 금성사
구자학
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사, 구자학 filed Critical 주식회사 금성사
Priority to KR2019860005561U priority Critical patent/KR910003665Y1/en
Publication of KR870017511U publication Critical patent/KR870017511U/en
Application granted granted Critical
Publication of KR910003665Y1 publication Critical patent/KR910003665Y1/en

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/23Distortion correction, e.g. for pincushion distortion correction, S-correction
    • H04N3/233Distortion correction, e.g. for pincushion distortion correction, S-correction using active elements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18Generation of supply voltages, in combination with electron beam deflecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

내용 없음.No content.

Description

모니터의 사다리꼴 왜곡 보정회로Monitor trapezoidal distortion correction circuit

제 1 도는 본 고안의 회로도.1 is a circuit diagram of the present invention.

제 2 도는 본 고안 회로 각부의 신호 파형도.2 is a signal waveform diagram of each part of the circuit of the present invention.

제 3 도는 사다리꼴 왜곡 현상과 보정된 화면의 개략 구성도.3 is a schematic diagram of trapezoidal distortion and a corrected screen.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

OP1, OP2, OP3: 연산증폭기 R1~R11: 저항OP 1 , OP 2 , OP 3 : Operational Amplifiers R 1 to R 11 : Resistance

R6: 가변저항 2 : 수평출력회로R 6 : Variable resistor 2: Horizontal output circuit

C1, C2, C3: 콘덴서 D2: 제너다이오드C 1 , C 2 , C 3 : Condenser D 2 : Zener Diode

본 고안은 모니터 화면에 나타나는 사다리꼴 왜곡 또는 역사다리꼴 왜곡 현상을 보정하여 직사각형의 정상화면이 표시되도록한 모니터의 사다리꼴 왜곡 보정회로 구성에 관한 것이다.The present invention relates to the configuration of a trapezoidal distortion correction circuit of a monitor to correct a trapezoidal distortion or an inverse trapezoidal distortion appearing on a monitor screen so that a rectangular normal screen is displayed.

종래에는 모니터화면의 사다리꼴왜곡현상을 보정해주기 위하여 브라운관 뒷면에 수평 또는 수직편향코일주변에 링마그네트나 바마그네트를 부착시켜 편향전류의 자계를 바꾸어주므로서 자계적으로 사다리꼴왜곡을 보정하였으나 이는 흑백이나 단색모니터에는 보정이 용이하지만 칼라모니터의 경우에는 화면의 콘버젼스나 순도 또는 초점이 민감하게 변화되기 때문에 이러한 특성이 나빠지게 되어 사다리꼴 왜곡을 보정하기가 매우 까다롭고 정밀을 요하게 되어 정확한 사다리꼴 왜곡보정이 어려웠던 문제점이 있었다. 본 고안은 이와같은 문제점을 해결하기 위하여 모니터의 수평편향코일에 직접 사다리골왜곡 보정전류를 흘려주므로서 화면의 콘버젼스 및 퓨러리에 영향을 주지않고 간단히 사다리꼴 왜곡을 정확히 보정할 수 있도록한 것이다. 본 고안의 구성은 제 1 도에 도시된 바와같이 수직편향코일(L1)에 연결된 수직출력콘덴서(C1)의 단자(-)로부터 콘덴서(C2)와 저항(R1)을 통해 연산증폭기(OP1)의 반전입력단자(-)에 연결하고, 연산증폭기(OP1)의 출력은 저항(R5)을 통해 사다리꼴왜곡 보정용 가변저항(R6)일단에 연결함과 동시에 저항(R3)을 통해 연산증폭기(OP2)의 반전입력단자(-)에 연결하여 그 출력은 저항(R7)을 통해 가변저항(R6)타단에 연결하고, 가변저항(R6)의 중간단자는 저항(R8)과 콘덴서(C4)를 통해 연산증폭기(OP3)의 비반전입력단자(+)에 연결하며, 연산증폭기(OP3)의 출력은 저항(R11)을 통해 수평편향 전압조정단(1)에 연결하고, 수평 편향전압조정단(1)의 출력은 쵸크코일(L2)을 통해 수평 출력회로(2)의 수평편향코일(L3)에 연결하되 각 연산증폭기(OP1, OP2, OP3)의 비반전입력단자(+)에는 공통으로 제너다이오드(D2)와 저항(R10)에 의해 설정된 기준전압이 인가되도록 하여서 된 것으로서, 도면중 미설명 부호 VCC는 비교기준전압설정용 전원, R2, R4, R9은 저항, C3, C7, C7S은 콘덴서, D1는 다이오드, Q1는 수평출력트랜지스터이다.Conventionally, in order to correct trapezoidal distortion of the monitor screen, ring magnets or bar magnets are attached to the horizontal or vertical deflection coils on the back of the CRT to change the magnetic field of the deflection current. It is easy to calibrate the monitor, but in the case of color monitors, the convergence, purity, or focus of the screen is sensitively changed, which makes these characteristics deteriorate and it is very difficult to correct the trapezoidal distortion. There was a problem. In order to solve this problem, the present invention allows the trapezoidal distortion correction current to flow directly into the horizontal deflection coil of the monitor so that the trapezoidal distortion can be accurately corrected without affecting the convergence and the screen. . As shown in FIG. 1 , the present invention has an operational amplifier through a capacitor (C 2 ) and a resistor (R 1 ) from a terminal (−) of a vertical output capacitor (C 1 ) connected to a vertical deflection coil (L 1 ). the inverting input terminal of the (OP 1) (-) at the same time also connected to, and the output of the operational amplifier (OP 1) has a resistance (R 5) trapezoidal distortion correction variable resistor (R 6) one end connected to via the resistor (R 3 ) Is connected to the inverting input terminal (-) of the operational amplifier (OP 2 ), and its output is connected to the other end of the variable resistor (R 6 ) through the resistor (R 7 ), and the middle terminal of the variable resistor (R 6 ) It is connected to the non-inverting input terminal (+) of the operational amplifier OP 3 through the resistor R 8 and the capacitor C 4 , and the output of the operational amplifier OP 3 is connected to the horizontal deflection voltage through the resistor R 11 . The output of the horizontal deflection voltage adjustment stage 1 is connected to the horizontal deflection coil L 3 of the horizontal output circuit 2 through the choke coil L 2 , and each operational amplifier OP 1, OP 2, OP 3) The non-inverting input terminal (+) is common to the Zener diode (D 2) and as a hayeoseo so that the reference voltage is set by a resistor (R 10), the drawing reference numeral V CC compares the reference voltage setting the power supply for one, R 2 , R 4 and R 9 are resistors, C 3 , C 7 and C 7S are capacitors, D 1 is a diode and Q 1 is a horizontal output transistor.

본 고안의 작용효과는 제 1 도에서와 같이 수직편향코일(L1)거쳐 수직출력콘덴서(C1)의 단자(-)에서 인출된 제 2a 도의 파형과 같은 톱니파는 콘덴서(C2)로 직류성분이 성분이 차단되어 저항(R1)을 통해 연산증폭기(OP1)의 반전입력단자(-)에 가해지게 된다. (제 2b 도) 따라서 연산증폭기(OP1)의 출력에서는 제 2b 도의 신호가 반전증폭되어 제 2c 도의 파형과 같은 신호가 출력되고 이 신호는 연산증폭기(OP2)를 통해 반전등폭되어 제 2d 도와 같은 파형의 신호가 연산증폭기(OP2)에서 출력된다. 이 제 2d 도의 신호는 저항(R7)을 통해 사다리꼴 왜곡보정용 가변저항(R6)타단에 인가되어 가변저항(R6)일단에 저항(R5)을 통해 인가된 제 2c 도의 파형과 합성된 신호가 가변저항(R6)중간단자에서 인출되게 되는 것이다.Action and effect of the present design is the vertical deflection coil (L 1) via terminals of a vertical output capacitor (C 1), as shown in FIG. 1 (-) saw-tooth, such as the first 2a degrees waveform drawn from the DC to the capacitor (C 2) The component is blocked and is applied to the inverting input terminal (−) of the operational amplifier OP 1 through the resistor R 1 . Accordingly, at the output of the operational amplifier OP 1 , the signal of FIG. 2b is inverted and amplified and the same signal as that of the waveform of FIG. 2c is output. The signal is inverted and widened through the operational amplifier OP 2 to generate the second signal. Signals of the same waveform are output from the operational amplifier OP 2 . The signal of FIG. 2d is applied to the other end of the trapezoidal distortion correction variable resistor R 6 through the resistor R 7 and synthesized with the waveform of FIG. 2c applied through the resistor R 5 to one end of the variable resistor R 6 . The signal is drawn from the intermediate terminal of the variable resistor (R 6 ).

따라서 이 합성된 신호는 저항(R8)을 통해 콘덴서(C4)에서 직류 성분이 차단되어 제 2e 또는 e' 도와 같은 파형의 신호가 연산증폭기(OP3)의 비반전입력단자(+)에 인가되게 된다.Therefore, the synthesized signal is cut off from the DC component in the capacitor C 4 through the resistor R 8 so that a signal having a waveform such as 2e or e 'degree is applied to the non-inverting input terminal (+) of the operational amplifier OP 3 . To be authorized.

그런데 연산증폭기(OP3)는 에미터폴로워로 동작되게 되어 있으므로 제 2e 또는 e' 도와 같은 파형의 신호가 그대로 출력되어 저항(R11)을 통해 수평편향 전압조정단(1)에 입력되는데 수평편향진압조정단(1)은 공지의 전원전압 조정용회로이므로 그 출력에서는 제 2f 또는 f' 도와 같은 파형의 신호가 출력되어 쵸크코일(L2)을 통해 기존의 수평출력회로(2)에 가해지게 되는 것이다. 따라서 연산증폭기(OP3)의 출력파형에 따라 수평편향코일(L3)에 적절한 보정 전류를 흘려줄 수 있게 되는 것이다.However, since the operational amplifier OP 3 is operated by an emitter follower, a signal having a waveform such as 2e or e 'is output as it is and input to the horizontal deflection voltage adjusting stage 1 through the resistor R 11 . Since the deflection suppression adjusting stage 1 is a known power supply voltage adjusting circuit, a signal having a waveform such as a second f or f 'degree is output from the output and applied to the existing horizontal output circuit 2 through the choke coil L 2 . Will be. Therefore, according to the output waveform of the operational amplifier (OP 3 ) it is possible to flow the appropriate correction current to the horizontal deflection coil (L 3 ).

그런데 제 2e 또는 e' 도나, f 또는 f' 도의 신호는 가변저항(R6)을 조절함에 따라 제 2c 또는 d 도의 파형이 합성되어 생기게 되는 것이므로 만약 제 2e 또는 f 도와 같은 파형이 되었을 경우에는 제 3a 도와 같은 역사다리꼴왜곡이 생기게 된다.However, if the 2e or e 'or f or f' signal is generated by synthesizing the waveforms of the 2c or d degree by adjusting the variable resistor R 6 , Historical trapezoidal distortions such as 3a occur.

따라서 이 두 경우에 있어서 가변저항(R6)값을 적절히 조정하여 주면 가변저항(R6)의 중간단자에서 인출되는 제 2e 또는 e' 도나, f 또는 f' 도와 같은 합성십호파형이 변화하게 되어 이 합성신호파에 의해 제 3a' 및 b' 도와 같이 사다리꼴 왜곡을 보정하여 직사각형의 화면을 얻을 수 있게 되는 것이다. 즉, 제 2e 또는 f 도와 같은 파형에 의해 제 3a 도와 같은 역사다리꼴왜곡이 생겼을 때에는 가변저항(R6)중간단자에서 인출되는 파형을 가변저항(R6)을 조절하여 제 2e' 또는 f' 도와 같은 합성파형에 근접시키면 제 3a 도와 같이 화면 상단이 넓고 하단이 좁은 역사다리꼴왜곡이 b 도와 같은 화면상단이 좁고 하단이 넓은 사다리꼴왜곡에 의한 화면 형태로 점진적으로 변화될 것이므로 소정의 순간에는 화면의 상, 하단에 동일한 간격인 제 3a' 도의 보정된 화면이 표시되게 되는 것이다.Therefore, in these two cases, if the value of the variable resistor R 6 is properly adjusted, the synthesized sign waveform such as the second e or e 'degree or the f or f' degree drawn from the intermediate terminal of the variable resistor R 6 is changed. The synthesized signal waves can be used to correct trapezoidal distortion as in the 3a 'and b' degrees to obtain a rectangular screen. That is, 2e or f when the help claim 3a help of inverted trapezoidal distortion by the waveform occurs in the waveform that is drawn from the variable resistor (R 6) intermediate terminal controls the variable resistor (R 6) of claim 2e 'or f' help Closer to the same synthetic waveform, the wider top and narrower bottom of the screen like the 3a diagram will be gradually changed to the screen form by the trapezoidal distortion of the top and narrow bottom of the screen, such as b. The corrected screen of FIG. 3A ', which is the same interval, is displayed at the bottom.

또한 제 2e' 또한 f' 도와 같은 파형에 의해 제 3b 도와 같은 사다리꼴 왜곡이 생겼을 때에도 가변저항(R6)을 조절하여 제 3b' 도와 같이 보정된 화면을 얻을 수 있게 되는데 이의 작용은 상기한 작용의 역과정에 해당되는 것이다.In addition, even when the trapezoidal distortion of the 3b degree is generated by the waveforms of the 2e 'and the f' degree, the variable resistor R 6 can be adjusted to obtain the corrected screen as the 3b 'degree. It is the reverse process.

이와같이 본 고안에 의하면 모니터 화면의 사다리꼴왜곡현상을 가변저항 하나로 간단히 보정할 수 있으므로 편리하고 조정작업에 따른 화면의 접속이나 순도 및 초점이 틀려지는 현상이 없게 되어 제품의 성능향상을 도모할 수 있게 된 것이다.Thus, according to the present invention, since the trapezoidal distortion of the monitor screen can be easily corrected with a single variable resistor, it is convenient and there is no phenomenon that the screen is not connected or the purity and focus are not changed due to the adjustment work, thereby improving the performance of the product. will be.

Claims (1)

수직편향코일(L1)에 연결된 수직 출력콘덴서(C1)의 단자(-)로부터 콘덴서(C2)와 저항(R1)을 통해 연산증폭기(OP1)의 반전 입력단자(-)에 연결하고, 연산증폭기(OP1)의 출력은 저항(R5)을 통해 사다리꼴왜곡보정용 가변저항(R6)일단에 연결함과 동시에 저항(R3)을 통해 연산증폭기(OP2)의 반전입력단자(-)에 연결하여 그 출력은 저항(R7)을 통해 가변저항(R6)타단에 연결되고, 가변 저항(R6)의 중간단자는 저항(R8)과 콘덴서(C4)를 통해 연산증폭기(OP3)의 비반전입력단자(+)에 연결하며, 연산증폭기(OP3)의 출력은 저항(R11)을 통해 수평 편향 전압조정단(1)에 연결하고, 수평편향전압조정단(1)의 출력은 쵸크코일(L2)을 통해 수평출력회로(2)의 수평편향코일(L3)에 연결하되, 각 연산증폭기(OP1, OP2, OP3)의 비반전입력단자(+)에는 공통으로 제너다이오드(D2)와 저항(R10)에 의해 설정된 기준 전압이 인가되도록 하여서 된 모니터의 사다리꼴 왜곡 보정회로.From the terminal (-) of the vertical output capacitor (C 1 ) connected to the vertical deflection coil (L 1 ) to the inverting input terminal (-) of the operational amplifier (OP 1 ) through the capacitor (C 2 ) and the resistor (R 1 ). The output of the operational amplifier OP 1 is connected to one end of the trapezoidal distortion correction variable R 6 through the resistor R 5 and at the same time, the inverting input terminal of the operational amplifier OP 2 through the resistor R 3 . And the output is connected to the other end of the variable resistor (R 6 ) through the resistor (R 7 ), the middle terminal of the variable resistor (R 6 ) through the resistor (R 8 ) and the capacitor (C 4 ) connected to the non-inverting input terminal (+) of the operational amplifier (OP 3), and the output of the operational amplifier (OP 3) is connected to the horizontal deflection voltage control stage (1) via a resistor (R 11), and a horizontal deflection voltage control The output of stage (1) is connected to the horizontal deflection coil (L 3 ) of the horizontal output circuit (2) through the choke coil (L 2 ), but the non-inverting input of each operational amplifier (OP 1 , OP 2 , OP 3 ) Zener die in common to terminal (+) A trapezoidal distortion correction circuit of a monitor in which a reference voltage set by the odd (D 2 ) and the resistor (R 10 ) is applied.
KR2019860005561U 1986-04-23 1986-04-23 Trapezoid distortion control circuit for crt KR910003665Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019860005561U KR910003665Y1 (en) 1986-04-23 1986-04-23 Trapezoid distortion control circuit for crt

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019860005561U KR910003665Y1 (en) 1986-04-23 1986-04-23 Trapezoid distortion control circuit for crt

Publications (2)

Publication Number Publication Date
KR870017511U KR870017511U (en) 1987-11-30
KR910003665Y1 true KR910003665Y1 (en) 1991-05-31

Family

ID=19251021

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019860005561U KR910003665Y1 (en) 1986-04-23 1986-04-23 Trapezoid distortion control circuit for crt

Country Status (1)

Country Link
KR (1) KR910003665Y1 (en)

Also Published As

Publication number Publication date
KR870017511U (en) 1987-11-30

Similar Documents

Publication Publication Date Title
US3646393A (en) Linear sawtooth scan generator utilizing negative feedback and miller integration
KR910003665Y1 (en) Trapezoid distortion control circuit for crt
US4871951A (en) Picture display device including a line synchronizing circuit and a line deflection circuit
US4233547A (en) Color television display device comprising a deflection coil unit provided with a deflection coil for the vertical deflection and deflection coil unit for such a display device
US3956668A (en) Vertical deflection circuit
KR910003667Y1 (en) Picture side compensating and horizontal picture width control circuit
KR950000824Y1 (en) Horizontal size stabilization circuit for monitor
KR910009210Y1 (en) Deflection distortin compensating circuit
US4771217A (en) Vertical deflection circuit for a cathode-ray tube having a vertical image-position adjustment circuit
JPH05259748A (en) Video output circuit
KR930004816Y1 (en) Blanking circuit for tv
JPH0753105Y2 (en) Vertical raster centering circuit
KR920000102Y1 (en) Horizontal linearity compensating circuit
KR920005055Y1 (en) Vertical line compensating circuit
KR0120299Y1 (en) Side pincushion correcting circuit for flat type crt
KR910003675Y1 (en) Distortion compensating circuit for large crt
KR890007508Y1 (en) Rgb bias variable circuits crt
KR950002322B1 (en) Picture compensating circuit for monitor
KR910003676Y1 (en) Up-down pin distortion ratio compensating circuit
JP2931713B2 (en) Clamp circuit
JP2553693B2 (en) Clamp circuit
KR910003663Y1 (en) Deflection distortion compensating circuit
JP2502960Y2 (en) Horizontal deflection circuit for cathode ray tube tester
KR0119362Y1 (en) The horizontal linear compensation circuit of multi synchronizing monitor
KR900002303Y1 (en) In-put level control circuits of display devices

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19991224

Year of fee payment: 10

EXPY Expiration of term