KR910000957Y1 - Frequency comparateing circuit - Google Patents
Frequency comparateing circuit Download PDFInfo
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- KR910000957Y1 KR910000957Y1 KR2019870013418U KR870013418U KR910000957Y1 KR 910000957 Y1 KR910000957 Y1 KR 910000957Y1 KR 2019870013418 U KR2019870013418 U KR 2019870013418U KR 870013418 U KR870013418 U KR 870013418U KR 910000957 Y1 KR910000957 Y1 KR 910000957Y1
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- frequency
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- motor
- circuit
- time constant
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P7/00—Arrangements for regulating or controlling the speed or torque of electric DC motors
- H02P7/06—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current
- H02P7/18—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power
- H02P7/24—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices
- H02P7/28—Arrangements for regulating or controlling the speed or torque of electric DC motors for regulating or controlling an individual dc dynamo-electric motor by varying field or armature current by master control with auxiliary power using discharge tubes or semiconductor devices using semiconductor devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B15/00—Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
- G11B15/18—Driving; Starting; Stopping; Arrangements for control or regulation thereof
- G11B15/46—Controlling, regulating, or indicating speed
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Electric Motors In General (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 실시 회로도.1 is an implementation circuit diagram of the present invention.
제2도는 제1도의 각 부에서의 전압파형도.FIG. 2 is a voltage waveform diagram in various parts of FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
ND1,ND2 : 슈미트 동작형 낸드게이트 MM1,MM2 : 단안정멀티바이브레이터ND1, ND2: Schmitt-operated NAND gate MM1, MM2: Monostable multivibrator
LF1,LF2 : 저역 여파기 CM1 : 비교기LF1, LF2: Low pass filter CM1: Comparator
R1-R5 : 저항 C1-C4 : 콘덴서R1-R5: Resistor C1-C4: Capacitor
본 고안은 모우터, 특히 씨디피(Compact Disc Player)의 디스크모우터, 또는 브이티알의 드럼모우터등의 회전수 제어용 주파수 비교회로에 관한 것이다.The present invention relates to a frequency comparison circuit for controlling the speed of a motor, in particular a disc motor of a CD disc, or a drum motor of VTIAL.
주파수 비교회로는 모우터의 회전수를 일정하게 제어하여 주기 위한 회로로서, 모우터의 회전체에서 샘플링되는 펄스주파수를 일정한 기준 주파수와 비교하고, 비교된 출력을 피이드 백 시킴에 의해 모우터의 회전체 속도를 제어하게 된다.The frequency comparison circuit is a circuit for controlling the number of revolutions of the motor constantly.The frequency of the motor is compared by comparing the pulse frequency sampled by the motor's rotor with a constant reference frequency and feeding back the compared output. You will control the overall speed.
종래의 주파수 비교회로는 계수기를 이용하여 펄스의 폭을 계수하는 방법과 위상 제어루프를 이용하는 방법등이 있으나 계수기의 계수클럭이 상당한 고주파이므로 별도의 발진회로가 필요하고, 이 발진부의 디지털노이즈에 의해 주변회로에 노이즈가 발생될 우려가 있으며 복잡해지는 등의 폐단이 있었다.Conventional frequency comparison circuits have a method of counting pulse widths using a counter and a method of using phase control loops. However, since the counter clock of the counter is quite high frequency, a separate oscillation circuit is required. There is a fear that noise may be generated in the peripheral circuit, and there is a closure such as complexity.
본 고안의 목적은 이와 같은 폐단을 해결하기 위한 것으로, 비교하고자 하는 두 신호원을 직류형태로 변환하고 단안정멀티바이브레이터를 이용하여 입력신호의 주파수에 비례하는 직류전압을 발생시켜 범용비교기로 비교하도록된 모우터의 회전수 제어용 주파수 비교회로를 제공하기 위한 것이다.The purpose of the present invention is to solve the above-mentioned shortcomings. The two signal sources to be compared are converted into a direct current form, and a monostable multivibrator is used to generate a direct current voltage proportional to the frequency of the input signal to be compared with a general purpose comparator. It is to provide a frequency comparison circuit for controlling the rotational speed of the motor.
이하 첨부도면에 의해 본 고안의 구성 및 작용효과를 상세히 설명한다.Hereinafter, the configuration and the effect of the present invention by the accompanying drawings will be described in detail.
비교하고자 하는 두 신호원(F1)(F2)이 슈미트 동작형 낸드게이트(ND1)(ND2)에 각각 인가되게 연결하고, 이 슈미트 동작형 낸드게이트(ND1)(ND2) 출력이 단안정멀티바이브레이터(MM1)(MM2)의 각 클럭단자(CK)에 각각 인가되게 연결하며, 이 단안정멀티바이브레이터(MM1)(MM2)의 각 시정수 설정단자(T1)(T2)에 동일한 시정수를 갖는 콘덴서(C3),(C4) 및 저항(R3),(R4)을 각각 연결하고, 상기 단안정멀티바이브레이터(MM1)(MM2)의 각 출력이 저항(R1),(R2) 및 콘덴서(C1),(C2)로 된 저역여파기(LF1)(LF2)에 각각 인가되게 연결하며, 이들 저역여파기(LF1)(LF2)의 각 출력이 비교기(CM1)의 비반전입력단(+) 및 반전입력단(-)에 각각 연결되게 연결하고, 이 비교기(CM1)의 출력이 풀업저항(R5)을 매개하여 B+ 전원이 인가되는 출력단(OT)에 인가되게 연결하여 구성된다.The two signal sources F1 and F2 to be compared are connected to the Schmitt-operated NAND gates ND1 and ND2, respectively, and the outputs of the Schmitt-operated NAND gates ND1 and ND2 are monostable multivibrators. A capacitor which is connected to each clock terminal CK of the MM1 and the MM2, respectively, and has a same time constant for each time constant setting terminal T1 and T2 of the monostable multivibrator MM1 and MM2. C3), (C4) and resistors (R3), (R4) are respectively connected, and each output of the monostable multivibrator (MM1) (MM2) is a resistor (R1), (R2) and capacitor (C1), ( C2) is connected to the low pass filter LF1 and LF2, respectively, and each output of the low pass filter LF1 and LF2 is connected to the non-inverting input terminal (+) and the inverting input terminal (-) of the comparator CM1. Each of them is connected to each other, and the output of the comparator CM1 is connected to the output terminal OT to which the B + power is applied through the pull-up resistor R5.
이와 같이 구성되는 본 고안에 있어서, 일정 주파수의 기준신호원(F1)과 비교하고자 하는 신호, 즉 모우터의 회전체에서 샘플링되는 신호원(F2)은 제2a도 및 (b)와 같은 사인파가 되며, 이들 신호원은 슈미트 동작형 낸드게이트(ND1)(ND2)에 각각 인가된다. 따라서, 이 슈미트 동작형 낸드게이트(ND1)(ND2)를 통해서는 제2c도 및 (d)와 같은 구형파 파형이 각각 출력되어 단안정멀티바이브레이터(MM1)(MM2)의 클럭단자(CK)에 각각 인가된다.In the present invention configured as described above, the signal to be compared with the reference signal source F1 of a predetermined frequency, that is, the signal source F2 sampled by the rotating body of the motor, has a sine wave as shown in FIGS. These signal sources are applied to the Schmitt-operated NAND gates ND1 and ND2, respectively. Therefore, square wave waveforms as shown in Figs. 2c and (d) are output through the Schmitt-operated NAND gates ND1 and ND2, respectively, to the clock terminals CK of the monostable multivibrator MM1 and MM2, respectively. Is approved.
이때, 단안정멀티바이브레이터(MM1)(MM2)의 시정수(t)와 두 신호원(F1)(F2)의 최소주파수(f min)와의 관계는 단안정멀티바이브레이터(MM1)(MM2)의이 되고, 저항(R3)(R4) 및 콘덴서(C3)(C4)가 각각 동일한 값을 가지도록 저항(R3)(R4) 및 콘덴서(C3)(C4)를 설정하면, 이들 단안정멀티바이브레이터(MM1)(MM2)의 시정수는 같은 값을 가지게 되므로 이들의 출력은 제2e도 및 (f)와 같은 파형이 각각 출력되어 저역여파기(LF1)(LF2)에 각각 인가된다.At this time, the relationship between the time constant t of the monostable multivibrator MM1 and MM2 and the minimum frequency f min of the two signal sources F1 and F2 is determined by the monostable multivibrator MM1 and MM2. When the resistors R3, R4, and C3, C4 are set such that the resistors R3, R4, and C3, C4 have the same value, these monostable multivibrators ( Since the time constants of MM1 and MM2 have the same value, their outputs are respectively outputted to the low-pass filters LF1 and LF2, as shown in FIGS. 2E and 2F.
한편, 각 저역여파기(LF1)(LF2)의 구성소자에 있어서, 저항(R1) X 콘덴서(C1) = 저항(R2) X 콘덴서(C2) 〉 신호원(F1)(F2)의 최대주파수(f max)가 되게 저항(R1)(R2) 및 콘덴서(C1)(C2)를 설정하면, 이들 저역여파기(LF1)(LF2)의 출력은 각각 제2g도 및 (h)와 같은 직류전압이 된다.On the other hand, in the components of each of the low pass filters LF1 and LF2, the resistor R1 X capacitor C1 = resistor R2 X capacitor C2> the maximum frequency f of the signal sources F1 and F2 When the resistors R1 (R2) and capacitors C1 (C2) are set to be max), the outputs of these low-pass filters LF1 and LF2 become DC voltages as shown in Figs. 2g and (h), respectively.
이 전압은 비교기(CM1)의 비반전입력단(+) 및 반전입력단(-)에 각각 입력되어 비교되는데, 예를 들어 모우터에서 샘플링되는 신호원(F2)의 주파수가 기준 신호원(F1)의 주파수 보다 작을 경우 저역여파기(LF1)의 출력전압이 저역여파기(LF2)의 출력전압보다 높게되며, 이에 의해 비교기(CM1)의 출력은 제2i도에서와 같이“하이” 레벨로 된다.These voltages are input to the non-inverting input terminal (+) and the inverting input terminal (-) of the comparator CM1, respectively, and compared. For example, the frequency of the signal source F2 sampled from the motor is compared with that of the reference signal source F1. If it is smaller than the frequency, the output voltage of the low pass filter LF1 is higher than the output voltage of the low pass filter LF2, whereby the output of the comparator CM1 is brought to the "high" level as shown in FIG.
이 비교기(CM1)의“하이” 레벨 출력은 통상의 모우터 구동회로로 피이드백되어 모우터의 회전수를 증가시키게 된다.The "high" level output of this comparator CM1 is fed back to a normal motor driving circuit to increase the rotation speed of the motor.
이와 같은 상태에서 모우터에서 샘플링되는 신호원(F2)의 주파수가 기준 신호원(F1)의 주파수보다 커지게 되면 전술한 바와 같은 회로동작에 의해 비교기(CM1)의 출력은“로우” 레벨로 반전되며, 이“로우” 레벨 전압 역시 피이드백되어 모우터의 회전수를 감소시키게 되는데, 이와 같은 동작을 반복함으로서 결국 두 신호원(F1)(F2)의 주파수가 같게 되도록 모우터의 회전수가 제어되는 것이다.In this state, when the frequency of the signal source F2 sampled by the motor becomes larger than the frequency of the reference signal source F1, the output of the comparator CM1 is inverted to the "low" level by the above-described circuit operation. The “low” level voltage is also fed back to reduce the number of revolutions of the motor. By repeating this operation, the number of revolutions of the motor is controlled so that the frequencies of the two signal sources F1 and F2 are the same. will be.
실제 사용에 있어서, 씨디피의 디스크모우터를 제어할 경우에는 신호원(F2)에 씨디피의 동기검출신호를 인가하고, 신호원(F1)에는 정상회전시의 동기주파수를 인가하여 출력단(OT)의 전압을 궤환시키면 디스크모우터의 회전수를 제어할 수 있다.In actual use, when controlling the CD motor of the CDP, the synchronous detection signal of the CD is applied to the signal source F2, and the synchronous frequency at the normal rotation is applied to the signal source F1 to provide the output terminal OT. By returning the voltage, the rotation speed of the disc motor can be controlled.
이와 같이 본 고안은 계수기 및 발진회로를 사용하지 않고 단안정 멀티바이브레이터 및 비교기를 사용하여 회로를 구성함으로서 회로가 간단하고 고주파 발전에 의한 주변 회로의 노이즈가 발생되지 않는 등의 잇점을 가진 유용한 고안이다.As described above, the present invention is a useful design having advantages such as a simple circuit and no noise generated in the peripheral circuit due to high frequency power generation by constructing a circuit using a monostable multivibrator and a comparator without using a counter and an oscillator circuit. .
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Application Number | Priority Date | Filing Date | Title |
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KR2019870013418U KR910000957Y1 (en) | 1987-08-11 | 1987-08-11 | Frequency comparateing circuit |
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KR2019870013418U KR910000957Y1 (en) | 1987-08-11 | 1987-08-11 | Frequency comparateing circuit |
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KR890005549U KR890005549U (en) | 1989-04-20 |
KR910000957Y1 true KR910000957Y1 (en) | 1991-02-13 |
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KR2019870013418U KR910000957Y1 (en) | 1987-08-11 | 1987-08-11 | Frequency comparateing circuit |
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1987
- 1987-08-11 KR KR2019870013418U patent/KR910000957Y1/en not_active IP Right Cessation
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