KR910000374B1 - Programable control integrated telephone - Google Patents

Abstract

An integrated circuit for programmable control telephone comprises a first mode selector (51') having a transistor, a condenser and an inverter, a second mode selector (51) having a NOR gate, an inverter serially connected to NOR gate and a NAND gate, a latch circuit (L) coupled to the mode selectors, a register clock enable section (52) including the latch circuit, a NAND gate and inverters, a register section (53) including a plurality of D flip-flops, a decoder (54) including two NAND gates, a NOR gate and inverters, a selecting circuit for receiving the outputs of a key input section (10) and the register section, and a register output decoder (55) for receiving an output of the register section.

Description

Integrated Circuits for Programmable Control Phones

1A is a conventional telephone connection diagram.

(b) is a terminal configuration diagram of an integrated circuit using the present invention.

2 is a circuit diagram of the present invention.

3 is a block diagram of the present invention.

* Explanation of symbols for main parts of the drawings

51, 51 ': setting mode determining section 52: register clock enable section

53: register section 54: 0,1 key decoder section

55: register output decoder 56: selection circuit

41.41 ': set mode pulse 42: latch output

43: Input for determining normal operation 45: Key 1 decryptor output

46,46 ': 0 key decoder 47: 1,0 key decoder output

48: register clock output 49: register clock input

I ₁ to I ₈ : Inverter T: Transistor

NOR ₁ , NOR ₂ : Noah gate L: Latch circuit

NAND ₁ to NAND ₄ : NAND gate C ₁ : Capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit for a programmable control telephone, and in particular, to solve a country-specific region-specific specification in a telephone circuit. The present invention relates to an integrated circuit for a programmable telephone that can be used by changing a function according to a necessary use by configuring an integrated circuit for a telephone with a register portion and a register output decoder.

In general, a conventional telephone integrated circuit is constructed as shown in FIG. 1A, and the key input unit 10 and the telephone integrated circuit 20 are connected and used.

는 국가별 외부 응용회로에 따라 고정 또는 변경할 수 있도록 되어 있기 때문에 제조업체에서 특정모델에 따라 이들 단자들을 변경하여 생산하고 있다.In this case, the terminals of the telephone integrated circuit 20, M / B, DRS,

Since they can be fixed or changed according to country-specific external application circuits, the manufacturers change these terminals according to specific models.

; Hook Switch)는 이 단자에 인가되는 전위에 ek라 내부회로가 동작하거나 안하거나 결정되는데 통상수화기를 내려놓은 상태 즉, 온-후크(ON-Hook)상태에서는 직접회로에 하이(V⁺)가 인가되며, 수화기를 든 상태 즉, 오프-후크(OFF-Hook)상태에서는 로우(V^-)가 이 단자를 통하여 집적회로내에 인가되므로 내부회로가 동작할 수 있도록 하는 단자이다.The terminal (DRS) is a terminal that determines the speed of pulse when the telephone is connected to a mechanical exchange. It is a terminal that determines how many pulses can be generated per second depending on the performance of the exchange. In the case of 10PPS, the pulse period is 100 ms for 10 ms / second, and in the case of 20PPS, the pulse period is 50 ms for 20 pulses / sec. In addition, the terminal (M / B; Make / Break) is a terminal that determines the ratio of the high section (V ⁺ ) and the low section (V ⁻ ) for one period of pulse in a telephone used in a mechanical exchange. This terminal is selected to have a ratio of 3. The terminal (MDS; Mode Select) is a terminal that can be selected and used according to a mechanical crafty device and an electronic exchange, and a pulse for a mechanical exchange and a tone (Dual Tone Multi Frequency) for an electronic exchange are applied to a potential applied to the terminal. It is generated. In addition, the terminal (

; Hook Switch is used to determine whether the internal circuit is operated or not due to the potential applied to this terminal, but high (V ⁺ ) is applied to the integrated circuit in the state where the handset is put down, that is, in the ON-Hook state. In a state where the receiver is lifted, that is, in an off-hook state, a low V ⁻ is applied to the integrated circuit through the terminal so that the internal circuit may operate.

)를 톤인 경우 단자(TO)를 통하여 출력하게 된다.Therefore, in the conventional integrated circuit for a telephone, when one key of the key input unit 10 is pressed, only one of the selected R ₁ to R ₄ becomes G ₁ to G ₄ to generate four codes in the integrated circuit. In case of pulse type,

) Tones are output through the terminal (TO).

Therefore, conventional integrated circuits for telephones have a large number of terminals, and these terminals are fixed to have only one function, and thus cannot be used for various functions. There was a flaw that I could not.

The present invention has been invented to eliminate the drawbacks of the conventional integrated circuit for telephones, which is used for one purpose only, or by setting a separate terminal externally and applying a potential of the specified purpose to this specific terminal. The purpose of the present invention is to provide an integrated circuit for a programmable control telephone which can be arbitrarily changed in accordance with a necessary use by configuring a separate telephone integrated circuit.

Hereinafter, the configuration, operation, and effects of the present invention will be described in detail with reference to the accompanying drawings.

)에 공급하고 레지스터클럭용출력(48)을 각 디플립플롭의 클럭단자(C)에 공급하며 설정모드 펄스(41,41')를 각 디플립플롭의 리세트단에 공급하여서된 레지스터부(53)와 출력하고자 하는 키입력부(10)의 출력을 제공받고 디플립플롭(D₁) 출력을 제공받는 선택회로부(56)와 각 디플립플롭(D₂,D₃)출력을 제공받는 레지스터출력해독기부(55)로 구성된 것이다. 이와 같이 구성된 본 발명의 동작상태를 설명하면 다음과 같다.An integrated circuit for a programmable control changer of the present invention for achieving the above object is a set mode pulse 41 'or a noar gate (NOR ₁ ) by a power-on reset circuit composed of a transistor (T), a capacitor (C ₁ ), and an inverter. ), A setting mode determining unit 51 'and a setting mode determining unit 41 and a setting mode determining unit 51 which are configured of an inverter I ₂ and a NAND gate NAND ₁ to provide a setting mode pulse 41. One end of the latch output 42 and the first key decoder 45 and the 0 key of the latch circuit L are provided with the input 43 for determining the normal operation and the other end with the output of the setting mode decision unit 51. A register clock portion 52 and a NAND gate NAND _{3 configured} to pass the output of the NAND gate NAND ₂ , to which the decoder 46 ′ and the register clock input 49 are applied, through the inverter I ₃ . ) and to the inverter (I ₄₎ 0 beonki decoder (46) through the first beonki decoder 45 and the NAND gate (NAND ₄₎ with an input NOR gate 0,1 key provided by the key 1,0 decoder output 47 which passes through the cake (NOR ₂₎ through the following inverter (I _6), and provides the inverter (I ₅₎ 0 beonki decoder output (46) The decoder 54 and the 0,1 key decoder 54 output are supplied to the input of the flip-flop D ₁ , and the register clock output 48, which is the output of the register clock enable unit 52, is inverter. Through (I ₈ ) the applicator terminal of each deflip-flop (

Register portion (48) is supplied to the clock terminal (C) of each def flip-flop, and the set mode pulses (41, 41 ') are supplied to the reset end of each def flip-flop. 53) and the register circuit 56 which is provided with the output of the key input unit 10 to be output and is provided with the deflip-flop (D ₁ ) output and the register output which is provided with each of the deflip-flop (D ₂ , D ₃ ) outputs. It is composed of the decoder 55. Referring to the operating state of the present invention configured as described above are as follows.

When the power is turned OFF, when the charging is performed while the capacitor C ₁ is momentarily turned on, the output of the inverter I ₁ is changed from the low level to the high level of the setting mode pulse 41 'or the key input unit 10. The set mode determination section 51 'or the set mode determiner 51 accepts all of the setting mode pulses 41 generated by the operation of the specific key, respectively.

In such a situation, when the code to be input is pressed by using the 1 and 0 keys, the signal generated from the key input unit 10 is transformed into a 4 digit code as described above, and when the 1 key is pressed, the signal ( 45) is at a high (V ^+), when pressing the 0 beonki signal (46 ') is low (V ^-) are to register input (D1) is applied to the press of the 0 beonki or 1 beonki setting board latch output (42 ) Is high (V ⁺ ) state, the register 0 key 46 'is registered high (V ⁺ ), the register clock input 49 is high, the register clock output 48 is high, so the register section in 58 rows (V ^-) can be input or high ⁽⁺ V). In the present invention, the input of the low (V ⁺ ) to the register using the 0 key and the high (V ⁺ ) using the 1 key is shown as an example, and the method of inputting the setting data of the register unit 53 may be modified in various ways. This is possible. May also be applied to the key input unit 10, the signal 4 input to the transformed data in the form of the digit register _{(D 1, D 2, D} 3 ... D n) occurs at the same time. The register clock output 48 is generated every time a key is pressed. The register clock input 49 may use a clock in a conventional telephone integrated circuit, or may be configured separately.

If the specified key (1 or 0) is pressed, the input code does not occur and is not input because the register clock input 49 is lowered by the 1 key decoder 45 and the 0 key decoder 46. Nor do.

In this way, the output of the register unit 53 is input to the register output decoder unit 55 or the selection circuit unit 56 according to the input signal, so that the circuit setting can be performed.

When the normal operation state is desired in the setting mode, the handset can be operated in the normal operation state in the setting mode by providing an input 43 for determining normal operation by lifting or releasing the handset.

The present invention applied as described above can be used in a variety of forms that is fixed in one way when using the conventional integrated circuits for telephones, by removing unnecessary terminals can bring the simplification and cost reduction, manufacturers In addition, by solving various types of specifications with one integrated circuit, it becomes competitive with the convenience of management, operation simplification, cost reduction due to parts reduction and miniaturization.

In addition, the user side can meet the prescribed specifications anytime, anywhere has the advantage that there is no double burden to buy a new phone.

Claims (1)

Inverter (I ₁ ) is connected to the connection point of transistor (T) and condenser (C ₁ ) to form a setting mode determining unit (51 '), and noah gate (NOR ₁ ) and inverter (I ₂ ) are connected in series. One end of the NAND gate NAND ₁ is connected to the connection point to configure the setting mode determining unit 51, and the latch circuit L is connected to the setting all determining units 51 and 51 '. ), The NAND gate (NAND ₂ ), and the inverter (I ₃ ) (I ₈ ) are sequentially formed to form the _register clock enable portion 52, and a plurality of D-types are provided in the register clock enable portion 52. it connects the register unit 53 consisting of a flip-flop, a NAND gate, but connect (NAND ₃₎ inverter to the inverter (I4), the NAND gate (NAND ₄₎ (I _S, I ₇₎ and then the inverter (I ₄₎ the output end to the connection point of the one NAND gate (NAND ₄₎ and the inverter (I _S) of the NOR gate (NOR ₂₎ is connected to the other terminal of the NOR gate (NOR _2), the output terminal of the NOR gate (NOR ₁₎ The inverter I ₆ is connected to the 0,1 key decoder 54, and the selection circuit unit 56 and the register unit receiving the output of the key input unit 10 and the output of the register unit 53 are provided. 52. A programmable control telephone integrated circuit comprising a register output decoder unit 55 for receiving an output of 52) as an input.

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