KR900008664A - Carrier substrate and its manufacturing method - Google Patents

Carrier substrate and its manufacturing method

Info

Publication number
KR900008664A
KR900008664A KR1019890017383A KR890017383A KR900008664A KR 900008664 A KR900008664 A KR 900008664A KR 1019890017383 A KR1019890017383 A KR 1019890017383A KR 890017383 A KR890017383 A KR 890017383A KR 900008664 A KR900008664 A KR 900008664A
Authority
KR
South Korea
Prior art keywords
manufacturing
carrier substrate
carrier
substrate
Prior art date
Application number
KR1019890017383A
Other languages
Korean (ko)
Other versions
KR930006274B1 (en
Inventor
히데다까 시기
다까지 다께나까
후미유끼 고바야시
Original Assignee
가부시기가이샤 히다찌세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시기가이샤 히다찌세이사꾸쇼 filed Critical 가부시기가이샤 히다찌세이사꾸쇼
Publication of KR900008664A publication Critical patent/KR900008664A/en
Application granted granted Critical
Publication of KR930006274B1 publication Critical patent/KR930006274B1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01077—Iridium [Ir]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
KR1019890017383A 1988-11-30 1989-11-29 Carrier substrate and method for manufacturing thereof KR930006274B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP63302396A JPH02148862A (en) 1988-11-30 1988-11-30 Circuit element package, and carrier board and manufacture thereof
JP63-302396 1988-11-30

Publications (2)

Publication Number Publication Date
KR900008664A true KR900008664A (en) 1990-06-03
KR930006274B1 KR930006274B1 (en) 1993-07-09

Family

ID=17908409

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890017383A KR930006274B1 (en) 1988-11-30 1989-11-29 Carrier substrate and method for manufacturing thereof

Country Status (5)

Country Link
JP (1) JPH02148862A (en)
KR (1) KR930006274B1 (en)
CN (1) CN1015582B (en)
DE (1) DE3939647A1 (en)
GB (1) GB2225670B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100437740B1 (en) * 1996-04-22 2004-08-27 꼬게마 꽁빠니 제네랄 데 마띠에르 뉘끌레르 Sampling devices for hazardous liquids, especially harmful liquids filled with solid particles

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2503725B2 (en) * 1990-05-18 1996-06-05 日本電気株式会社 Multilayer wiring board
GB2267993B (en) * 1992-06-15 1995-11-22 Gnb Ind Battery Co Modular battery cabinet assembly
US5378927A (en) * 1993-05-24 1995-01-03 International Business Machines Corporation Thin-film wiring layout for a non-planar thin-film structure
JPH07221462A (en) * 1994-02-03 1995-08-18 Murata Mfg Co Ltd Composite circuit part
US6614110B1 (en) 1994-12-22 2003-09-02 Benedict G Pace Module with bumps for connection and support
JP2001523390A (en) * 1994-12-22 2001-11-20 ベネディクト・ジー・ペース Module with high mounting efficiency, to which inverted chips are bonded
US5904499A (en) * 1994-12-22 1999-05-18 Pace; Benedict G Package for power semiconductor chips
US6384344B1 (en) 1995-06-19 2002-05-07 Ibiden Co., Ltd Circuit board for mounting electronic parts
EP0883173B1 (en) 1996-09-12 2007-09-12 Ibiden Co., Ltd. Circuit board for mounting electronic parts
JPH10308565A (en) * 1997-05-02 1998-11-17 Shinko Electric Ind Co Ltd Wiring board
JP3973340B2 (en) * 1999-10-05 2007-09-12 Ｎｅｃエレクトロニクス株式会社 Semiconductor device, wiring board, and manufacturing method thereof
JP4023076B2 (en) * 2000-07-27 2007-12-19 富士通株式会社 Front and back conductive substrate and manufacturing method thereof
JP2005045073A (en) 2003-07-23 2005-02-17 Hamamatsu Photonics Kk Backface incident photo detection element

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3875479A (en) * 1973-05-07 1975-04-01 Gilbert R Jaggar Electrical apparatus
US4023197A (en) * 1974-04-15 1977-05-10 Ibm Corporation Integrated circuit chip carrier and method for forming the same
US4202007A (en) * 1978-06-23 1980-05-06 International Business Machines Corporation Multi-layer dielectric planar structure having an internal conductor pattern characterized with opposite terminations disposed at a common edge surface of the layers
DE2915240A1 (en) * 1978-06-28 1980-01-03 Mitsumi Electric Co PRINTED CIRCUIT
US4221047A (en) * 1979-03-23 1980-09-09 International Business Machines Corporation Multilayered glass-ceramic substrate for mounting of semiconductor device
US4322778A (en) * 1980-01-25 1982-03-30 International Business Machines Corp. High performance semiconductor package assembly
US4302625A (en) * 1980-06-30 1981-11-24 International Business Machines Corp. Multi-layer ceramic substrate
US4407007A (en) * 1981-05-28 1983-09-27 International Business Machines Corporation Process and structure for minimizing delamination in the fabrication of multi-layer ceramic substrate
US4430365A (en) * 1982-07-22 1984-02-07 International Business Machines Corporation Method for forming conductive lines and vias
DE3382208D1 (en) * 1982-12-15 1991-04-18 Nec Corp MONOLITHIC MULTILAYER CERAMIC SUBSTRATE WITH AT LEAST ONE DIELECTRIC LAYER MADE OF A MATERIAL WITH PEROVSKIT STRUCTURE.
JPS59180514A (en) * 1983-03-31 1984-10-13 Toshiba Corp Light receiving module
FR2556503B1 (en) * 1983-12-08 1986-12-12 Eurofarad ALUMINA INTERCONNECTION SUBSTRATE FOR ELECTRONIC COMPONENT
JPS60178695A (en) * 1984-02-17 1985-09-12 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Electric mutual connecting package
JPS6148994A (en) * 1984-08-17 1986-03-10 株式会社日立製作所 Module substrate
JPH0714105B2 (en) * 1986-05-19 1995-02-15 日本電装株式会社 Hybrid integrated circuit board and manufacturing method thereof
JPH0734455B2 (en) * 1986-08-27 1995-04-12 日本電気株式会社 Multilayer wiring board
JPS6366993A (en) * 1986-09-08 1988-03-25 日本電気株式会社 Multilayer interconnection board
GB2197540B (en) * 1986-11-12 1991-04-17 Murata Manufacturing Co A circuit structure.
JP2610487B2 (en) * 1988-06-10 1997-05-14 株式会社日立製作所 Ceramic laminated circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100437740B1 (en) * 1996-04-22 2004-08-27 꼬게마 꽁빠니 제네랄 데 마띠에르 뉘끌레르 Sampling devices for hazardous liquids, especially harmful liquids filled with solid particles

Also Published As

Publication number Publication date
DE3939647A1 (en) 1990-05-31
CN1015582B (en) 1992-02-19
GB2225670B (en) 1992-08-19
GB8926971D0 (en) 1990-01-17
JPH02148862A (en) 1990-06-07
GB2225670A (en) 1990-06-06
CN1043407A (en) 1990-06-27
KR930006274B1 (en) 1993-07-09

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Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20010629

Year of fee payment: 9

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