KR890017946A - Television and Video Tape Recorder Screen Art Circuits and Methods - Google Patents

Television and Video Tape Recorder Screen Art Circuits and Methods Download PDF

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Publication number
KR890017946A
KR890017946A KR1019880005707A KR880005707A KR890017946A KR 890017946 A KR890017946 A KR 890017946A KR 1019880005707 A KR1019880005707 A KR 1019880005707A KR 880005707 A KR880005707 A KR 880005707A KR 890017946 A KR890017946 A KR 890017946A
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KR
South Korea
Prior art keywords
signal
color difference
data
signals
predetermined
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KR1019880005707A
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Korean (ko)
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KR910009512B1 (en
Inventor
김용제
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안시환
삼성전자 주식회사
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Priority to KR1019880005707A priority Critical patent/KR910009512B1/en
Publication of KR890017946A publication Critical patent/KR890017946A/en
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Publication of KR910009512B1 publication Critical patent/KR910009512B1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Color Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음No content

Description

텔레비젼이나 비디오테이프레코오더 화면 아트 회로 및 방법Television and Video Tape Recorder Screen Art Circuits and Methods

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 본 발명의 회로도.1 is a circuit diagram of the present invention.

Claims (2)

색차분리부 및 동기분리부, 분주회로부, 칼러합성부를 구비한 텔리비젼이나 비디오테이프레코오더에 있어서, 시청자의 선택에 의해 선택된 기능에 대한 기능선택신호를 발생하는 키보드(10)와, 상기 키보드(10)의 기능선택신호를 입력하여 시스템 전체를 제어하기 위한 마이콤(20)과, 색차분리부로부터 아날로그 색차신호인 Y 및 R-Y와 B-Y신호를 순차적으로 입력하여 제 1 소정비트수(n)의 디지탈 색차신호로 변환하는 스위칭 및 A-D변환기(30)와 상기 스위칭 및 A-D변환기(30)의 출력을 제 2 소정비트수(R)의 디지탈 색차신호로 변환하여 제 4 소정주기로 출력하는 제 1 데이터변환부(40)와, 상기 제 1 데이터변환부(40)의 디지탈 색차신호를 제 1 포트로 입력하여 저장하면 제 6 소정 단위의 데이터량을 독출하여 제 2 소정비트 단위로 상기 독출된 데이터를 제 2 포트를 통해 순차적으로 출력하는 듀얼포트메모리(50)와, 상기 듀얼포트메모리(50)의 제 2 포트의 출력을 제 1 소정비트의 색차신호인 Y 및 R-Y와 B-Y로 변환하여 제 5 소정주기로 출력하는 제 2 데이터변환부(41)와, 상기 제 2 데이터변환부(41)의 제 1 소정비트수(n)의 Y신호를 입력 조절하여 출력하는 휘도신호조절부(70)와, 상기 제 2 데이터변환부(41)의 제 1 소정비트수(n)의 색차신호 R-Y를 아날로그 R-Y신호로 변환하여 색차합성부로 출력하는 제 3D-A변환기(82)와, 상기 제 2 데이터변환부(41)의 제 1 소정비트수(n)의 B-Y를 아날로그 B-Y를 변환하여 색차합성부로 출력하는 제2D-A변환기(81)와, 상기 Y조절부(60)의 조절된 제 1 소정비트수(n)의 Y신호를 아날로그 Y신호로 변환하여 색차합성부로 출력하는 제1D-A변환기(80)와, 상기 마이콤(20)으로부터 인가되는 아트제어신호를 디코딩해독함으로서 동기분리부로부터 인가되는 수평 및 수직동기신호에 따라 분주회로로부터 인가되는 제 8 소정주파수(afsc)의 제 1 클럭 및 및 제 9 소정주파수(bfsc)의 제 2 클럭을 분주하여 상기 제1 및 제 2 데이터변환부(40,41)의 출력주기를 제어하기 위한 제1 및 제 2 래치신호와 상기 스위칭 및 A-D변환기(30)의 스위칭 입력을 제어하기 위한 스위칭 제어신호와 상기 Y조절부(60)의 휘도조절을 제어하기 위한 휘도제어신호와 상기 듀얼포트메모리(50)을 억세스하기 위한신호 및 제 3 소정비트수(1)의 어드레스와 리드 클럭을 발생하는 콘트롤 디코더부(60)으로 구성함을 특징으로 하는 화면 아트 회로.In a television or video tape recorder having a color difference separator, a sync separator, a division circuit unit, and a color synthesis unit, a keyboard 10 for generating a function selection signal for a function selected by the viewer's selection, and the keyboard 10 The digital color difference of the first predetermined number of bits n is input by sequentially inputting the microcomputer 20 for controlling the entire system by inputting a function selection signal) and Y, RY and BY signals, which are analog color difference signals, from the color difference separator. A first data converter for converting a switching and AD converter 30 for converting into a signal and an output of the switching and AD converter 30 into a digital color difference signal having a second predetermined number of bits R and outputting the signal at a fourth predetermined period ( 40) and when the digital color difference signal of the first data converter 40 is input to the first port and stored therein, the data amount of the sixth predetermined unit is read and the read data is stored in the second predetermined bit unit. To A dual port memory 50 to sequentially output through the second port and a second port of the dual port memory 50 to convert Y, RY and BY, which are color difference signals of a first predetermined bit, to be output at a fifth predetermined period A second data converter 41, a luminance signal controller 70 for inputting and outputting a Y signal of the first predetermined number of bits n of the second data converter 41, and the second data converter A third 3D-A converter 82 for converting the color difference signal RY of the first predetermined number of bits n of the unit 41 into an analog RY signal and outputting the color difference signal RY to the color difference combining unit; 2D-A converter 81 for converting BY of a predetermined number of bits n to analog BY and outputting it to the color difference combining unit, and Y of the adjusted first predetermined number of bits n of the Y adjusting unit 60. The first D-A converter 80 converts the signal into an analog Y signal and outputs it to the color difference combining unit, and decodes the art control signal applied from the microcomputer 20. The first clock of the eighth predetermined frequency afsc and the second clock of the ninth predetermined frequency bfsc are divided by the horizontal and vertical synchronization signals applied from the synchronization separating unit. The first and second latch signals for controlling the output period of the second data converters 40 and 41, the switching control signals for controlling the switching inputs of the switching and AD converters 30, and the Y controller 60. For controlling the brightness control of the control) and the dual port memory 50 for accessing And a control decoder (60) for generating a signal, an address of the third predetermined number of bits (1), and a read clock. 텔리비젼이나 비디오테이프레코오더에 있어서, 아날로그 색차신호인 Y, R-Y, B-Y신호를 R-Y, Y, Y, B-Y, Y, Y의 순으로 제 1 소정비트(n)의 디지탈신호로 변환한 다음 제 2 소정비트(R)의 변환하여 메모리에 저장하는 데이터 저장과정에서 상기 데이터저장과정 수행도중 1수평주사기간단위로 1수평주사기간에 해당하는 제 7 소정 단위의 디지탈신호를 메모리로부터 반복 독출하는 데이터 독출과정과, 상기 데이터독출과정에 의해 독출된 디지탈신호를 제 1 소정비트(n)의 Y, R-Y, B-Y신호로 변환 하여 Y신호중 임의 비트수의 디지탈레벨을 일정한 레벨값을 갖도록 변환한 다음 아날로그 색차신호인 Y, R-Y, B-Y신호로 변환 출력하는 데이터출력과정으로 이루어짐을 특징으로 하는 화면 아트 방법.In a television or video tape recorder, the analog color difference signals Y, RY, and BY are converted into digital signals of the first predetermined bit (n) in the order of RY, Y, Y, BY, Y, and Y. In the data storage process of converting a predetermined bit R and storing the data in a memory, data reading for repeatedly reading a seventh predetermined unit digital signal corresponding to one horizontal scanning period in one horizontal scanning period during the data storage process is performed. And converting the digital signal read out by the data reading process into Y, RY, BY signals of the first predetermined bit n, converting the digital level of any number of bits of the Y signal to have a constant level value, and then converting the analog color difference. A screen art method comprising a data output process of converting and outputting signals Y, RY and BY signals. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880005707A 1988-05-17 1988-05-17 Screen art circuit and method of tv or vtr KR910009512B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880005707A KR910009512B1 (en) 1988-05-17 1988-05-17 Screen art circuit and method of tv or vtr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880005707A KR910009512B1 (en) 1988-05-17 1988-05-17 Screen art circuit and method of tv or vtr

Publications (2)

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KR890017946A true KR890017946A (en) 1989-12-18
KR910009512B1 KR910009512B1 (en) 1991-11-19

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KR1019880005707A KR910009512B1 (en) 1988-05-17 1988-05-17 Screen art circuit and method of tv or vtr

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KR910009512B1 (en) 1991-11-19

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