KR890007520A - Digital data transmission and reception circuit - Google Patents

Digital data transmission and reception circuit Download PDF

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Publication number
KR890007520A
KR890007520A KR870012032A KR870012032A KR890007520A KR 890007520 A KR890007520 A KR 890007520A KR 870012032 A KR870012032 A KR 870012032A KR 870012032 A KR870012032 A KR 870012032A KR 890007520 A KR890007520 A KR 890007520A
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KR
South Korea
Prior art keywords
circuit
output
transmission
signal
reception
Prior art date
Application number
KR870012032A
Other languages
Korean (ko)
Other versions
KR900003663B1 (en
Inventor
서중교
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019870012032A priority Critical patent/KR900003663B1/en
Publication of KR890007520A publication Critical patent/KR890007520A/en
Application granted granted Critical
Publication of KR900003663B1 publication Critical patent/KR900003663B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Dc Digital Transmission (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

내용 없음No content

Description

디지탈 데이타 송수신 회로Digital data transmission and reception circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 본 발명에 따른 블럭도.1 is a block diagram according to the present invention.

제 2 도는 본 발명에 따른 제 1 도의 구체회로도.2 is a detailed circuit diagram of FIG. 1 according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

100 : 부호기 200 : 펄스쉐이퍼100: encoder 200: pulse shaper

300 : 송수신 트랜스포머 400 : 프리증폭회로300: transmission and reception transformer 400: pre-amplification circuit

500 : 밴드패스필터 600 : 메인증폭회로500: band pass filter 600: main amplifier circuit

700 : 레벨검출회로 800 : 전류피이더회로700: level detection circuit 800: current feeder circuit

900 : 자동이득 제어회로 1000 : 복호기900: automatic gain control circuit 1000: decoder

Claims (1)

디지탈 데이타 송수신 회로에 있어서, 전송할 디지탈신호를 소정코딩방식에 따라 부호화하는 부호기(100)와, 상기 부호기(100) 출력신호의 균형을 유지하고 펄스발생후 잔여 에너지의 급속한 감소 및 저주파발진파형을 억압하는 펄스쉐이퍼(200)와, 상기 펄스쉐이퍼(200) 출력신회로부터 송수신에 따른 임피던스를 매칭하고 입력펄스의 벨런싱을 유지하는 송수신 트랜스포머(300)와, 상기 송수신 트랜스포머(300)로부터 출력된 신호를 증폭하는 프리증폭회로(400)와, 상기 프리증폭회로(400)의 출력을 소정주파수 대역에서 통과하도록 필터링하는 밴드패스필터(500)와, 상기 밴드패스필터(500)의 출력을 증폭하는 메인증폭회로(600)와,상기 메인증폭회로(600) 출력전압으로부터 출력신호의 최대치 레벨을 검출하는 레벨검출회로(700)와, 상기 레벨검출회로(700)의 검출 레벨전압을 전류값으로 변환하는 전류피이더회로(800)와, 상기 전류피이더회로(800)의 출력전류에 의해 임피던스가 조정되어 상기 프리증폭회로(400)의 입력데이타를 전송거리에 따라 일정 레벨로 유지하도록 하는 자동이득 제어회로(900)와, 상기 메인증폭회로(600)의 출력으로부터 전송신호를 디코딩하는 복호기(1000)로 구성됨을 특징으로 하는 회로.In a digital data transmission / reception circuit, an encoder 100 for encoding a digital signal to be transmitted according to a predetermined coding scheme is maintained, and an output signal of the encoder 100 is balanced, and a rapid reduction of residual energy and a low frequency oscillation waveform are suppressed after a pulse is generated. The pulse shaper 200 and the transmission and reception transformer 300 for matching the impedance according to transmission and reception from the output signal of the pulse shaper 200 and maintaining the balancing of the input pulses, and the signal output from the transmission and reception transformer 300 A preamplification circuit 400 for amplifying, a band pass filter 500 for filtering the output of the preamplification circuit 400 to pass through a predetermined frequency band, and a main amplification for amplifying the output of the band pass filter 500. A circuit 600, a level detection circuit 700 for detecting a maximum level of an output signal from the output voltage of the main amplifier circuit 600, and a detection of the level detection circuit 700 The impedance is adjusted by the current feeder circuit 800 for converting a level voltage into a current value, and the output current of the current feeder circuit 800, and the input data of the preamplifier circuit 400 is fixed according to the transmission distance. And a decoder (1000) for decoding the transmission signal from the output of the main amplifier circuit (600). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870012032A 1987-10-29 1987-10-29 Digital data transmitter & receiver KR900003663B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870012032A KR900003663B1 (en) 1987-10-29 1987-10-29 Digital data transmitter & receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870012032A KR900003663B1 (en) 1987-10-29 1987-10-29 Digital data transmitter & receiver

Publications (2)

Publication Number Publication Date
KR890007520A true KR890007520A (en) 1989-06-20
KR900003663B1 KR900003663B1 (en) 1990-05-28

Family

ID=19265561

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870012032A KR900003663B1 (en) 1987-10-29 1987-10-29 Digital data transmitter & receiver

Country Status (1)

Country Link
KR (1) KR900003663B1 (en)

Also Published As

Publication number Publication date
KR900003663B1 (en) 1990-05-28

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