KR890004971B1 - Semiconductor manufacturing method - Google Patents

Abstract

growing thermal oxide film (21) on the top of the N-type epitaxial layer and forming the pattern of intrinsic base region (22) and extrinsic base region (23), respectively, by photograph and injecting P-type impurity into them ; Spreading said substrate with an oxide layer and etching only (4) and the upper layer of (23) and forming the second intrinsic base region (25) and extrinsic base region (26) by thermal diffusion ; forming the pattern of nitride film (27) and opening collector and emitter window by using (21) and forming collector region (29) and emitter region (30) by N-type polysilicon film (28) ; opening the electrode window of (26) and forming emitter electrode (31), base electrodes (32),(33), and collector electrode (34).

Description

Manufacturing method of semiconductor device

1 is a schematic cross-sectional view of a conventional general semiconductor device.

2 is a schematic cross-sectional view of a semiconductor device according to the present invention.

3 (a), 3 (b), and 3 (c) are semiconductor device manufacturing process diagrams according to the manufacturing method of the semiconductor device of the present invention.

* Explanation of symbols for main parts of the drawings

1: P-type silicon substrate 2: High concentration N-type buried layer

3: N-type epitaxial layer 4: High-concentration N-type impurity layer

5: high concentration P-type impurity layer 21: thermal oxide film

24: oxide film 25: intrinsic base region

26: extruded base area 27: nitride film

28: high-concentration N-type polycrystalline silicon film 29: collector region

30 emitter region 31 emitter electrode

32, 33: base electrode 34: collector electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device, by which the degree of mask bonding can be increased to reduce an electrical characteristic defect due to a mask misalignment when forming a fine pattern.

In general, bipolar integrated circuit devices require multifunction and low power consumption for miniaturization of sets and systems, and high frequency characteristics and analog / digital complex functionalization are required due to the development of communication systems. In order to satisfy this problem, miniaturization of the pattern to reduce the element size in the device, minimization of noise due to unnecessary junctions of the emitter base and unnecessary charge transfer in the passivation film is required. have. FIG. 1 is a schematic cross-sectional view of a conventional semiconductor device, in which a high concentration N-type buried layer (N ⁺ Buried Layer) 2 is formed on a P-type silicon substrate 1 to reduce collector continuous resistance. After growing the N-type epitaxial layer (3), and then growing a thermal oxide film to the surface of the N-type epitaxial layer (3) to a thickness of 10,000Å, high concentration N-type impurities and high concentration P-type by photolithography Impurities were applied and absorbed by thermal diffusion to form a high concentration N-type impurity layer 4 and a high concentration P-type impurity layer 5, and the collector continuous resistance was reduced and insulation formed against elements prevented electrical influences from the outside.

After doing this, the thermal oxide film was removed, and the thermal oxide film 6 was grown to 10,000Å thickness, and then the base window was opened by photo-visual method, and the Boron Doped Oxide 7 was 5,000-6,000ÅÅ. After forming the base region (8) by thermal diffusion, open the emitter and the collector electrode window to apply a high concentration of phosphorous (Phoshorous Doped Oxide) (9) to a thickness of 5,000-6,000Å, and then the emitter region (10) ) And a high concentration N-type collector region 11 are formed. After forming the base region 8, the emitter region 10, and the collector region 11, the metal electrode window is opened by metal etching by photolithography, and the base region 8, the emitter region 10, and The manufacture of the conventional semiconductor device is completed by drawing out the electrode terminals 12-14 of the collector region 11. However, in the fabrication of such a conventional semiconductor device, since the thickness of the oxide films 6, 7, and 9 is thick, side etching occurs greatly during photolithography, thus making it difficult to form fine patterns. Since the mask operation for forming the base region 8, the emitter region 10 and the collector region 11 and the respective electrode window openings are performed separately, the pattern margins due to the misalignment during the mask alignment are eliminated. The pattern size must be increased, and the passivation layer (generally harmful environment as glass) is used by using the boron oxide film 7 according to the formation of the base region 8 and the phosphorylation film 9 according to the formation of the emitter region 10. There is a defect such as noise generated because there is unnecessary charge transfer in the layer protecting the semiconductor junction and the surface.

The present invention was devised to solve such a conventional drawback, and after growing a thin thermal oxide film with a clean silicon surface and ion implanting it into an Intrinsic and Extrinsic base region by photo work. The oxide film is applied, and after that, only the coated oxide film of the base region is etched by photo work, the base region is formed by thermal diffusion, and the nitride film (Si ₃ N ₄ ) is applied, and the nitride film is formed by using a collector base electrode window and an emitter window mask. The layer is etched to form a nitride film pattern, and the collector electrode window, the emitter electrode window, and the base electrode window are opened to form the emitter region and the metal electrode of each terminal, thereby making the ion implantation depth by the uniform thin oxide film uniform. In addition to the base region, unnecessary charge transfer into a clean thermal oxide film is suppressed, and the same mask process is performed together with the nitride film. SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor device which can reduce the electrical defects caused by misalignment of masks when forming a fine pattern by forming a collet, a base window, and an emitter region to increase the degree of mask bonding. have.

The present invention having such an object will be described in detail with reference to the accompanying drawings, FIGS. 2 and 3 as follows. FIG. 2 is a schematic cross-sectional view of a semiconductor device according to the present invention, and FIGS. 3 (a) to 3 (c) are manufacturing process drawings according to the manufacturing method of the semiconductor device of the present invention, as shown in FIG. Likewise, after forming a high concentration N-type buried layer 2 for reducing the collector continuous resistance on the P-type silicon substrate 1, the N-type epitaxial layer 3 is grown, and on the surface of the N-type epitaxial layer 3, After growing the thermal oxide film to a thickness of 10,000Å, a high concentration N-type impurity and a high concentration P-type impurity are coated by photolithography and absorbed by thermal diffusion to form a high concentration N-type impurity layer 4 and a P-type impurity layer 5, Reduces the collector's continuous resistance and creates insulation against elements to prevent electrical influences from the outside

After doing so, the thermal oxide film was completely removed, and the clean thermal oxide film 21 was grown to a thickness of 1,000 Å, and a photoresist was applied to form an intrinsic base pattern, followed by ion implantation. P-type impurity boron 10 ¹⁴ -10 ¹⁵ pcs / cm 2 was used as a mask to inject (energy: about 100 KeV) to form an intrinsic base region portion 22, after which the photoresist was removed and again a new photoresist. To form an extrinsic base pattern through development and then inject and inject boron 10 ¹⁵ -10 ¹⁶ pcs / cm 2 (energy: about 100 KeV) to form an extrinsic base region part 23, and then Remove the photoresist. Next, as shown in FIG. 3 (b), an oxide film 24 containing no impurities is applied to a thickness of about 3,000 to 4,000 kPa, and then the photoresist is removed. Thereafter, the intrinsic base region 25 and the intrinsic base region 26 are formed through silicon lattice stabilization and thermal diffusion at a temperature of about 1,000-1,100 ° C.

Next, as shown in FIG. 3 (c), the nitride film 27 was applied 1,000-1,200 으로 by low pressure vapor deposition (LPCVD), and then a pattern of the collector and base electrode windows and the emitter window was formed using a mask. do.

After the photoresist development, the nitride film 27 is etched and the thermal oxide film 21 is left as it is in phosphoric acid (H ₃ PO ₄ ). After the photoresist is removed, the thermal oxide film 21 is etched by photoresist development using a mask of a collector electrode window and an emitter window by photolithography and then placed in a buffered hydrofluoric acid (Bufferde HF). Next, a high concentration N-type polycrystalline silicon film 28 is applied using 5,000 low pressure vapor deposition (LPCVD) to form a polysilicon electrode of a collector and an emitter by plasma etching.

Next, heat-diffusion is performed at a temperature of about 900-1,000 ° C. to form a collector region 29 and an emitter region 30 for resistance reduction, and then placed in buffered hydrofluoric acid without using a mask. The nitride film 27 and the high concentration N-type polycrystalline silicon The thermal oxide film 21 in the portion not applied to the film 28 is etched to open the base metal electrode window.

In this state, a compound of aluminum (AI) and silicon (Si) is applied to a thickness of 1-5 μm by using a sputtering apparatus, and then the emitter electrode 31 and the base as shown in FIG. The electrodes 32, 33 and collector electrodes 34 are formed, and then a temperature of 400-500 ° C. is used to improve the contact between the intrinsic base region 25 and the high concentration N-type polysilicon film 28. Metal heat treatment is performed at the degree.

As described in detail above, in the present invention, ion implantation into the uniform thermal oxide film 21 can reduce the variation in the junction depth, and since it is a clean thermal oxide film other than the base region, it reduces the amount of unnecessary charge transfer and the collector window heater. It proceeds twice and prevents the phenomenon of cutting at the time of forming the electrode metal, and forms the collector, the base window, and the emitter region in the same mask process after applying the nitride film, thereby increasing the degree of mask bonding. This can reduce the electrical defect caused by misalignment of the mask.

Claims (1)

Fabrication of a semiconductor device comprising a P-type silicon substrate 1, a high concentration N-type buried layer 2, an N-type epitaxial layer 3, a high concentration N-type impurity layer 4, a high concentration P-type impurity layer 5, and the like In the method, after the clean thermal oxide film 21 is grown on the N-type epitaxial layer 3, the patterns of the intrinsic base region portion 22 and the extrinsic base portion 23 are separated by photo work. After forming and injecting the P-type impurities, after applying the oxide film 24, only the high-concentration N-type impurity layer 4 and the upper oxide film 24 of the intrinsic base region portion 23 is etched and thermally diffused to the intrinsic base The region 25 and the extrinsic base region 26 are formed, and then, the nitride film 27 is coated to form a nitride film pattern. The thermal oxide film 21 is used to collect a collector and an emitter window, and to form a high concentration N type. The collector region 29 and the emitter region 30 are formed of the polysilicon film 28, and then the blades are formed. And forming an emitter electrode (31), a base electrode (32), a (33) and a collector electrode (34) by opening the electrode window of the string type base region (26).

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