KR890003166A - C2 encoder parity generation circuit - Google Patents

C2 encoder parity generation circuit Download PDF

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Publication number
KR890003166A
KR890003166A KR1019870008045A KR870008045A KR890003166A KR 890003166 A KR890003166 A KR 890003166A KR 1019870008045 A KR1019870008045 A KR 1019870008045A KR 870008045 A KR870008045 A KR 870008045A KR 890003166 A KR890003166 A KR 890003166A
Authority
KR
South Korea
Prior art keywords
finite
multiplier
generation circuit
parity generation
switch
Prior art date
Application number
KR1019870008045A
Other languages
Korean (ko)
Other versions
KR910000533B1 (en
Inventor
노일영
서정훈
Original Assignee
안시환
삼성전자 주식회사
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Publication date
Application filed by 안시환, 삼성전자 주식회사 filed Critical 안시환
Priority to KR1019870008045A priority Critical patent/KR910000533B1/en
Publication of KR890003166A publication Critical patent/KR890003166A/en
Application granted granted Critical
Publication of KR910000533B1 publication Critical patent/KR910000533B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Error Detection And Correction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

내용 없음No content

Description

C2 엔코더 패리티 생성회로C2 encoder parity generation circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도는 본 발명에 따른 회로도.1 is a circuit diagram according to the present invention.

Claims (1)

C2 엔코더 패리티 생성회로에 있어서, 소정의 정보심볼을 유한체덧셈기(43) 및 스위치(SW1)를 통해 유한체곱셈기(11-16)에 입력시키는 한편, 상기 유한체 곱셈기(11-16)와 상호 접속된 8-비트 쉬프트레지스터(51-56) 및 유한체덧셈기(31-35)로써 (19, 13)RS 엔코더를 구성하고, 소정의 다른 정보심볼을 유한체덧셈기(42) 및 스위치(SW2)를 통해 유한체곱셈기(17-22)에 입력시키는 한편, 상기 유한체곱셈기(17-22)와 상호 접속된 8-비트 쉬프트레지스터(57-62) 및 유한체덧셈기(36-40)로써 또 하나의 (19, 13)RS 엔코더를 구성하며, 또한 상기 두개의 (19, 13)RS 엔코더 사이에는 스위치(SW3)로 접속하는 동시에 상기 스위치(SW3)의 일단 및 8-비트 쉬프트레지스터(56)로 부터는 또다른 유한체 덧셈기(41)를 접속하여 구성됨을 특징으로 하는 C2 엔코더 패리티 생성회로.In the C2 encoder parity generation circuit, a predetermined information symbol is input to the finite multiplier 11-16 through the finite field adder 43 and the switch SW1, and is mutually associated with the finite field multiplier 11-16. The (19, 13) RS encoder is constituted by the connected 8-bit shift registers 51-56 and the finite field adder 31-35, and any other information symbols are defined by the finite field adder 42 and the switch SW2. Is input to the finite multiplier 17-22, while another 8-bit shift register 57-62 and a finite multiplier 36-40 are interconnected with the finite multiplier 17-22. And (19, 13) RS encoders, and between the two (19, 13) RS encoders with a switch SW3 and at the same time as one end of the switch SW3 and an 8-bit shift register 56. C2 encoder parity generation circuit, characterized in that is configured by connecting another finite field adder (41). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019870008045A 1987-07-24 1987-07-24 C2 encoder parity generating circuit for digital audio tape recorder KR910000533B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019870008045A KR910000533B1 (en) 1987-07-24 1987-07-24 C2 encoder parity generating circuit for digital audio tape recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019870008045A KR910000533B1 (en) 1987-07-24 1987-07-24 C2 encoder parity generating circuit for digital audio tape recorder

Publications (2)

Publication Number Publication Date
KR890003166A true KR890003166A (en) 1989-04-13
KR910000533B1 KR910000533B1 (en) 1991-01-26

Family

ID=19263251

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019870008045A KR910000533B1 (en) 1987-07-24 1987-07-24 C2 encoder parity generating circuit for digital audio tape recorder

Country Status (1)

Country Link
KR (1) KR910000533B1 (en)

Also Published As

Publication number Publication date
KR910000533B1 (en) 1991-01-26

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