KR880009504A - Integrated Circuits for Telephones with Electronic Lock - Google Patents

Abstract

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Description

Integrated Circuits for Telephones with Electronic Lock

As this is a public information case, the full text was not included.

2 is a block diagram of the electronic lock device of the present invention shown in FIG.

Claims (3)

The telephone number data inputted through the keypad circuit 100 is stored in the memory circuit 300 through the key input logic circuit 200, and the readout data is read out so that the latch circuit 500 and the output signal generating circuit 600 are read. In the signal generation circuit of the telephone for transmitting the dial signal generated through the switch through the trunk line of the switch, it is stored in the key input data and the memory of the memory circuit 300 sequentially input through the key input logic circuit 200. The comparator 420 which compares the cipher number data and detects a coincidence, and the control signal for unlocking the lock at the same time when both the key input data and the cipher number data are synchronized in the comparator 420. A decoder 440 for generating a signal, a reset unit 460 for initializing the decoder 440 according to the output signal of the decoder 440, and generating a reset signal for unlocking; 460 Exodus An integrated circuit for a phone with an electronic lock device, characterized in that comprises a lock circuit 400 consisting of an unlocking unit 480 for controlling the memory circuit 300 by the output signal. The method of claim 1, wherein the reset unit 460, when the input key (S ₆ , S ₇ ) and the key input that occurs when the key input by a predetermined number of digits in the locked state through the keypad circuit 100 Logic gates 461-465 for generating a locked set signal by logically combining the address signal S ₈ corresponding to the number of digits finally pressed, and the set signal and the reset signal output from the decoder 440. By the latch circuit 470 operated by the latch circuit, the OR signal 472 for logically combining the reset signal of the latch circuit 470 and the divided synchronization signal S ₁₁ , and the output signal and the key of the OR gate circuit 472. Electronic lock device, characterized in that consisting of the NAND gate 475 for resetting the decoder 440 by applying the lock release prevention signal (S ₉ ) and the reset signal (S ₁₀ ) of the initial state exceeding the input digits Integrated circuits for telephones. The oragate circuit of claim 1, wherein the unlocking unit 480 clears the counter of the memory circuit 300 by applying a control signal for unlocking the decoder 440 and a reset signal S _{10 in an} initial state. 485 and the reset signal of the reset unit 460 and the frequency dividing synchronization signal S ₁₁ to enable the data write address of the memory circuit 300 to input data through the keypad circuit 100. Memory of the memory circuit 300 by enabling the data read address counter of the memory circuit 300 by applying the NAND gate 482 and the inverted reset signal of the reset unit 460 to store the data in the memory. The integrated circuit for a phone with a lock device, characterized in that consisting of a Noah gate (484) for controlling to read the data in. ※ Note: The disclosure is based on the initial application.