KR880001287U - Digital data reproduction clock generation circuit - Google Patents

Digital data reproduction clock generation circuit

Info

Publication number
KR880001287U
KR880001287U KR2019860008907U KR860008907U KR880001287U KR 880001287 U KR880001287 U KR 880001287U KR 2019860008907 U KR2019860008907 U KR 2019860008907U KR 860008907 U KR860008907 U KR 860008907U KR 880001287 U KR880001287 U KR 880001287U
Authority
KR
South Korea
Prior art keywords
generation circuit
digital data
clock generation
data reproduction
reproduction clock
Prior art date
Application number
KR2019860008907U
Other languages
Korean (ko)
Other versions
KR900005132Y1 (en
Inventor
노일영
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019860008907U priority Critical patent/KR900005132Y1/en
Publication of KR880001287U publication Critical patent/KR880001287U/en
Application granted granted Critical
Publication of KR900005132Y1 publication Critical patent/KR900005132Y1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/14Digital recording or reproducing using self-clocking codes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/19Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
KR2019860008907U 1986-06-24 1986-06-24 Reproducing clock generating circuit of digital data KR900005132Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019860008907U KR900005132Y1 (en) 1986-06-24 1986-06-24 Reproducing clock generating circuit of digital data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019860008907U KR900005132Y1 (en) 1986-06-24 1986-06-24 Reproducing clock generating circuit of digital data

Publications (2)

Publication Number Publication Date
KR880001287U true KR880001287U (en) 1988-03-15
KR900005132Y1 KR900005132Y1 (en) 1990-06-09

Family

ID=19252950

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019860008907U KR900005132Y1 (en) 1986-06-24 1986-06-24 Reproducing clock generating circuit of digital data

Country Status (1)

Country Link
KR (1) KR900005132Y1 (en)

Also Published As

Publication number Publication date
KR900005132Y1 (en) 1990-06-09

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Legal Events

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A201 Request for examination
E902 Notification of reason for refusal
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19970829

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee