KR880000119B1 - Circuit of time signal by a digital clock - Google Patents

Abstract

In the invention, a digital clock for giving time signals is provided with a detector (1) and a pulse generator (2) responding to the detector output and is connected with selector (4) for time setting and a logic section (5) and a counter (3) for automatic resetting function by a delay (31) via the time signal output K, whose speaker (7) is open at one end for giving an arbitrary function but connects via a means with a switching section (6) for actuation by the output of the logic sect..

Description

Alarm circuit using digital clock

The accompanying drawings are circuit diagrams of the invention.

* Explanation of symbols for main parts of the drawings

A: Digital clock 1: Detector

2: pulse generator 3: counter

31: delay unit 4: number selector

5 logic unit 6 switching unit

The present invention relates to a self-explanatory circuit for arbitrarily selecting a time interval in a digital clock having a time signal function.

In the one-chip LCD digital clock known to date, crystal oscillators, clock circuits, etc., were almost all LSI-made in one chip.

In addition, they have been widely used for small and light wristwatches, portable watches, or desktops to match with calendars. On the other hand, digital clocks using LEDs or digitron tubes have been widely known, but since they are usually composed of logic ICs instead of one-chip processes, they are difficult to be suitably applied to portable devices, and are relatively bulky and weighty. It is usually used as a tabletop or a wall clock.

In addition to the one-chip process, the more functions are diversified, that is, the logic configuration such as alarm function, time signal, contracted time timer, and elapsed time timer becomes complicated, and accordingly, the number of logic components and the volume of the product increase.

Against this backdrop, various types of digital clocks have been commercialized as a timepiece, a timer, and an alarm function added to a small, light weight one-chip processor, but the time signal function is defined at the minute `` 0,0 ''. As the alarm would sound, its use was extremely limited.

If you have a patient who needs to take 6 medications 4 times a day at work, you should be reminded to improve 4 hours after taking 1 dose, or you may miss or forget about 1 or 2 hours. There are also concerns about the loss of efficacy, and the workers who repeat work at fixed time intervals lack the means to deal with it.

In this case, a person who has a time clock that sounds hourly can be reminded of the time interval relatively, but still more uncomfortable.

The present invention has been made to solve such inconvenience in the related art, which is simply combined with a single chip processor having a known commercialized time signal function or other clock logic configuration circuits, and automatically automatically selects an arbitrary time interval according to a user's selection. It is possible, and in particular, it is an object of the present invention to provide a random time automatic repeater name circuit that can be portable by small size and light weight.

This will be described in detail below.

As shown in the drawing, a digital oscillator (e.g., LX-3400) based on a typical one-chip processor having a built-in crystal oscillator, an LCD display panel, a clock function, and a timer and a time signal function is provided.

Here, the present invention connects the time output detector 1 by the rectifier diode D), the resistor R ₁ , and the capacitor C ₁ to an output terminal K that generates time output in units of time.

Its output stage connects a pulse generator (2) by a transistor (T ₁ ), a resistor (R ₂ ), a capacitor (C ₂ ), and an inverter (I), and a ripple counter (3) with three to four bits of output. The clock terminal CK is connected, and the number selector 4 by the switch S _b -S _d is connected to each bit terminal A ₀ -A ₂ thereof.

This number selection section 4 is passed through the logic section 5 by the gates G ₁ -G ₅ , and its output is connected to the resistors R ₃ , R ₄ , and the switching section 6 by the transistor T ₂ . It is connected to the input terminal while connecting to the reset terminal R of the counter 3 via the delay unit 31.

In the digital clock (A) output detector (1) an input end and an gongjeop one in (K) is a piezoelectric speaker (7) (if sound is small it is replaced as a transistor with small speakers possible) via three-contact switch (S _a ) Is connected to the common terminal, and contact (a) thereof is grounded, and contact (b) is connected to the transistor (T ₂ ) collector terminal of the switching unit 6, respectively.

Unmarked VD is the power supply, ZA is the clock start switch, S ₁ and S ₂ are the hour and minute adjustment switches, and h is the connection point.

According to the present invention having such a configuration, in the case of the digital clock LX-3400 applied here, when the minute number becomes "0", the time signal oscillation force is unconditionally outputted to the output stage K, which is applied to the piezoelectric speaker 7.

At this time, if the switch S _a becomes the fixed contact point (a), a time signal is normally generated in the unit of time, but when it is switched to the fixed contact point (b), the transistor T ₂ of the switching unit 6 is not turned on. If it doesn't work.

Therefore, assuming that the switch S _{a is} connected to the fixed contact b, the oscillating force of the first signal is rectified from the output terminal K to the diode D of the detector 1 so that the transistor of the pulse generator 2 is rectified. Unlock (T ₁ ).

As the charge charged in the capacitor C ₂ changes as the input charge of the inverter I changes while the charge charged in the capacitor C ₂ is normally discharged by the transistor T ₁ , one pulse is provided to the clock terminal CK of the counter 3 and the counter (3) proceeds with the counting operation.

When the counter 3 is a 3-bit unit, a truth table is constructed as shown in (Table 1).

TABLE 1

TABLE 2

And, as shown in Table 2, by selecting the switch (S _b -S _d ) of the selection unit 4 it is possible to arbitrarily select and set the number of units of time desired by the user. Therefore, if S _c is selected as the switch of the selector 4 when the count is advanced by the clock pulse generated by the time unit, for example, three clock pulses should be provided to the counter 3, and the counter 3 after 3 hours. ) to be a _1-bit logic is 1, which via the gate (G _5), thereby unloading the switching unit (6) the transistor (T _2).

Therefore, as the piezoelectric speaker 7 is connected to the ground point, the oscillating force generates an alarm or a time signal through the speaker 7.

In addition, one of the outputs of the gate G ₅ resets the counter 3 after a predetermined time of the retarder 31, and emits an alarm sound every three hours.

In the present invention, the digital clock of the 1-chip processor using LCD can be set at any time by the extremely simple logic and the addition of four selector switches. In addition, it is possible to manufacture a lightweight simple portable digital watch, and it is easy to manage patients in the medical industry, and it is necessary to repeatedly carry out arbitrary time intervals in addition to the effect of easily recognizing the medication time while being portable for individual patients. There is also a beneficial feature that can give value to the workers.

Claims (3)

A digital clock for generating a time signal, comprising a detection part (1) for detecting at least one oscillation force and a pulse generator (2) for generating pulses by the detected output at the time signal output end (K) thereof. The selector 4 for time setting and the counter 3 with automatic reset function by the delay unit 31 are connected, and one end of the speaker 7 of the time signal output K is opened. And a means for connecting a switching unit (6) to one side of the speaker (7) for providing a random selection function and performing a switching operation by the output of the sound logic unit (5). 2. The logic according to claim 1, wherein the selector 4 and the gates G ₁ -G _{5 are} provided at the output bit terminals A ₀ -A ₂ of the counter 3 by the changeover switch S _b -S _d . A counter circuit provided with automatic reset means by the unit (5) and the delay unit (31). A resistor (R ₁ ), a capacitor (C ₁ ) and a transistor (T ₁ ), a resistor (R ₂ ), a capacitor (C ₂ ) and an inverter (I) of the detector 1 having an appropriate time constant selection. _An oscillation force detection pulse circuit for one time clock generation operation after the detection of the oscillation force by the pulse generating means ₁ ).

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