KR870010456A - 신경 회로망 - Google Patents

신경 회로망 Download PDF

Info

Publication number
KR870010456A
KR870010456A KR870003476A KR870003476A KR870010456A KR 870010456 A KR870010456 A KR 870010456A KR 870003476 A KR870003476 A KR 870003476A KR 870003476 A KR870003476 A KR 870003476A KR 870010456 A KR870010456 A KR 870010456A
Authority
KR
South Korea
Prior art keywords
amplifier
value
conductance
input
neural network
Prior art date
Application number
KR870003476A
Other languages
English (en)
Inventor
스튜어트 덴커 존
Original Assignee
마이클 와이 · 엡스타인
아메리칸 텔리폰 앤드 텔레그라프 캄파니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 마이클 와이 · 엡스타인, 아메리칸 텔리폰 앤드 텔레그라프 캄파니 filed Critical 마이클 와이 · 엡스타인
Publication of KR870010456A publication Critical patent/KR870010456A/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06G—ANALOGUE COMPUTERS
    • G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Neurology (AREA)
  • Computational Linguistics (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Data Mining & Analysis (AREA)
  • General Health & Medical Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Computer Hardware Design (AREA)
  • Amplifiers (AREA)
  • Image Analysis (AREA)
  • Communication Control (AREA)
  • Multi Processors (AREA)

Abstract

내용 없음

Description

신경 회로망
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 신경 회로망의 표준 구조 도해도.
제2도는 두 개의 국부적 최소치를 갖는 에너지 함수 도시도.
제3도는 본 발명의 원리를 구체화하는 신경 회로망의 구조 도시도.

Claims (8)

  1. 입력 및 출력을 갖는 복수의 증폭기(10)와,
    상기 증폭기 각각의 입력에 입력 전류(41)를 인가하는 수단을 구비하는 신경 회로망에 있어서,
    상호 연결 매트릭스(20)는 둘다 제1미리 선택된 값 또는 제2미리 선택된 값인 콘덕턴스(T2i)를 지닌 상기 각 입력에 상기 증폭기의 각 출력을 접속하는 것을 특징으로 하는 신경 회로망.
  2. 제1항에 있어서,
    상기 미리 선택된 값중 하나는 실제로 0인 것을 특징으로 하는 신경 회로망.
  3. 제1항에 있어서,
    상기 증폭기는 반전 증폭기인 것을 특징으로 하는 신경 회로망.
  4. 입력 및 반전 출력을 갖는 복수의 증폭기와,
    상기 증폭기의 각 입력에 입력 전류를 인가하는 수단을 구비하는 복수의 국부적 최소치를 갖는 에너지 함수를 최소화하는 신경 회로망에 있어서,
    상호 연결 매트릭스는 둘다 제1미리 선택된 값 또는 제2미리 선택된 값인 콘덕턴스 Tij'를 지닌 상기 각 입력에 상기 증폭기의 각 비-반전 출력을 접속하며,
    여기서, 상기 Tij'은 i번째 증폭기의 출력과 i번째 증폭기의 입력사이의 콘덕턴스를 나타내며 여기서 상기 Tij' 콘덕턴스는 상기 회로망이 평형 상태에서 상기 복수의 국부적 최소치를 발생시키도록 선택된 것을 특징으로 하는 신경 회로망.
  5. 제4항에 있어서,
    다중-레벨 Tij값이 세트 발생 절차에 따라 선택된 상기 콘덕턴스는 상기 복수의 국부적 최소치를 갖는 에너지 함수를 발생하며, 반복적으로 Tij'값을 계산하는 것은 선택된 표현( Tij+TVi+Vj A)의 끝수를 버린 표시이며, 여기서 T 은 1보다 작고, Vi +은(VA-Tij"Vj A)이고, T|ij은 상기 이전 반복에서 나온 Tij'이며, VjA은 상기 국부적 최소치중 하나에 대한 j번째 성분이며, 상기 Tij'의 계산은 상기 최소치 전반에 걸쳐 수행되는 것을 특징으로 하는 신경 회로망.
  6. 제5항에 있어서,
    상기 끝수가 버려진 표시는 상기 선택된 표현의 사인을 알아냄으로써 실현되는 것을 특징으로 하는 신경 회로망.
  7. 제4항에 있어서,
    다중-레벨 Tij값이 세트 발생 절차에 따라 선택된 상기 콘덕턴스는 상기 복수의 국부적 최소치를 갖는 에너지 함수를 발생하며, 반복적으로 Tij'값을 계산하는 것은 선택된 표현의 끝수를 버린 표시이며, 여기서 T 은 1보다 작고, Vi +은(VA-Tij"Vj A)이고, Tij은 상기 이전 반복에서 나온 Tij'이며, VjA은 상기 국부적 최소치중 하나에 대한 j번째 성분이며, 상기 Tij'의 계산은 상기 최소치 전반에 걸쳐 수행되는 것을 특징으로 하는 신경 회로망.
  8. 제7항에 있어서,
    상기 끝수가 버려진 표시는 상기 선택된 표현의 사인을 알아냄으로써 실현되는 것을 특징으로 하는 신경 회로망.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR870003476A 1986-04-14 1987-04-11 신경 회로망 KR870010456A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/851,237 US4737929A (en) 1986-04-14 1986-04-14 Highly parallel computation network employing a binary-valued T matrix and single output amplifiers
US851237 1986-04-14

Publications (1)

Publication Number Publication Date
KR870010456A true KR870010456A (ko) 1987-11-30

Family

ID=25310310

Family Applications (1)

Application Number Title Priority Date Filing Date
KR870003476A KR870010456A (ko) 1986-04-14 1987-04-11 신경 회로망

Country Status (6)

Country Link
US (1) US4737929A (ko)
EP (1) EP0242110A3 (ko)
JP (1) JPS62295188A (ko)
KR (1) KR870010456A (ko)
CA (1) CA1258132A (ko)
IL (1) IL82173A (ko)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4809222A (en) * 1986-06-20 1989-02-28 Den Heuvel Raymond C Van Associative and organic memory circuits and methods
US4901271A (en) * 1987-01-20 1990-02-13 American Telephone And Telegraph Company, At&T Bell Laboratories Computational network
US5224066A (en) * 1987-03-16 1993-06-29 Jourjine Alexander N Method and apparatus for parallel implementation of neural networks
US4807168A (en) * 1987-06-10 1989-02-21 The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration Hybrid analog-digital associative neural network
US4903226A (en) * 1987-08-27 1990-02-20 Yannis Tsividis Switched networks
US4866645A (en) * 1987-12-23 1989-09-12 North American Philips Corporation Neural network with dynamic refresh capability
US4849925A (en) * 1988-01-15 1989-07-18 The United States Of America As Represented By The Secretary Of The Navy Maximum entropy deconvolver circuit based on neural net principles
EP0349819B1 (de) * 1988-07-05 1993-12-22 Siemens Aktiengesellschaft In integrierter Schaltungstechnik ausgeführtes digitales neuronales Netz
EP0400147B1 (en) * 1988-08-31 1997-10-15 Fujitsu Limited Neurocomputer
US5093781A (en) * 1988-10-07 1992-03-03 Hughes Aircraft Company Cellular network assignment processor using minimum/maximum convergence technique
US5201029A (en) * 1988-10-24 1993-04-06 U.S. Philips Corporation Digital data processing apparatus using daisy chain control
FR2644264B1 (fr) * 1989-03-10 1991-05-10 Thomson Csf Reseau neuronal analogique programmable
US5146541A (en) * 1989-06-19 1992-09-08 The United States Of America As Represented By The Secretary Of The Navy Signal phase pattern sensitive neural network system and method
US5113367A (en) * 1989-07-03 1992-05-12 The United States Of America As Represented By The Secretary Of The Navy Cross entropy deconvolver circuit adaptable to changing convolution functions
US5131073A (en) * 1989-07-12 1992-07-14 Ricoh Company, Ltd. Neuron unit and neuron unit network
US5185851A (en) * 1989-07-12 1993-02-09 Ricoh Company, Ltd. Neuron unit and neuron unit network
US5191637A (en) * 1989-07-12 1993-03-02 Ricoh Company, Ltd. Neuron unit and neuron unit network
US5058049A (en) * 1989-09-06 1991-10-15 Motorola Inc. Complex signal transformation using a resistive network
US5943653A (en) * 1989-09-21 1999-08-24 Ultradata Systems, Inc. Electronic coupon storage and retrieval system correlated to highway exit service availability information
US5021961A (en) * 1989-09-21 1991-06-04 Laser Data Technology, Inc. Highway information system
US5361328A (en) * 1989-09-28 1994-11-01 Ezel, Inc. Data processing system using a neural network
JP2724374B2 (ja) * 1989-10-11 1998-03-09 株式会社鷹山 データ処理装置
US5056037A (en) * 1989-12-28 1991-10-08 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Analog hardware for learning neural networks
US5581662A (en) * 1989-12-29 1996-12-03 Ricoh Company, Ltd. Signal processing apparatus including plural aggregates
US5167006A (en) * 1989-12-29 1992-11-24 Ricoh Company, Ltd. Neuron unit, neural network and signal processing method
JPH03236275A (ja) * 1990-02-14 1991-10-22 Olympus Optical Co Ltd メモリ素子およびメモリ装置
US5068662A (en) * 1990-09-27 1991-11-26 Board Of Supervisors Of Louisiana State University And Agricultural And Mechanical College Neural network analog-to-digital converter
JPH056356A (ja) * 1990-11-20 1993-01-14 Ricoh Co Ltd 信号処理方法及びその装置
JP2868640B2 (ja) * 1991-02-26 1999-03-10 株式会社東芝 ニューラル・ネットワークを用いた信号処理装置
US5276771A (en) * 1991-12-27 1994-01-04 R & D Associates Rapidly converging projective neural network
US5538915A (en) * 1992-06-05 1996-07-23 The Regents Of The University Of California Process for forming synapses in neural networks and resistor therefor
US5485548A (en) * 1992-08-01 1996-01-16 Ricoh Company, Ltd. Signal processing apparatus using a hierarchical neural network
JP3582737B2 (ja) * 1993-05-20 2004-10-27 株式会社リコー 信号処理装置
JPH07114524A (ja) * 1993-10-14 1995-05-02 Ricoh Co Ltd 信号処理装置
US6167390A (en) * 1993-12-08 2000-12-26 3M Innovative Properties Company Facet classification neural network

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3863231A (en) * 1973-07-23 1975-01-28 Nat Res Dev Read only memory with annular fuse links
DE2658222B1 (de) * 1976-12-22 1978-01-26 Siemens Ag Geraet zur ultraschallabtastung
US4536844A (en) * 1983-04-26 1985-08-20 Fairchild Camera And Instrument Corporation Method and apparatus for simulating aural response information
US4660166A (en) * 1985-01-22 1987-04-21 Bell Telephone Laboratories, Incorporated Electronic network for collective decision based on large number of connections between signals

Also Published As

Publication number Publication date
JPH0477351B2 (ko) 1992-12-08
IL82173A (en) 1991-07-18
JPS62295188A (ja) 1987-12-22
IL82173A0 (en) 1987-10-30
US4737929A (en) 1988-04-12
CA1258132A (en) 1989-08-01
EP0242110A2 (en) 1987-10-21
EP0242110A3 (en) 1989-01-04

Similar Documents

Publication Publication Date Title
KR870010456A (ko) 신경 회로망
Nuij A note on hyperbolic polynomials
Hines Efficient computation of branched nerve equations
Pimsner et al. Exact sequences for K-groups and Ext-groups of certain cross-product C*-algebras
Cockayne et al. Optimal domination in graphs
Tanaka Homoclinic orbits for a singular second order Hamiltonian system
Roorda et al. Frame buckling: An illustration of the perturbation technique
US5254889A (en) MOSFET analog multiplier
Siu et al. Convergence of Volterra series representation and BIBO stability of bilinear systems
Duff et al. H2-optimality conditions for reduced time-delay systems of dimension one
de Oliveira The δ-method for obtention of asymptotic distributions; applications
MY103050A (en) Continuous speech recognition system
Makino et al. On compactly supported solutions of the compressible Euler equation
Niazi et al. Ulam-Hyers-Stability for nonlinear fractional neutral differential equations
Priya et al. Performance measures of parallel tandem open queueing network
Chiu et al. Validity of the interference model for scattering
Kochergin On the complexity of computations in finite Abelian groups
Hasík et al. Two reasons for the appearance of pushed wavefronts in the Belousov-Zhabotinsky system with spatiotemporal interaction
Owens Asymptotic Stability of Differential Multi-pass Processes
Aczél et al. On the historical role of functional equations
Tingyu et al. Spacecraft power-signal composite network optimization algorithm based on DRL.
Uzawa Causal Indeterminacy of the Leontief Dynamic Input-Output System
KR870010457A (ko) 회로망
Sowunmi Saturation processes
Fang et al. On the wave motion and stability of dynamic systems with imperfect boundaries

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application