KR870000984Y1 - Mode detecting circuit of video tape recorder - Google Patents
Mode detecting circuit of video tape recorder Download PDFInfo
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- KR870000984Y1 KR870000984Y1 KR2019840013843U KR840013843U KR870000984Y1 KR 870000984 Y1 KR870000984 Y1 KR 870000984Y1 KR 2019840013843 U KR2019840013843 U KR 2019840013843U KR 840013843 U KR840013843 U KR 840013843U KR 870000984 Y1 KR870000984 Y1 KR 870000984Y1
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- mode
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- transistor
- output terminal
- video tape
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B15/00—Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
- G11B15/02—Control of operating function, e.g. switching from recording to reproducing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/90—Tape-like record carriers
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Abstract
내용 없음.No content.
Description
첨부된 도면은 본 고안 모우드 검출회로도이다.The accompanying drawings are the present invention mode detection circuit diagram.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
IC1: 모우드 판별용 집적소자 R1-R6: 저항IC 1 : Mode discriminating integrated device R 1 -R 6 : Resistance
D1-D6: 다이오드 Q1-Q3: 트랜지스터D 1 -D 6 : Diodes Q 1 -Q 3 : Transistors
본 고안은 값이 싼 집적소자를 이용하여 테이프에 기록된 각 모우드의 신호를 검출한 후, 그 검출신호를 간단한 구조의 회로를 통해 비디오 테이프 레코오더의 각(SP,LP,EP) 모우드 출력신호를 얻을 수 있게 한 비디오 테이프 레코오더의 모우드 검출회로에 관한 것이다.The present invention detects the signals of each mode recorded on the tape by using an inexpensive integrated device, and then outputs the detected signal to each (SP, LP, EP) mode output signal of the video tape recorder through a simple circuit. And a mode detecting circuit of a video tape recorder.
종래 비디오 테이프 레코오더의 모우드 검출회로에 있어서는 모우드 검출회로가 내장된 집적소자를 사용하여 에스피(Standard Playing), 엘 피(Long Playing), 이 피(Extended Playing) 출력을 집적소자의 출력단자로부터 직접 얻어 사용하므로 사용상 편리한 점은 있으나, 모우드 검출회로가 내장된 집적소자의 가격이 비싼 결점이 있었고, 또한 집적소자의 출력단자에서 출력된 각 모우드의 출력을 직접 사용하는 데에는 제한이 따르게 되므로, 별도의 버퍼를 연결하여야 되고, 이에 따라 제품의 원가가 상승되는 결점이 있었다.In the conventional video tape recorder's mode detection circuit, the SPE (Standard Playing), LONG (Playing), and this P (Extended Playing) output are directly outputted from the output terminal of the integrated device using an integrated device having a built-in mode detection circuit. Although it is convenient to use because it is obtained and used, an integrated device with a built-in mode detection circuit has a disadvantage of being expensive, and there is a limitation in directly using the output of each mode output from the output terminal of the integrated device. A buffer had to be connected, resulting in a cost increase of the product.
본 고안은 이러한 점을 감안하여, 값이 싼 집적소자를 이용하여 각 모우드의 출력신호를 논리신호로 얻은 후, 그 논리신호를 간단한 구조의 회로를 통해 각 모우드의 출력신호를 얻을 수 있게 안출한 것으로, 으를 첨부된 도면에 의하여 보다 상세히 설명하면 다음과 같다.In view of this, the present invention obtains the output signal of each mode as a logic signal by using a low-cost integrated device, and then the logic signal is designed to obtain the output signal of each mode through a circuit having a simple structure. As will be described in more detail by the accompanying drawings as follows.
첨부된 도면에 도시한 바와 같이, 모우드 판별용 집적소자(IC1)의 출력단자(a)를 다이오드(D1)를 통하여 트랜지스터(Q1)의 베이스에 접속하여 그의 에미터를 접지저항(R2) 및 출력단자(EP)에 접속하고, 모우드 판별용 집적소자(IC1)의 출력단자(b)를 저항(R3)을 통하여 트랜지스터(Q2)의 베이스에 접속하여 그의 콜렉터를 접지저항(R4) 및 출력단자(SP)에 접속하며, 트랜지스터(Q1), (Q2)의 에미터 및 콜렉터를 다이오드(D2), (D3)를 각각 통하여 접지저항(R5) 및 트랜지스터(Q3)의 베이스에 직렬 접속된 다이오드(D4), (D5)에 접속하여, 그 트랜지스터(Q3)의 콜렉터를 접지저항(R6) 및 출력단자(LP)에 접속하여 구성한 것으로, 여기서 모우드 판별용 집적소자(IC1)는 레이프에 기록된 콘트롤 펄스의 간격과 캡스턴(Capstan)에 의하여 레이프에 기록된 모우드를판별하여, 즉SP 모우드는 그의 출력단자(a),(b)에 논리신호 "0", "0"를 각각 출력하고, LP모우드는 그의 출력단자(a),(b)에 논리신호 "0", "1"를 각각 출력하며, EP 모우드는 그의 출력단자(a),(b)에 논리신호 "l", "1"를 각각 출력하게 되어 있으며, 도면의 설명중 부호 B+는 전원단자이다.As shown in the accompanying drawings, the output terminal a of the mode discriminating integrated device IC 1 is connected to the base of the transistor Q 1 through the diode D 1 , and its emitter is connected to the ground resistance R. FIG. 2 ) and the output terminal EP, the output terminal (b) of the mode discrimination integrated device IC 1 is connected to the base of the transistor Q 2 through the resistor R 3 , and the collector thereof is grounded. (R 4 ) and the output terminal (SP), and emitters and collectors of transistors (Q 1 ), (Q 2 ) through the diode (D 2 ), (D 3 ), respectively, the ground resistance (R 5 ) and by connecting a transistor (Q 3) connected in series to the diode (D 4), (D 5 ) to the base of the transistor resistance to ground the collectors of (Q 3) (R 6) and an output terminal configured to connect to the (LP) that, where the integrated device for the modal determination (IC 1) is the distance by the capstan of the control pulses recorded on grapefruits (capstan) recorded in the grapefruits Motor In other words, the SP mode outputs logic signals "0" and "0" to its output terminals (a) and (b), respectively, and the LP mode outputs the logic signals "to its output terminals (a) and (b). 0 "," 1 "and outputs to and, EP modal has its output terminals (a), (b) a logic signal to the" l "," which is the respective output 1 ", and reference numeral b + of the description of the drawings is a power It is a terminal.
이와같이 구성된 본 고안의 작용효과를 상세히 설명하면 다음과 같다.Referring to the effects of the present invention configured in this way in detail as follows.
전원(B+)이 인가된 상태에서 SP 모우드이면, 상기의 설명에서와 같이 모우드 판별용 집적소자(IC1)의 출력단자(a)(b)에서 논리신호 "0", "0"이 출력되므로 트랜지스터(Q1)는 오프되고, 트랜지스터(Q2)는 온된다. 이에 따라 트랜지스터(Q2)의 콜렉터에는 고전위 신호가 출력되므로 출력단자(SP)에 SP 모우드 출력신호가 출력된다. 이때 트랜지스터(Q3)의 콜렉터에 출력된 고전위 신호는 다이오드(D3)를 통하여 다이오드(D4)의 캐소드에 인가되므로 트랜지스더(Q2)가 오프되어 출력단자(LP)에는 출력신호가 없게 된다.If the SP mode is in the state where the power supply B + is applied, the logic signals "0" and "0" are output from the output terminals (a) (b) of the mode discriminating integrated device IC 1 as described above. The transistor Q 1 is thus turned off and the transistor Q 2 is turned on. Accordingly, since the high potential signal is output to the collector of the transistor Q 2 , the SP mode output signal is output to the output terminal SP. At this time, since the high potential signal output to the collector of the transistor Q 3 is applied to the cathode of the diode D 4 through the diode D 3 , the transistor Q 2 is turned off and the output terminal LP is output to the output terminal LP. There will be no.
그러나, EP 모우드이면, 상기에서와 같이 모우드 판별용 집적소자(IC1)의 출력단자(a),(b)에서 논리신호 "1", "1"이 출력되므로 트랜지스터(Q1)는 온되고, 트랜지스터(Q2)는 오프되며, 이에 따라 트랜지스터(Q1)의 에미터에 고전위 신호가 출력되므로 출력단자(EP)에 EP 모우드 출력신호가 출력되고, 또한 이때 트랜지스터(Q1)의 에미터에 출력된 고전위 신호가 다이오드(D2)를 통하여 다이오드(D4)의 캐소드에 인가되므로 상기와 같이 출력단자(LP)에는 출력신호가 없게 된다.However, in the EP mode, since the logic signals "1" and "1" are output from the output terminals (a) and (b) of the mode discriminating integrated device IC 1 as described above, the transistor Q 1 is turned on. a transistor (Q 2) is off, and therefore, so is output to the output terminal (EP) is EP the mode output signal is the high potential signal outputted to the emitter of the transistor (Q 1), also this time the emitter of the transistor (Q 1) Since the high potential signal output to the emitter is applied to the cathode of the diode D 4 through the diode D 2 , the output terminal LP has no output signal as described above.
또한, LP 모우드이면 상기와 같이 모우드 판별용 집적소자(IC1)의 출력단자(a),(b)에 논리신호 "0", "1" 각각 출력되므로 트랜지스터(Q1),(Q2) 모두가 오프되고, 이에 따라 트랜지스터(Q3)의 베이스에 저전위 신호가 인가되어 온되므로, 그의 콜렉터에 고전위 신호가 출력되어 LP모우드 출력단자(LP)에 인가된다.In the LP mode, since the logic signals "0" and "1" are respectively output to the output terminals (a) and (b) of the mode discriminating integrated device IC 1 as described above, the transistors Q 1 and (Q 2 ). Since all of them are turned off and a low potential signal is applied to the base of the transistor Q3, a high potential signal is output to its collector and applied to the LP mode output terminal LP.
이상에서와 같이 본 고안은 값이 싼 집적소자를 이용하여 각 모우드의 논리신호를 얻은 후, 그 논리신호를 간단히 구조의 회로를 통하여 각 모우드 출력신호를 얻을 수 있고, 또한 각 모우드 출력신호의 용량이 사용 트랜지스터의 용량설정에 의해 결정되므로, 별도의 버퍼가 필요없게 되어 제품의 원가가 절감되는 이점이 있게 된다.As described above, the present invention obtains a logic signal of each mode by using an inexpensive integrated device, and then obtains each mode output signal through a circuit of the structure, and also the capacity of each mode output signal. Since it is determined by the capacitance setting of the transistor used, there is no need for a separate buffer, thereby reducing the cost of the product.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019840013843U KR870000984Y1 (en) | 1984-12-24 | 1984-12-24 | Mode detecting circuit of video tape recorder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019840013843U KR870000984Y1 (en) | 1984-12-24 | 1984-12-24 | Mode detecting circuit of video tape recorder |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR860008592U KR860008592U (en) | 1986-07-28 |
| KR870000984Y1 true KR870000984Y1 (en) | 1987-03-18 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019840013843U KR870000984Y1 (en) | 1984-12-24 | 1984-12-24 | Mode detecting circuit of video tape recorder |
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|---|---|
| KR (1) | KR870000984Y1 (en) |
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1984
- 1984-12-24 KR KR2019840013843U patent/KR870000984Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR860008592U (en) | 1986-07-28 |
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