KR860009350A - Interface circuit for driving floppy disk driver - Google Patents

Interface circuit for driving floppy disk driver Download PDF

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Publication number
KR860009350A
KR860009350A KR1019850003696A KR850003696A KR860009350A KR 860009350 A KR860009350 A KR 860009350A KR 1019850003696 A KR1019850003696 A KR 1019850003696A KR 850003696 A KR850003696 A KR 850003696A KR 860009350 A KR860009350 A KR 860009350A
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KR
South Korea
Prior art keywords
terminal
output terminal
buffer
terminals
fdd
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KR1019850003696A
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Korean (ko)
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KR880000502B1 (en
Inventor
함찬호
Original Assignee
이재연
금성통신 주식회사
하인츠 디터 케루트
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Priority to KR1019850003696A priority Critical patent/KR880000502B1/en
Publication of KR860009350A publication Critical patent/KR860009350A/en
Application granted granted Critical
Publication of KR880000502B1 publication Critical patent/KR880000502B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing Of Magnetic Record Carriers (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

내용 없음No content

Description

플로피 디스크 드라이버의 구동용 인터페이스회로Interface circuit for driving floppy disk driver

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

첨부된 도면은 본 발명 인터페이스 회로의 상세도이다.The accompanying drawings are detailed views of the present invention interface circuit.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 표준형 FDD 시험장치 2 : 애플형 FDD1: Standard FDD tester 2: Apple FDD

3, 9 : 플립플롭 4 : 스텝신호제어용 집적소자3, 9: flip-flop 4: step signal control integrated device

5, 6 : 듀얼리트리거터블 단안정 멀티바이브레이터5, 6: Dual retriggerable monostable multivibrator

7, 8 : 듀얼타이머 11, 12 : 카운터7, 8: dual timer 11, 12: counter

13, 14 : 세븐 세그멘트 구동용 집적소자13, 14: seven segment driving integrated device

15, 16 : 세븐 세그멘트 액정표시장치 17 : 인덱스홀 검출부15, 16: seven segment liquid crystal display 17: index hole detector

B1-B4: 버퍼 I1-I8: 인버터B 1 -B 4 : Buffer I 1 -I 8 : Inverter

OR1: 오아게이트 NAND1: 낸드게이트OR 1 : OA gate NAND 1 : NAND gate

Claims (1)

표준형 FDD 시험 장치(1)의 기록데이터 출력단자( 1)와 기록게이트 신호 출력단자( 1)를 플립플롭(3) 및 버퍼(B1)와, 버퍼(B2)를 각각 통하여 애틸형 FDD(2)의 기록데이터 입력단자( 2)와 기록게이트 신호 입력단자( 2)에 접속하고, 인덱스홀 검출부(17)의 출력측과 애플형 FDD(2)의 재생데이터 및 기록프로텍트 검출신호 출력단자( 2), ( 2)를 인버터(I6),(I7),(I8)를 각각 통하여 표준형 FDD 시험장치(1)의 인덱스홀 검출신호 및 재생데이터, 기록프로텍트 검출신호 입력단자(),( 1),( 1)에 접속하며, 표준형 FDD 시험장치(1)의 스텝신호 및 방향신호 입력단자(STIN),(DIRIN)에 접속하여 그의 출력단자(Q1-Q4)를 듀얼리트거터블 단안정 멀티바이브레이터(5,6) 및 듀얼타이머(7,8)를 통하여 스텝신호 입력단자(Y1-Y4)에 접속하고, 상기 버퍼(B3)의 출력단자에 접속된 인버터(I1)와 버퍼(B4)의 출력단자를 플립플롭(9)의 입력단자(T),(D)에 접속하여 그의 출력단자를 카운터(11),(12)의 업/다운 입력단자에 접속하고, 그 카운터(11)의 입력단자(T)와 캐리 신호 출력단자(CA)를 상기 버퍼(B3)의 출력단자와 카운터(12)의 입력단자(T)에 각각 접속하여 그의 출력단자(QA-QD),(QA,QB)를 세분 세그멘트 액정 표시장치(15),(16)의 구동용 집적소자(13),(14)의 입력단자(DA-DD),(DA,DB) 및 오아게이트(OR1)의 입력단자에 접속하며, 그 오아게이트(OR1)의 출력단자를 인버터(I3),(I4)를 통하여 표준형 FDD 시험장치(1)의 영트랙 검출신호 입력단자에 접속하는 한편, 그 인버터(I3)의 출력단자를 카운터(12)의 인에이블단자에 접속한 후 그 접속점과 상기 버퍼(B4)의 출력단자를 낸드 게이트(NAND1)를 통하여 스텝신호 제어용 집적소자(4)의 인에이블 단자(EN)에 접속하여 구성함을 특징으로 하는 플로피 디스크 드라이버의 구동용 인터페이스 회로.Record data output terminal of the standard FDD test apparatus 1 1 ) and the recording gate signal output terminal ( 1 ) through the flip-flop 3, the buffer B 1 , and the buffer B 2 , respectively, and the write data input terminal of the attic type FDD 2. 2 ) and recording gate signal input terminal ( 2 ), the output side of the index hole detection unit 17 and the reproduction data and recording protection detection signal output terminal of the Apple FDD 2 ( 2 ), ( 2 ) through the inverters (I 6 ), (I 7 ), and (I 8 ) respectively, the index hole detection signal, the reproduction data, and the recording protection detection signal input terminal of the standard FDD test apparatus 1 ( ), ( 1 ), ( 1 ), and connect the step signal and direction signal input terminals (STIN) and (DIRIN) of the standard FDD test apparatus (1) to connect the output terminals (Q 1 -Q 4 ) to the dual retardable monostable multivibrator. Inverter I 1 and buffer (5, 6) and dual timers (7, 8) connected to the step signal input terminals (Y 1- Y 4 ) and connected to the output terminals of the buffer (B 3 ). B 4 ) is connected to the input terminals T and D of the flip-flop 9 and the output terminal thereof. Up / down input terminals of counters 11 and 12 The input terminal T and the carry signal output terminal CA of the counter 11 are connected to the output terminal of the buffer B 3 and the input terminal T of the counter 12, respectively, and their outputs. The terminals Q A -Q D and Q A , Q B are input segments D A -D D of the driving integrated elements 13 and 14 of the subdivision segment liquid crystal display devices 15 and 16. ), (D a, D B ) and Iowa, and connected to an input terminal of a gate (OR 1), the Iowa gate an output terminal of a (OR 1) inverter (I 3), the standard FDD test device through the (I 4) Zero track detection signal input terminal (1) While the output terminal of the inverter I 3 is connected to the enable terminal of the counter 12 And the connection point and the output terminal of the buffer B 4 are connected to the enable terminal EN of the step signal control integrated device 4 through the NAND gate NAND 1 . Interface circuit for driving a disk driver. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019850003696A 1985-05-28 1985-05-28 Interface circuit of floppy disc driver KR880000502B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019850003696A KR880000502B1 (en) 1985-05-28 1985-05-28 Interface circuit of floppy disc driver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019850003696A KR880000502B1 (en) 1985-05-28 1985-05-28 Interface circuit of floppy disc driver

Publications (2)

Publication Number Publication Date
KR860009350A true KR860009350A (en) 1986-12-22
KR880000502B1 KR880000502B1 (en) 1988-04-08

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Application Number Title Priority Date Filing Date
KR1019850003696A KR880000502B1 (en) 1985-05-28 1985-05-28 Interface circuit of floppy disc driver

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100334668B1 (en) * 1998-06-03 2002-08-24 삼성전기주식회사 Brushless motor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100334668B1 (en) * 1998-06-03 2002-08-24 삼성전기주식회사 Brushless motor

Also Published As

Publication number Publication date
KR880000502B1 (en) 1988-04-08

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