KR840003574A - Multilayer Panel Board - Google Patents

Multilayer Panel Board Download PDF

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Publication number
KR840003574A
KR840003574A KR1019830000336A KR830000336A KR840003574A KR 840003574 A KR840003574 A KR 840003574A KR 1019830000336 A KR1019830000336 A KR 1019830000336A KR 830000336 A KR830000336 A KR 830000336A KR 840003574 A KR840003574 A KR 840003574A
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KR
South Korea
Prior art keywords
electrical
electrically
layer
conducting
panel board
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KR1019830000336A
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Korean (ko)
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리어리(외1) 버톤
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로버트 알. 포스버그
머팩 코오포레이숀
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Publication of KR840003574A publication Critical patent/KR840003574A/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K5/00—Casings, cabinets or drawers for electric apparatus
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/222—Completing of printed circuits by adding non-printed jumper connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/0287—Programmable, customizable or modifiable circuits having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0191—Dielectric layers wherein the thickness of the dielectric plays an important role
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09309—Core having two or more power planes; Capacitive laminate of two power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09609—Via grid, i.e. two-dimensional array of vias or holes in a single plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10287—Metal wires as connectors or conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10333—Individual female type metallic connector elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Connecting Device With Holders (AREA)

Abstract

내용 없음No content

Description

다층 패널 보오드Multilayer Panel Board

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 감아 붙임 소켓 단자와 판금된 구멍의 석쇠무늬 부분을 표시하는 다층 패널 보오드의 상측 평면도.1 is a top plan view of a multi-layer panel board showing coiled socket terminals and grilled portions of sheet metal holes.

제2도는 제3도에 보인 보오드의 A-A′면을 따라 확대된 측단면도.FIG. 2 is an enlarged side sectional view along the plane A-A 'of the board shown in FIG.

제3도는 제1도에 표시된 석쇠무늬부분의 확대된 도면.3 is an enlarged view of the grille pattern shown in FIG.

Claims (24)

전자부품을 설치하기 위한 다층 패널 보오드(10)에 있어서, 첫번째 전원을 통하는 첫번째 통전층(18)과, 전기 첫번째 전원과 다른 2번째 전원을 통하는 2번째 전원을 통하는 2번째와 3번째 통전층(16,20)을 포함하고, 전기 첫번째 통전층은 전기 2번째와 3번재 통전층 사이에 위치하고, 그리고 첫번째와 2번째 절연층(24,26)은 2번째와 3번째 통전층(16,20)에 대해 전기 첫번째 통전층(18)을 분리하고, 전기 첫번째 통전층은 전기 2번째와 3번째 통전층에 대해 각각 전기 첫번째와 2번째 절연층에 의해 분리되어 전기 첫번째 통전층과 전기 2번째와 3번째 통전층 사이에 큰 분포용량을 산출하도록 충분히 작은 간격을 갖는 것을 특징으로 하는 다층 패널 보오드.In the multilayer panel board 10 for installing electronic components, the second and third conductive layers 18 through the first conductive layer 18 through the first power source and the second power source through the second power source different from the first electrical power source ( 16,20, wherein the first conductive layer is located between the second and third conductive layers, and the first and second insulating layers 24, 26 are the second and third conductive layers 16,20. The first conducting layer 18 is separated from each other, and the first conducting layer is separated by the first and second insulating layers, respectively, for the second and third conducting layers, respectively. A multilayer panel board having a small enough gap to yield a large distribution capacity between the second conducting layer. 제1항에 있어서, 전기 첫번째 전원을 통하는 4번째의 통전층(14)을 추가로 포함하고 전기 4번째 통전층은 전기 첫번째 통전층(18)에 대해 전기 2번째 통전층(16)의 바깥면에 위치하고, 3번째 절연층(22)은 전기 2번째 통전층(16)으로 부터 전기 4번째 통전층을 분리하는 것을 특징으로 하는 다층 패널 보오드.The electrical current carrying layer (14) of claim 1, further comprising a fourth conductive layer (14) through an electrical first power source, wherein the fourth conductive layer is an outer surface of the electrical second conductive layer (16) relative to the first conductive layer (18). Located in, the third insulating layer 22 is a multilayer panel board, characterized in that for separating the fourth electrical conducting layer from the second electrical conducting layer (16). 제2항에 있어서, 보오드의 전류 이송용량을 증가시키고 보오드에 걸친 저항을 감소시키기 위하여 전기 첫번째와 4번째 통전층(14,18)사이와, 전기 2번째와 3번째 통전층(16,20)사이에 전기적 연결수단(28,30)을 포함하는 것을 특징으로 하는 다층 패널보오드.3. The method according to claim 2, wherein the first and fourth conducting layers (14,18) and the second and third conducting layers (16,20) are electrically used to increase the current carrying capacity of the board and reduce the resistance across the board. Multilayer panel board, characterized in that it comprises an electrical connection means (28,30) between. 제3항에 있어서, 전기 전기적 연결수단(28,30)은 전기 보오드를 통해 다수의 통전 접지통로와 통전전원 통로를 포함하며, 전기 접지통로와 전원통로는 각기 일정하게 전기 보오드를 가로질러 간격지워진 것을 특징으로 하는 다층 패널 보오드.4. The electrical and electrical connection means (28, 30) according to claim 3, comprising a plurality of energized ground passages and energized power passages via electrical boards, each of which is uniformly spaced across the electrical board. Multi-layer panel board, characterized in that. 제4항에 있어서, 전기 각 접지통로는 가장 가까이 인접한 접지 통로로 부터 최대 0.8인치(20.320㎜)의 간격을 갖는 것을 특징으로 하는 다층 패널 보오드.5. The multilayer panel board of claim 4, wherein the electrical angular ground passages have a spacing of up to 0.8 inches (20.320 mm) from the nearest adjacent ground passage. 제4항과 5항에 있어서, 전기 전원통로는 가장 가까이 인접한 전원통로로 부터 최대 0.8인치(20.320㎜)의 간격을 갖는 것을 특징으로 하는 다층 패널 보오드.6. The multilayer panel board of claim 4 or 5, wherein the electrical power path has a distance of at most 0.8 inches (20.320 mm) from the nearest adjacent power path. 제4항∼제6항에 있어서, 전기 보오드를 가로지르는 전기 접지통로의 밀도는 적어도 평방인치당 3통로(3통로/645.163㎟)인 것을 특징으로 하는 다층패널 보오드.7. The multilayer panel board according to claim 4, wherein the density of the electrical ground passages across the electrical boards is at least three passages per square inch (three passages / 645.163 mm2). 제4항∼제7항에 있어서, 전기 보오드를 가로지르는 전기 전원통로의 밀도는 적어도 평방인치당 3통로(3통로/645.163㎟)인 것을 특징으로 하는 다층패널 보오드.8. The multilayer panel board according to claim 4, wherein the density of the electrical power passages across the electrical boards is at least three passages per square inch (three passages / 645.163 mm2). 제1항에 있어서, 전기 첫번째와 2번째 절연층(24,26)과 전기 첫번째 통전층(18)을 통해 전기 2번째와 3번째 통전층(16,20)에 연결되는 제1그룹의 통전통로(30)와, 전기 제1그룹의 통전통로(30)는 전기 첫번째 통전층(18)으로 부터 전기적으로 절연되고, 전기 제1그룹의 통전통로는 전기 보오드를 가로질러 다수의 간격지워진 점에 위치하고, 이로서 전기 2번째와 3번째 통전층(16,20)위의 모든 점에 균일하게 유지되는 전기 2번째 전원을 포함하는 것을 특징으로 하는 다층패널 보오드.The first group of energizing currents of claim 1, which is connected to the second and third electric currents (16,20) through the first and second insulating layers (24,26) and the first electric current (18). The furnace 30 and the first group of energizing passages 30 are electrically insulated from the first first conductive layer 18 of electricity, and the first and second groups of electrically conductive passages are spaced apart across the electrical board. A multi-layer panel board, characterized in that it comprises an electrical second power source located at a point, thereby maintaining uniformly at all points on the second and third conductive layers (16,20). 제9항에 있어서, 전기 첫번째 전원을 통하는 4번째 통전층(14)과, 전기 4번째 통전층은 전기 첫번째 통전층(18)에 대해 전기 2번째 통전층(16)의 바깥면에 위치하고, 3번째 절연층(22)은 전기 2번째 통전층(16)으로 부터 전기 4번째 통전층(14)을 분리시키고, 전기 첫번째와 3번째 절연층(24,22)과 전기 2번째 통전층을 통해 전기 첫번째나 4번째 통전층(14,18)에 연결되는 제2그룹의 통전통로(28)와, 전기 제2그룹의 통전통로는 전기 2번째 통전층(16)으로 부터 전기적으로 절연되고, 전기 제2그룹의 통전통로는 보오드를 가로질러 다수의 간격지워진 점에 위치하고 여기서 전기 첫번째와 4번째 통전층(14,18)위의 모든 점에 균일하게 유지되는 전기 첫번째 전원을 포함하는 것을 특징으로 하는 다층 패널 보오드.The fourth conductive layer 14 and the fourth conductive layer through the first electrical power source are located on the outer surface of the electrical second conductive layer 16 with respect to the first conductive layer 18. The first insulating layer 22 separates the fourth electrical conducting layer 14 from the second electrical conducting layer 16, and the first and third insulating layers 24 and 22 and the second electrical conducting layer through the electricity. A second group of conducting passages 28 connected to the first or fourth conducting layers 14 and 18, and a second conducting passage of the second group of electrical insulated from the second conducting layer 16; The conducting passage of the second group of electricity comprises an electrical first power source located at a number of spaced points across the board, wherein the electrical first power source is maintained uniformly at all points on the first and fourth conducting layers 14, 18. Multilayer panel board. 제10항에 있어서, 전기 통전통로는 보오드를 통하여 구멍(28,30)을 포함하고, 전기 각 구멍은 전기 첫번째, 2번째, 3번째, 4번째 통전층(18,16,20,14)과 전기 첫번째, 2번째, 3번째 절연층(24,26,22)을 통하여 같은 축의 구멍 부분(42,44,46,76,78,80)과, 전기 구멍부분의 내부 표면위에 전기적 통전판금(40,70)을 포함하고, 전기 제2의 통전통로의 전기 구멍부분(42,44,46)과 전기판금(40)은 전기 판금(40)이 전기 첫번째와 4번째 통전층(18,14)에 전기적으로 접속되고 또 전기 2번째 통전층에 전기적으로 절연되게 배치되어지고, 또 전기 제1그룹의 통전통로의 구멍부분(76,78,80)과 전기 판금(70)은 전기판금(70)이 전기 2번째와 3번째 통전층(16,20)에 전기적으로 접속되고 전기 첫번째 통전층(18)에는 전기적으로 절연되어 있는 것을 특징으로 하는 다층 패널 보오드.11. The electrical current path of claim 10, wherein the electrical current path includes holes 28, 30 through the board, each electrical hole having electrical first, second, third, and fourth conductive layers 18,16,20,14. Through the first, second, and third insulating layers 24, 26, and 22 through the coaxial hole portions 42, 44, 46, 76, 78, 80, and on the inner surface of the electric hole portions; 40 and 70, wherein the electrical hole portions 42, 44 and 46 and the electrical sheet metal 40 of the second electrical current flow path are provided with the electrical sheet metal 40 and the first and fourth conductive layers 18 and 14, respectively. And the electrical parts of the first and second electrical conducting passages (76, 78, 80) and the electrical sheet metal (70) are electrically connected to the second conductive layer. 70. A multilayer panel board, wherein 70 is electrically connected to the second and third conductive layers 16 and 20, and electrically insulated from the first conductive layer 18. 제11항에 있어서, 전기 구멍(28,30)들은 일정하게 보오드를 통해 분배되어진 것을 특징으로 하는 다층 패널 보오드.12. The multi-layer panel board according to claim 11, wherein the electrical holes (28,30) are uniformly distributed through the board. 제12항에 있어서, 전기 구멍(28,30)들은 열(224)과 행(226)으로 배열되고, 전기 각열(224)에 있는 각각의 구멍은 전기 제1그룹의 통전통로(30)에 속하며 또 전기열(224)안에 근접해 있는 각 구멍들은 전기 제2그룹의 통전통로(28)에 속하고, 전기 각 행(226)에 있는 각각의 전기 구멍(30)은 전기 제1그룹의 통전통로(30)에 속하며 또 전기 열(226)에 있는 각 근접한 구멍(28)들은 전기 제2그룹의 통전통로(28)에 속하고, 어떠한 두발달린 전자 소자라도 보오드위에 어느 곳이나 전기 각열(224)이나 행(226)에 평행으로 향해서 장치되어져서, 전기 두발달린 소자의 한쪽발이 전기 제1그룹의 통전통로(30)에 접속되고 다른 한발이 전기 제2그룹의 통전통로(28)에 접속되어지는 것을 특징으로 하는 다층 패널보오드.13. The electrical holes 28 and 30 are arranged in columns 224 and rows 226, with each hole in the electrical column 224 being connected to an electrical first flow path 30 of the first group. Each hole belonging to and adjacent to the electric column 224 belongs to the electric current path 28 of the second electric group, and each electric hole 30 in each electric row 226 is the electric current of the electric first group. Each adjacent hole 28 belonging to the traditional furnace 30 and in the electric column 226 belongs to the electric current path 28 of the second group of electricity, and any two-wheeled electronic element is placed on the board anywhere on the board. 224 or row 226 parallel to each other, so that one foot of the electric two-wheeled element is connected to the electricity flow path 30 of the first electric group and the other foot is the electricity flow path 28 of the second electric group. Multilayer panel board characterized in that it is connected to). 제1항∼제13항에 있어서, 전기 2번째 전원은 접지 레벨인 것을 특징으로 하는 다층패널 보오드.14. The multilayer panel board of claim 1, wherein the second electrical power source is at ground level. 제1항∼제13항에 있어서, 2번째와 3번째 도전층에서 첫번째 도전층의 분리간격은 약 0.005인치(0.127㎜)에서 약 0.009인치(0.229㎜)사이의 간격을 갖는 것을 특징으로 하는 다층패널 보오드.14. The multilayer of claim 1, wherein the separation distance of the first conductive layer in the second and third conductive layers has a spacing between about 0.005 inches (0.127 mm) and about 0.009 inches (0.229 mm). Panel board. 제1항∼제13항에 있어서, 전기 분포용량은 적어도 0.02μF인 것을 특징으로 하는 다층패널 보오드.The multilayer panel board of claim 1, wherein the electrical distribution capacity is at least 0.02 μF. 제1항에 있어서, 전기 절연층은 단자(130)들을 유지하기 위하여 다수의 장착된 구멍(154)들과 전기통전층중의 하나는 전기 장착된 구멍에 대해서, 다수의 제거된 구멍들을 포함하며, 전기 각 제거된 구멍들은 그 직경이 약간 크게 전기 장착된 구멍중의 하나에 대해 같은 축으로 되어 있고, 전기 제거된 구멍은 전기 보오드를 가로질러 간격지워져서 배치되며, 전기 통전층(14,20)은 전기 제거된 구멍들 사이의 간격을 통해 연장되어지고, 여기서 전기 통전층의 인덕턴스가 최소화되고 전기 단자들과 전기 통전층 사이의 접속이 보호 되게한 것을 특징으로 하는 다층패널 보오드.The method of claim 1 wherein the electrically insulating layer comprises a plurality of removed holes, one of the plurality of mounted holes 154 and one of the electrically conducting layers, for retaining the terminals 130, relative to the electrically mounted holes. The electrically removed holes are coaxial with one of the electrically mounted holes whose diameter is slightly larger, the removed holes are spaced apart across the electrical board, and the electrically conducting layers 14, 20. Is extended through the gaps between the electrically removed holes, wherein the inductance of the electrically conducting layer is minimized and the connection between the electrical terminals and the electrically conducting layer is protected. 제17항에 있어서, 각 전기 제거된 구멍과 대응하는 전기 장착된 구멍간의 직경의 차이는 0.035인치(0.889㎜)미만인 것을 특징으로 하는 다층패널 보오드.18. The multilayer panel board of claim 17, wherein a difference in diameter between each electrically removed hole and the corresponding electrically mounted hole is less than 0.035 inches (0.889 mm). 제17항이나 제18항에 있어서, 전기 장착된 구멍과 축을 같이하는 통전링 접속자를 포하하고, 전기링 접속자는 전기 통전층과, 전기 장착된 구멍에 장착된 단자와 전기적으로 직접 연결하기 위해 전기 하나의 장착된 구멍과 연합한 전기 제거된 구멍을 통하여 노출된 전기 절연층의 부분위에 올려놓여져 있는 것을 특징으로 하는 다층패널 보오드.19. The apparatus according to claim 17 or 18, comprising an electrically conducting ring connector coaxial with the electrically mounted hole, wherein the electrical ring connector is electrically connected to electrically connect the electrically conducting layer and the terminal mounted in the electrically mounted hole. A multilayer panel board, mounted on a portion of an electrically insulating layer exposed through an electrically removed hole associated with one mounted hole. 전기적단자(130)들을 유지하기 위한 패널 보오드(10)에 있어서, 통전층(14,20)과 전기 통전층에 부착된 절연층(22,26)을 포함하고, 전기 절연층은 전기 단자들을 유지하기 위해 다수의 장착된 구멍(154)들을 가지며, 전기 통전층은 전기 장착된 구멍에 대응하는 다수의 제거된 구멍들을 가지며, 번기 각 제거된 구멍은 전기 장착된 구멍(154)들중의 하나에 대응하여 그 직경이 약간 크게 같은 축으로 되고, 전기 제거된 구멍은 전기 보오드를 가로질러 간격이 띄어져 배치되고, 전기 통전층(14,20)은 전기 제거된 구멍사이의 간격을 가로질러 연장되어 전기 제거된 구멍을 한정하고 포위하며, 여기서 전기 통전층의 인덕턴스는 최소화 되고 전기 단자들과 통전 층 사이의 접속이 보호되는 것을 특징으로 하는 다층패널 보오드.A panel board (10) for holding electrical terminals (130), comprising: conductive layers (14, 20) and insulating layers (22, 26) attached to the electrically conductive layer, the electrical insulating layer holding electrical terminals Has a plurality of mounted holes 154 to make the electrical current layer have a plurality of removed holes corresponding to the electrically mounted holes, and each removed hole is placed in one of the electrically mounted holes 154. Correspondingly, the shafts are slightly larger in diameter and the removed holes are spaced apart across the electrical board, and the electrically conducting layers 14 and 20 extend across the gap between the removed holes. Defining and enclosing the electrically removed holes, wherein the inductance of the electrically conducting layer is minimized and the connection between the electrical terminals and the conducting layer is protected. 제20항에 있어서, 각 전기 제거된 구멍과 대응하는 전기 장착된 구멍의 직경의 차이는 0.035인치(0.889㎜)미만인 것을 특징으로 하는 다층패널 보오드.21. The multilayer panel board of claim 20, wherein the difference in diameter of each of the electrically removed holes and the corresponding electrically mounted holes is less than 0.035 inches (0.889 mm). 제20항이나 21항에 있어서, 전기 장착된 구멍과 축을 같이한 통전 링 접속자를 포함하고, 전기 링은 전기 통전층과, 전기 장착된 구멍에 장착된 단자와 전기적으로 직접 연결할 수 있도록 전기 하나의 장착된 구멍과 연합한 전기 제거된 구멍을 통하여 노출된 전기 절연층의 부분위에 올려 놓여져 있는 것을 특징으로 하는 다층 패널 보오드.22. An electrical ring as claimed in claim 20 or 21 comprising an electrically conducting ring connector coaxial with the electrically mounted hole, wherein the electrical ring is electrically connected to the electrical conducting layer and directly connected to the terminal mounted in the electrically mounted hole. A multi-layer panel board characterized in that it rests on a portion of an electrically insulating layer exposed through an electrically removed hole associated with a mounted hole. 제22항에 있어서, 전기 단자는 하나의 장착된 구멍에 유지되는 하나의 샤프트와 전기 절연층 위에 튀어나온 하나의 머리부를 포함하고, 전기 링은 전기 머리부와 전기 통전층에 접촉되는 전기 머리부 주위에 장착되어진 것을 특징으로 하는 다층패널 보오드.23. The electrical terminal of claim 22, wherein the electrical terminal includes one shaft retained in one mounted hole and one head protruding over the electrical insulation layer, wherein the electrical ring contacts the electrical head and the electrical conducting layer. Multilayer panel board, characterized in that mounted around. 제22항에 있어서, 전기 단자는 수용 연결을 하기 위해 하나의 장착된 구멍과 하나의 포스트에 유지된 하나의 샤프트를 포함하고, 전기 포스트는 전기 절연층 건너서 튀어나오고, 전기 링은 전기 포스트와 전기 통전층에 접속된 전기 포스트 주위에 장착된 것을 특징으로 하는 다층패널 보오드.23. The electrical terminal of claim 22 wherein the electrical terminal includes one mounted hole and one shaft retained in one post for making a receiving connection, the electrical post protrudes across the electrical insulation layer, and the electrical ring is electrically connected to the electrical post. A multilayer panel board, which is mounted around an electrical post connected to a conductive layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019830000336A 1982-01-28 1983-01-28 Multilayer Panel Board KR840003574A (en)

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US06/343,576 US4494172A (en) 1982-01-28 1982-01-28 High-speed wire wrap board
US343576 1982-01-28

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JPS58129792A (en) 1983-08-02
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CA1198829A (en) 1985-12-31
EP0086961A2 (en) 1983-08-31

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