KR840000852U - Pulse delay circuit - Google Patents

Pulse delay circuit

Info

Publication number
KR840000852U
KR840000852U KR2019820005802U KR820005802U KR840000852U KR 840000852 U KR840000852 U KR 840000852U KR 2019820005802 U KR2019820005802 U KR 2019820005802U KR 820005802 U KR820005802 U KR 820005802U KR 840000852 U KR840000852 U KR 840000852U
Authority
KR
South Korea
Prior art keywords
delay circuit
pulse delay
pulse
circuit
delay
Prior art date
Application number
KR2019820005802U
Other languages
Korean (ko)
Other versions
KR890006043Y1 (en
Inventor
요시오 도꾸야마
겐지 이또
Original Assignee
니뽕빅터 가부시끼 가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 니뽕빅터 가부시끼 가이샤 filed Critical 니뽕빅터 가부시끼 가이샤
Publication of KR840000852U publication Critical patent/KR840000852U/en
Application granted granted Critical
Publication of KR890006043Y1 publication Critical patent/KR890006043Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B15/00—Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
    • G11B15/18—Driving; Starting; Stopping; Arrangements for control or regulation thereof
    • G11B15/46—Controlling, regulating, or indicating speed
    • G11B15/467—Controlling, regulating, or indicating speed in arrangements for recording or reproducing wherein both record carriers and heads are driven
    • G11B15/473—Controlling, regulating, or indicating speed in arrangements for recording or reproducing wherein both record carriers and heads are driven by controlling the speed of the heads
KR2019820005802U 1981-07-23 1982-07-22 Pulse delay circuits KR890006043Y1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP109648 1981-07-23
JP1981109648U JPS5816932U (en) 1981-07-23 1981-07-23 pulse delay circuit

Publications (2)

Publication Number Publication Date
KR840000852U true KR840000852U (en) 1984-02-29
KR890006043Y1 KR890006043Y1 (en) 1989-09-09

Family

ID=14515609

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019820005802U KR890006043Y1 (en) 1981-07-23 1982-07-22 Pulse delay circuits

Country Status (3)

Country Link
JP (1) JPS5816932U (en)
KR (1) KR890006043Y1 (en)
DE (1) DE3227407C2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100346836B1 (en) * 2000-06-07 2002-08-03 삼성전자 주식회사 Delay locked loop circuit having duty cycle correction function and delay locking method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2241349C3 (en) * 1972-08-23 1978-04-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Circuit arrangement for generating pulses of the same length, offset by 180 degrees
JPS52144256A (en) * 1976-05-27 1977-12-01 Mitsubishi Electric Corp Rectangular wave phase-shift circuit

Also Published As

Publication number Publication date
KR890006043Y1 (en) 1989-09-09
DE3227407C2 (en) 1984-11-22
DE3227407A1 (en) 1983-02-17
JPS5816932U (en) 1983-02-02

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