KR20240147692A - Wiring circuit board and its manufacturing method - Google Patents

Abstract

The rewiring substrate includes a metal support including an upper surface and a lower surface and a via hole. An outer surface of the metal support is covered by a covering layer. A conductive layer is formed on the upper surface, the lower surface, and the inner peripheral surface of the via hole of the metal support through the covering layer. In a cross-section of the metal support passing through an opening of the via hole, an outline representing the inner peripheral surface of the via hole is curved. The via hole is formed such that the outline of the inner peripheral surface follows predetermined conditions.

Description

Wiring circuit board and its manufacturing method

The present invention relates to a wiring circuit board and a method for manufacturing the same.

In electronic devices, a wiring circuit board is used to transmit and receive electric signals between multiple electronic components. Electronic components such as semiconductor chips are connected to the wiring circuit board. In order to efficiently dissipate heat generated from electronic components connected to the wiring circuit board, a wiring circuit board including a metal substrate has been proposed.

For example, the wiring board (wiring circuit board) described in Patent Document 1 has a core substrate. The core substrate is formed of a metal with high thermal conductivity, such as aluminum, and includes a through via. The upper surface, lower surface, and inner peripheral surface of the core substrate and the through via are covered with an insulating layer. The insulating layer is formed by anodizing treatment using an organic acid. A wiring layer is provided on each of the upper surface and lower surface of the core substrate with the insulating layer interposed therebetween. In addition, a conductor layer is provided on the inside of the through via of the core substrate with the insulating layer interposed therebetween.

The insulating layer formed by anodic oxidation treatment is very thin. Therefore, according to the above configuration, heat generated from the connected electronic components is easily transferred from the wiring layer and the conductor layer to the core substrate through the insulating layer. As a result, the heat dissipation of the electronic components is improved.

Japanese Patent Publication No. 2004-179291

In a wiring circuit board, further improvement in the heat dissipation of electronic components provided on the wiring circuit board is required. In the wiring board described in Patent Document 1, if the area of the wiring layer formed on the upper and lower surfaces of the core board can be expanded, the heat transfer path from the wiring layer to the core board can be expanded, which can improve the heat dissipation. However, it is necessary to form a wiring layer in a predetermined pattern on the upper and lower surfaces of the core board according to the layout of a plurality of terminals of electronic components to be connected, etc. Therefore, in reality, it is difficult to expand the area of the wiring layer formed on the upper and lower surfaces of the core board. In addition, the above wiring board is required to have high reliability by ensuring insulation between the insulating layer and the wiring layer.

The purpose of the present invention is to provide a highly reliable wiring circuit board capable of improving the heat dissipation of connected electronic components and a method for manufacturing the same.

(1) A wiring circuit board according to one aspect of the present invention is a wiring circuit board to which electronic components are connected, comprising: a metal support having first and second surfaces facing each other and including a via hole penetrating from the first surface to the second surface; an insulating coating layer formed to cover at least a portion of the first surface and the second surface of the metal support and an inner surface of the via hole; and a conductor layer formed on the first surface and the second surface of the metal support and formed in the via hole with the insulating coating layer interposed therebetween; a cross-section defined in the metal support that is parallel to a first direction, which is a thickness direction of the metal support, and passes through an opening of the via hole; the cross-section includes an outline representing a part of the inner surface of the via hole; the outline includes a first point located on the first surface, a second point located on the second surface, and a third point located between the first point and the second point in the first direction; and the via hole of the metal support has a thickness (D) of the metal support, The distance (A1) between the first point and the third point in the second direction orthogonal to the first direction and the distance (A2) between the first point and the third point in the second direction are formed so as to satisfy the relationship (A1＋A2)/D≥0.25.

In the wiring circuit board, a conductor layer is formed on the first side and the second side of the metal support. In addition, the conductor layer is formed by interposing an insulating coating layer within the via hole of the metal support. Accordingly, when an electronic component is connected on the first side or the second side of the metal support, heat generated from the electronic component is transmitted to the metal support through the conductor layer and the insulating coating layer.

According to the above configuration, the area of the inner surface of the via hole becomes larger compared to the case where the thickness (D), the distance (A1), and the distance (A2) do not satisfy the relationship of (A1+A2)/D≥0.25. As a result, the surface area of the metal support covered by the conductor layer can be expanded while suppressing excessive expansion of the formation area of the conductor layer on the first surface and the second surface. As a result, the amount of heat transferred between the electronic component and the metal support per unit time can be increased. Therefore, it becomes possible to efficiently dissipate heat generated from the electronic component connected to the wiring circuit board through the metal support.

In addition, when the thickness (D), the distance (A1), and the distance (A2) satisfy the relationship of (A1+A2)/D≥0.25, at least a part of the inner peripheral surface of the via hole faces a direction inclined with respect to the first direction. This makes it easier to form an insulating coating layer on the inner peripheral surface of the via hole, compared to the case where the outline is parallel to the first direction. This improves the reliability of the insulating coating layer covering the inner peripheral surface of the via hole. Accordingly, insulation between the metal support and the conductor layer is secured.

As a result, a highly reliable wiring circuit board capable of improving the heat dissipation of connected electronic components is realized.

(2) The thickness of the metal support may be 10 ㎛ or more and 100 ㎛ or less. In this case, compared to a case where the thickness of the metal support is greater than 100 ㎛, the heat received from the metal support can be efficiently transferred to other electronic components, etc. connected to the wiring circuit board. In addition, compared to a case where the thickness of the metal support is less than 10 ㎛, the occurrence of warpage in each layer constituting the wiring circuit board can be prevented. In addition, compared to a case where the thickness of the metal support is less than 10 ㎛, the amount of heat transferred between the electronic component and the metal support is prevented from being limited due to insufficient heat capacity of the metal support.

(3) The outline includes a plurality of inflection points, and a plurality of triangles having three inflection points sequentially arranged on the outline as vertices are defined, and when the height of the triangle is calculated using a straight line connecting two inflection points that are not located in the center among the three inflection points forming each triangle as a base, the largest height among the plurality of heights of the plurality of triangles calculated may be 0.6 µm or more.

In this case, compared to the case where the inner surface of the via hole is not formed with unevenness, it becomes possible to sufficiently increase the surface area of the inner surface. As a result, the amount of heat transferred from the inner surface of the via hole to the metal support per unit time can be increased.

(4) The thermal conductivity of the metal support may be 10 W/mK or higher. In this case, the amount of heat transferred from the inner surface of the via hole to the metal support per unit time can be increased compared to a case where the thermal conductivity of the metal support is lower than 10 W/mK.

(5) The coefficient of thermal expansion of the metal support may be 0 μm/K or more and 25 μm/K or less. In this case, the metal support is prevented from being significantly deformed due to temperature changes in the wiring circuit board. As a result, the reliability of the wiring circuit board is improved.

(6) The insulating coating layer is formed to be in contact with the metal support, and the metal support may include a component that improves the adhesion of the insulating coating layer to the metal support.

In this case, the insulating coating layer is prevented from peeling off from the surface of the metal support. As a result, the insulation between the metal support and the conductor layer is secured, thereby improving the reliability of the wiring circuit board.

(7) The wiring circuit board may further include an adhesion reinforcing layer formed between the metal support and the insulating coating layer to be in contact with the metal support and the insulating coating layer, and including a component that improves adhesion of the insulating coating layer to the metal support.

In this case, the insulating coating layer is prevented from peeling off from the surface of the metal support. As a result, the insulation between the metal support and the conductor layer is secured, thereby improving the reliability of the wiring circuit board.

(8) The adhesion reinforcing layer contains chromium or aluminum, and the content of chromium or aluminum in the adhesion reinforcing layer may be 50 wt% or less.

Chromium and aluminum have lower thermal conductivity when oxidized. According to the above configuration, the decrease in thermal conductivity due to oxidation of the adhesion-reinforcing layer is reduced compared to when the content of chromium or aluminum in the adhesion-reinforcing layer is greater than 50 wt%.

(9) The conductor layer may be formed so as to be electrically connected to a first electronic component arranged on the first surface, and may also be formed so as to be electrically connected to a second electronic component arranged on the second surface. In this case, the wiring circuit board can be used as a rewiring board.

(10) A method for manufacturing a wiring circuit board according to another aspect of the present invention is a method for manufacturing a wiring circuit board to which electronic components are connected, comprising: a step of preparing a metal plate including first and second surfaces facing each other; a step of forming a metal support by forming a via hole penetrating from the first surface to the second surface in the metal plate; a step of forming an insulating coating layer so as to cover at least a portion of the first surface and the second surface of the metal support and the inner peripheral surface of the via hole; a step of forming a conductor layer on the first surface and the second surface of the metal support, and a step of forming a conductor layer in the via hole with the insulating coating layer interposed therebetween, wherein the step of forming the via hole in the metal plate is such that a cross-section is defined in the metal support to be manufactured that is parallel to a first direction, which is a thickness direction of the metal support, and passes through an opening of the via hole, and the cross-section includes an outline representing a part of the inner peripheral surface of the via hole, and the outline comprises a first point located on the first surface, a second point located on the second surface, a first point in the first direction, and In the case where a third point located between the second point is included, a thickness (D) of the metal support, a distance (A1) between the first point and the third point in a second direction orthogonal to the first direction, and a distance (A2) between the first point and the third point in the second direction are included to form a via hole in the metal plate so that the relationship of (A1＋A2)/D≥0.25 is satisfied.

In a wiring circuit board manufactured by his manufacturing method, a conductor layer is formed on the first side and the second side of a metal support. In addition, the conductor layer is formed by interposing an insulating coating layer within a via hole of the metal support. Accordingly, when an electronic component is connected to the first side or the second side of the metal support, heat generated from the electronic component is transferred to the metal support through the conductor layer and the insulating coating layer.

According to the above configuration, the area of the inner surface of the via hole becomes larger compared to the case where the thickness (D), the distance (A1), and the distance (A2) do not satisfy the relationship of (A1+A2)/D≥0.25. As a result, the surface area of the metal support covered by the conductor layer can be expanded while suppressing excessive expansion of the formation area of the conductor layer on the first surface and the second surface. As a result, the amount of heat transferred between the electronic component and the metal support per unit time can be increased. Therefore, it becomes possible to efficiently dissipate heat generated from the electronic component connected to the wiring circuit board through the metal support.

In addition, when the thickness (D), the distance (A1), and the distance (A2) satisfy the relationship of (A1+A2)/D≥0.25, at least a part of the inner peripheral surface of the via hole faces a direction inclined with respect to the first direction. This makes it easier to form an insulating coating layer on the inner peripheral surface of the via hole, compared to the case where the outline is parallel to the first direction. This improves the reliability of the insulating coating layer covering the inner peripheral surface of the via hole. Accordingly, insulation between the metal support and the conductor layer is secured.

As a result, a highly reliable wiring circuit board capable of improving the heat dissipation of connected electronic components is realized.

(11) The outline includes a plurality of bend points, and a plurality of triangles having three bend points sequentially arranged on the outline as vertices are defined, and the process of forming a via hole in the metal plate may further include forming a via hole in the metal plate such that, when the height of the triangle is calculated using a straight line connecting two bend points that are not located in the center among the three bend points forming each triangle as a base, the largest height among the plurality of heights of the calculated plurality of triangles is 0.6 ㎛ or more.

In this case, compared to the case where the inner surface of the via hole is not formed with unevenness, it becomes possible to sufficiently increase the surface area of the inner surface. As a result, the amount of heat transferred from the inner surface of the via hole to the metal support per unit time can be increased.

(12) The process for forming a via hole in a metal plate may further include forming the via hole by etching from at least one of the first surface and the second surface of the metal plate.

In this case, during the process of forming a via hole by etching, the inner surface of the via hole is inclined with respect to the thickness direction of the metal plate. In addition, the surface condition of the inner surface of the via hole becomes rough. Due to this, it becomes possible to secure a wider surface area on the inner surface of the via hole without requiring complicated processing.

(13) The process of forming an insulating coating layer may include forming an insulating coating layer so as to be in contact with a metal support, and the process of preparing a metal plate may include preparing a metal plate as a metal plate, the metal plate including a component that improves adhesion of the insulating coating layer to the metal support.

In this case, the insulating coating layer is prevented from peeling off from the surface of the metal support. As a result, the insulation between the metal support and the conductor layer is secured, thereby improving the reliability of the wiring circuit board.

(14) A method for manufacturing a wiring circuit board further includes a step of forming an adhesion reinforcing layer so as to cover an inner peripheral surface of a via hole and to contact the metal support, while covering at least a portion of a first surface and a second surface of a metal support before forming an insulating coating layer, and the step of forming an insulating coating layer includes forming an insulating coating layer on the adhesion reinforcing layer so as to contact the adhesion reinforcing layer, and the adhesion reinforcing layer may include a component that improves adhesion of the insulating coating layer to the metal support.

In this case, the insulating coating layer is prevented from peeling off from the surface of the metal support. As a result, the insulation between the metal support and the conductor layer is secured, thereby improving the reliability of the wiring circuit board.

(15) The process of forming an insulating coating layer may include forming a temporary insulating coating layer so as to cover the first surface of the metal support, the second surface of the metal support, and the inner peripheral surface of the via hole, and to fill the inner space of the via hole, and forming an insulating coating layer by forming a through hole in a portion of the temporary insulating coating layer formed within the via hole.

In this case, since a temporary insulating coating layer is embedded inside the via hole, a highly reliable insulating coating layer can be formed without being affected by the surface condition of the inner surface of the via hole.

(16) The process of forming an insulating coating layer may include forming an insulating coating layer on the outer surface of the metal support without blocking a via hole.

In this case, in order to form an insulating coating layer on the inner surface of the via hole, there is no need to embed an insulating material corresponding to the insulating coating layer inside the via hole. Therefore, the time required for forming the insulating coating layer is reduced.

(17) The process for forming an insulating coating layer may include forming a first temporary insulating coating layer to cover a first surface of a metal plate before a via hole is formed, forming a second temporary insulating coating layer to cover a second surface of the metal support and an inner peripheral surface of the via hole after the formation of the metal support, and filling the internal space of the via hole, and forming a through hole in a portion of the second temporary insulating coating layer formed within the via hole and a portion of the first temporary insulating coating layer overlapping the via hole in the first direction, thereby forming the insulating coating layer.

In this case, when forming the first temporary insulating coating layer and when forming the second temporary insulating coating layer, there is no through hole in the target object including the metal plate or metal support to be formed. Therefore, compared to a case where there is a through hole in the target object, the formation of the first temporary insulating coating layer and the formation of the second temporary insulating coating layer are easy. In addition, since the second temporary insulating coating layer is embedded in the interior of the via hole, a highly reliable insulating coating layer can be formed without being affected by the surface condition of the inner peripheral surface of the via hole.

According to the present invention, it is possible to improve the heat dissipation of electronic components connected to a wiring circuit board and to improve the reliability of the wiring circuit board.

FIG. 1 is a schematic cross-sectional view showing the configuration of a rewiring substrate according to one embodiment of the present invention.
Figure 2 is a schematic plan view of the rewiring substrate of Figure 1.
Figure 3 is a schematic bottom view of the rewiring substrate of Figure 1.
Figure 4 is an enlarged plan view of a portion of the metal support of Figure 1.
Fig. 5 is a drawing showing an example of a BB line cross-section of the metal support of Fig. 4.
Figure 6 is a diagram showing another example of the outline of a via hole in a metal support.
Figure 7 is a diagram showing another example of the outline of a via hole in a metal support.
Figure 8 is a diagram showing another example of the outline of a via hole in a metal support.
Figure 9 is a diagram for explaining a desirable shape of the inner surface of a via hole in a metal support.
Fig. 10 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 11 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 12 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 13 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 14 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 15 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 16 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 17 is a schematic cross-sectional view for explaining an example of a method for manufacturing the rewiring substrate of Fig. 1.
Fig. 18 is a schematic cross-sectional view for explaining an example of a method for manufacturing a rewiring substrate of Fig. 1.
Figure 19 is a schematic cross-sectional view for explaining a first method of forming a covering layer for a metal support.
Figure 20 is a schematic cross-sectional view illustrating a third method of forming a covering layer for a metal support.
Figure 21 is a schematic cross-sectional view illustrating a third method of forming a covering layer for a metal support.
Fig. 22 is a schematic cross-sectional view for explaining a third method of forming a covering layer for a metal support.
Figure 23 is a schematic cross-sectional view illustrating a fourth method of forming a covering layer for a metal support.
Figure 24 is a schematic cross-sectional view for explaining a fourth method of forming a covering layer for a metal support.
Figure 25 is a schematic cross-sectional view for explaining a fourth method of forming a covering layer for a metal support.
Figure 26 is a schematic cross-sectional view illustrating a fourth method of forming a covering layer for a metal support.
Figure 27 is a schematic cross-sectional view for explaining a fourth method of forming a covering layer for a metal support.
Figure 28 is a schematic cross-sectional view of a rewiring substrate having an adhesion reinforcing layer.

Hereinafter, a wiring circuit board and a manufacturing method thereof according to one embodiment of the present invention will be described with reference to the drawings. As an example of the wiring circuit board, a rewiring board will be described. The rewiring board is arranged between an electronic component such as a semiconductor element and another wiring circuit board such as a rigid printed wiring circuit board (hereinafter, abbreviated as a rigid board), and serves to convert the pitch between the fine pattern of the electronic component and the rough pattern of the other wiring circuit board. The rewiring board is also called an interposer board.

1. Basic configuration of the rewiring board

FIG. 1 is a schematic cross-sectional view showing the configuration of a rewiring substrate according to one embodiment of the present invention. FIG. 2 is a schematic plan view of the rewiring substrate (100) of FIG. 1. FIG. 3 is a schematic bottom view of the rewiring substrate (100) of FIG. 1. FIG. 1 shows a cross-section taken along line A-A of FIGS. 2 and 3. As shown in FIG. 1, the rewiring substrate (100) is mainly composed of a metal support (10), an insulating layer (20, 30), and a conductor layer (50), and has a thickness of 60 µm or more and 500 µm or less. In addition, the rewiring substrate (100) is arranged between a semiconductor element (700) and a rigid substrate (800). The semiconductor element (700) includes a plurality of electrode pads (71), and the rigid substrate (800) includes a plurality of electrode pads (81). In FIGS. 1 to 3, a semiconductor element (700) is represented by a single-dotted chain line, and a rigid substrate (800) is represented by a double-dotted chain line.

In the rewiring substrate (100) of Fig. 1, the metal support (10) is formed by a metal or alloy including one or more elements selected from the group consisting of, for example, copper, aluminum, iron, nickel, chromium, titanium, and molybdenum. In the present embodiment, the metal support (10) is formed in a plate shape by stainless steel. The surface of the metal support (10) facing the semiconductor element (700) (the surface facing upward in Fig. 1) is called the upper surface (10a), and the surface of the metal support (10) facing the rigid substrate (800) (the surface facing downward in Fig. 1) is called the lower surface (10b). The upper surface (10a) and the lower surface (10b) according to the present embodiment are parallel to each other, orthogonal to the thickness direction of the metal support (10), and flat. In addition, in the following description, the direction in which the upper surface (10a) of the metal support (10) faces is set to be the upper side of the rewiring substrate (100), and the direction in which the lower surface (10b) of the metal support (10) faces is set to be the lower side of the rewiring substrate (100).

Without being limited to the above examples, a 42 alloy or an Inver alloy may be used as the metal support (10). When an Inver alloy is used as the metal support (10), it becomes possible to adjust the coefficient of linear expansion of the metal support (10) in response to changes in the nickel (Ni) composition in the Inver alloy. In this case, it becomes possible to suppress warping in each layer constituting the rewiring substrate (100).

The metal support (10) according to the present embodiment preferably has a higher thermal conductivity than the thermal conductivity of the insulating layer (20, 30), for example, has a thermal conductivity of 10 W/mK or more and 400 W/mK or less. In addition, the metal support (10) preferably has a thickness of 10 µm or more and 100 µm or less, more preferably 15 µm or more and 60 µm or less, and still more preferably 15 µm or more and 30 µm or less. In addition, the linear expansion coefficient of the metal support (10) at 25°C to 200°C is 0 µm/K or more and 25 µm/K or less.

In addition, a plurality of via holes (19) are formed in the metal support (10). A covering layer (11) is formed on the outer surface of the metal support (10). More specifically, the covering layer (11) is formed so as to cover the entire upper surface (10a), the lower surface (10b) and the inner peripheral surface (10c) of each via hole (19) in the metal support (10). The covering layer (11) is formed of, for example, photosensitive polyimide and has a thickness of 1 µm or more and 15 µm or less. In addition, the covering layer (11) may be formed of another resin, such as an acrylic resin, a polyethernitrile resin, a polyethersulfone resin, an epoxy resin, a polyethylene terephthalate resin, a polyethylene naphthalate resin or a polyvinyl chloride resin. In addition, instead of the above resin, an inorganic insulating material or an organic insulating material may be used as the material of the covering layer (11). Specifically, as the material of the covering layer (11), silicon carbide, silicon dioxide, aluminum nitride, aluminum oxide, or the like can be used. When an inorganic insulating material such as silicon carbide, silicon dioxide, aluminum nitride, or aluminum oxide is used, the covering layer (11) can be formed using a film forming technique such as sputtering or chemical vapor deposition, as described later. When a material to which a film forming technique such as sputtering or chemical vapor deposition can be applied is selected as the material of the covering layer (11), the thickness of the covering layer (11) can be made smaller than the thickness (1 µm or more and 10 µm or less) when using photosensitive polyimide.

On the upper surface (10a) of the metal support (10), a first insulating layer (21) and a second insulating layer (22) having a predetermined pattern are laminated in this order. An insulating layer (20) is formed by the first insulating layer (21) and the second insulating layer (22). In addition, on the lower surface (10b) of the metal support (10), a third insulating layer (31) and a fourth insulating layer (32) having a predetermined pattern are laminated in this order. An insulating layer (30) is formed by the third insulating layer (31) and the fourth insulating layer (32).

The insulating layer (20, 30) is formed by, for example, photosensitive polyimide. Additionally, the insulating layer (20, 30) may be formed by another resin, such as an acrylic resin, a polyethernitrile resin, a polyethersulfone resin, an epoxy resin, a polyethylene terephthalate resin, a polyethylene naphthalate resin, or a polyvinyl chloride resin.

Within each via hole (19) of the metal support (10), a via conductor (41) is provided with a covering layer (11) therebetween. On the upper surface (10a) of the metal support (10), in addition to the first insulating layer (21), a first conductive layer (51) is formed. Specifically, on the upper surface (10a) of the metal support (10), the first conductive layer (51) is formed in a non-formed region of the first insulating layer (21) (a region having a pattern opposite to that of the first insulating layer (21)) with the covering layer (11) therebetween. A part of the first conductive layer (51) is electrically connected to the via conductor (41). In addition, on the first insulating layer (21) and the first conductive layer (51), a second conductive layer (52) is formed in a non-formed region of the second insulating layer (22) (a region having a pattern opposite to that of the second insulating layer (22)). A part of the second conductive layer (52) is electrically connected to the first conductive layer (51). In the second conductive layer (52), a plurality of terminal portions (T1) are formed that are exposed upward in the non-formed region of the second insulating layer (22). A plurality of electrode pads (71) of the semiconductor element (700) are connected to these terminal portions (T1) via solder (S). Therefore, the number and arrangement of the plurality of terminal portions (T1) are determined to correspond to the number and arrangement of the plurality of electrode pads (71) of the semiconductor element (700).

On the lower surface (10b) of the metal support (10), in addition to the third insulating layer (31), a third conductive layer (61) is formed. Specifically, on the lower surface (10b) of the metal support (10), a third conductive layer (61) is formed in a non-formed region of the third insulating layer (31) (a region having a pattern opposite to that of the third insulating layer (31)) with a covering layer (11) interposed therebetween. A part of the third conductive layer (61) is electrically connected to the via conductor (41). In addition, on the third insulating layer (31) and the third conductive layer (61), a fourth conductive layer (62) is formed in a non-formed region of the fourth insulating layer (32) (a region having a pattern opposite to that of the fourth insulating layer (32). A portion of the fourth conductive layer (62) is electrically connected to the third conductive layer (61). A plurality of terminal portions (T2) are formed in the fourth conductive layer (62) and are exposed downward in the non-formed region of the fourth insulating layer (32). A plurality of electrode pads (81) of the rigid substrate (800) are connected to these terminal portions (T2) via solder (S). Therefore, the number and arrangement of the plurality of terminal portions (T2) are determined to correspond to the number and arrangement of the plurality of electrode pads (81) of the rigid substrate (800).

In the present embodiment, a conductor layer (50) is formed by a via conductor (41), a first conductor layer (51), a second conductor layer (52), a third conductor layer (61), and a fourth conductor layer (62). The conductor layer (50) is formed by copper. In addition, the conductor layer (50) may be formed by a metal or alloy including one or more types of copper, gold, silver, platinum, lead, tin, nickel, cobalt, indium, rhodium, chromium, tungsten, and ruthenium.

In addition, each of the above-described plurality of terminal portions (T1, T2) has a laminated structure of a nickel film and a gold plating film. Specifically, each terminal portion (T1) has a configuration in which a nickel film and a gold plating film are formed in this order on the surface of the upper portion of the second conductor layer (52). In addition, each terminal portion (T2) has a configuration in which a nickel film and a gold plating film are formed in this order on the surface of the lower portion of the fourth conductor layer (62). In addition, each terminal portion (T1, T2) may be formed only of a gold plating film without including a nickel film.

In the above-described rewiring substrate (100), each of a plurality of terminal portions (T1) formed on the upper surface of the rewiring substrate (100) is electrically connected to one of a plurality of terminal portions (T2) formed on the lower surface of the rewiring substrate (100) via the conductor layer (50). In addition, a plurality of electrode pads (71) of a semiconductor element (700) are respectively connected to the plurality of terminal portions (T1) of the rewiring substrate (100), and a plurality of electrode pads (81) of a rigid substrate (800) are respectively connected to the plurality of terminal portions (T2) of the rewiring substrate (100). As a result, the plurality of electrode pads (71) of the semiconductor element (700) and the plurality of electrode pads (81) of the rigid substrate (800) are electrically connected via the rewiring substrate (100).

In addition, as shown in FIG. 2 and FIG. 3, in the present embodiment, the number of the plurality of terminal portions (T1) positioned on the upper surface of the rewiring substrate (100) and the number of the plurality of terminal portions (T2) positioned on the lower surface of the rewiring substrate (100) are the same, but the present invention is not limited thereto. The number of the plurality of terminal portions (T1) positioned on the upper surface of the rewiring substrate (100) and the number of the plurality of terminal portions (T2) positioned on the lower surface of the rewiring substrate (100) do not have to be the same.

2. Heat dissipation of semiconductor device (700)

The conductor layer (50) and the metal support (10) are composed of metal. Therefore, the conductor layer (50) and the metal support (10) basically have higher thermal conductivity than the resin constituting the insulating layer (20, 30), etc. In addition, the metal support (10) is formed so as to spread over the entire rewiring substrate (100) when viewed in a plan view. Therefore, if the heat generated in the semiconductor element (700) can be efficiently transferred to the metal support (10), the heat dissipation efficiency of the semiconductor element (700) is improved.

In the rewiring substrate (100), a portion of the heat generated from the semiconductor element (700) is transferred to the conductor layer (50) through a plurality of terminal portions (T1). Therefore, in order to efficiently transfer the heat transferred to the conductor layer (50) to the metal support (10), it is desirable to expand the area of the conductor layer (50) formed by interposing a covering layer (11) on the outer surface of the metal support (10).

In this case, it is conceivable to expand the formation area of the first conductor layer (51) on the upper surface (10a) of the metal support (10). However, on the upper surface (10a) of the metal support (10), a wiring layout, etc. for realizing appropriate electrical connection between the plurality of electrode pads (71) of the semiconductor element (700) and the plurality of electrode pads (81) of the rigid substrate (800) is determined in advance. Therefore, in reality, it is difficult to expand the formation area of the conductor layer (50) on the upper surface (10a) of the metal support (10). Therefore, in the rewiring substrate (100) according to the present embodiment, the inner peripheral surface (10c) of each via hole (19) in the metal support (10) is formed as described below.

3. Shape of the inner surface (10c) of each via hole (19) in the metal support (10)

Fig. 4 is a partially enlarged plan view of the metal support (10) of Fig. 1. Fig. 5 is a diagram showing an example of a B-B line cross-section of the metal support (10) of Fig. 4. The cross-section of Fig. 5 is a cross-section that is parallel to the thickness direction of the metal support (10) and passes through an opening of one via hole (19). In the following description, the thickness direction of the metal support (10) of Fig. 5 and Figs. 6 to 9 described below is referred to as a first direction (d1). In addition, a direction orthogonal to the first direction (d1) in the cross-section of the metal support (10) of Fig. 5 and Figs. 6 to 9 described below is referred to as a second direction (d2). More specifically, the first direction (d1) is a direction that is parallel to the thickness direction of the metal support (10) and extends from the upper surface (10a) to the lower surface (10b). Additionally, the second direction (d2) is orthogonal to the thickness direction of the metal support (10) and is a direction from the outside of the via hole (19) to the inside of the via hole (19).

As shown in Fig. 4, in the metal support (10) of the present example, the area of the opening at the bottom of the via hole (19) is smaller than the area of the opening at the top of the via hole (19). Therefore, the inner peripheral surface (10c) of the via hole (19) is inclined from the upper surface (10a) to the lower surface (10b) of the metal support (10) so as to face the first direction (d1) and the second direction (d2).

In the cross-sectional view of Fig. 5, an outline line (OL) indicating a part of the inner surface (10c) of the via hole (19) is gently curved to be concave. In the cross-sectional views of Fig. 5 and Figs. 6 to 8 described later, the outline line (OL) is macroscopically shown to the extent that an unevenness of about 0.1 μm cannot be discerned. In addition, in the present embodiment, the fact that the outline line (OL) is curved also includes a case where a part of the outline line (OL) is bent in a broken line shape.

Here, a first point (P1), a second point (P2), and a third point (P3) are defined on the outline (OL). The first point (P1) is located at one end of the outline (OL) on the upper surface (10a) of the metal support (10). The second point (P2) is located at the other end of the outline (OL) on the lower surface (10b) of the metal support (10). The third point (P3) is located at a portion of the outline (OL) that is furthest from the straight line (SL) connecting the first point (P1) and the second point (P2). In addition, the third point (P3) is located between the first point (P1) and the second point (P2) in the second direction (d2). In this case, the via hole (19) of the metal support (10) is formed so that the outline (OL) satisfies the following equation (1), when 'A1' is the distance between the first point (P1) and the third point (P3) in the second direction (d2), 'A2' is the distance between the second point (P2) and the third point (P3) in the second direction (d2), and 'D' is the thickness of the metal support (10).

(A1＋A2)/D≥0.25… (1)

As described above, the outline (OL) is curved. In this case, the area of the inner peripheral surface (10c) of the via hole (19) becomes larger than in the case where the outline (OL) is formed in a straight line shape. In addition, in the case where the outline (OL) satisfies the above formula (1), the area of the inner peripheral surface (10c) can be made sufficiently larger than in the case where the outline (OL) does not satisfy the above formula (1). In addition, in this case, at least a part of the inner peripheral surface (10c) is inclined with respect to the first direction (d1). Due to this, for example, when forming a covering layer (11) on the inner peripheral surface (10c), the formation of the covering layer (11) on the inner peripheral surface (10c) becomes easy. For example, when forming a covering layer (11) on the inner surface (10c) by sputtering, if the outline (OL) satisfies the relationship of the above formula (1), at least a part of the inner surface (10c) faces diagonally upward or diagonally downward. This makes it easier to form the covering layer (11) compared to the case where the outline (OL) is parallel to the first direction (d1). This improves the reliability of the covering layer (11) covering the inner surface (10c).

In addition, it is preferable that the via hole (19) of the metal support (10) is formed so that the outline (OL) satisfies the following equation (2).

(A1+A2)/D≥0.30… (2)

In addition, it is more preferable that the via hole (19) of the metal support (10) is formed so that the outline (OL) satisfies the following equation (3).

(A1+A2)/D≥0.35… (3)

When the outline (OL) satisfies the above formula (1), it is preferable that the outline (OL) additionally satisfies the following formula (4).

(A1+A2)/D≤0.4… (4)

When the outline (OL) satisfies the above formula (4), deformation or damage of the via hole (19) due to excessive thinning of a portion of the inner surface (10c) of the via hole (19) can be suppressed. In addition, the degree of freedom in design of wiring layout, etc. is suppressed from being reduced due to excessive enlargement of the via hole (19).

In the cross-sectional view of Fig. 5, the outline (OL) is curved so as to be gently concave. Without being limited to this example, the via hole (19) of the metal support (10) may be formed so that the outline (OL) has a shape as shown below.

Fig. 6 is a diagram showing another example of an outline (OL) of a via hole (19) in a metal support (10). Fig. 6 shows a cross-section showing a part of the metal support (10). The cross-section corresponds to the cross-section of Fig. 5, is parallel to the thickness direction of the metal support (10), and is a cross-section passing through the opening of the via hole (19). In the example of Fig. 6, the outline (OL) is curved to be relatively largely concave. Therefore, the third point (P3) is not located between the first point (P1) and the second point (P2) in the second direction (d2). Even in such a case, if the outline (OL) satisfies the above formula (1), it is possible to obtain the same effect as the example of Fig. 5.

Fig. 7 is a diagram showing another example of an outline (OL) of a via hole (19) in a metal support (10). Fig. 7 shows a cross-section showing a part of the metal support (10). The cross-section corresponds to the cross-section of Fig. 5, is parallel to the thickness direction of the metal support (10), and is a cross-section passing through the opening of the via hole (19). In the example of Fig. 7, the outline (OL) is curved so as to gently expand toward the inside of the via hole (19). In addition, in the outline (OL), the third point (P3) is located between the first point (P1) and the second point (P2) in the second direction (d2). Even in such a case, if the outline (OL) satisfies the above formula (1), it is possible to obtain the same effect as the example of Fig. 5.

Fig. 8 is a diagram showing another example of an outline (OL) of a via hole (19) in a metal support (10). Fig. 8 shows a cross-section showing a part of the metal support (10). The cross-section corresponds to the cross-section of Fig. 5, is parallel to the thickness direction of the metal support (10), and is a cross-section passing through the opening of the via hole (19). In the example of Fig. 8, the outline (OL) is curved so as to expand relatively greatly toward the inside of the via hole (19). In addition, in the outline (OL), the third point (P3) is not located between the first point (P1) and the second point (P2) in the second direction (d2). Even in such a case, if the outline (OL) satisfies the above formula (1), it is possible to obtain the same effect as the example of Fig. 5.

4. Desirable shape of the inner surface (10c) of the via hole (19) in the metal support (10)

The desirable shape of the inner circumferential surface (10c) of the via hole (19) can be explained by using a plurality of bending points by setting a plurality of bending points on the above outline line (OL). Fig. 9 is a diagram for explaining the desirable shape of the inner circumferential surface (10c) of the via hole (19) in the metal support (10). In Fig. 9, four cross-sectional views of the metal support (10) are shown arranged from top to bottom. The plurality of cross-sectional views of Fig. 9 are partially enlarged cross-sectional views of the metal support (10) that enlarge the common portion of the outline line (OL) of Fig. 5. In each cross-sectional view of Fig. 9, the outline line (OL) is microscopically shown to a degree that an unevenness of about 0.1 ㎛ can be identified.

As indicated by a plurality of triangle marks in the first cross-sectional view from the top of Fig. 9, a plurality of virtual points arranged at approximately equal intervals on an outline (OL) are set, for example. Then, as indicated in the second cross-sectional view from the top of Fig. 9, an inflection point (CP) is set at a position (e.g., a middle position) between two virtual points when the slopes of two tangent lines passing through each of two adjacent virtual points exceed a predetermined value. That is, an inflection point (CP) is set at a portion of the outline (OL) where the slope changes significantly or a portion near the portion.

Thereafter, with a plurality of bending points (CP) set on the outline (OL), as shown in the cross-sectional views of the third and fourth stages from the top of Fig. 9, a plurality of triangles are defined with three bending points (CP) sequentially arranged on the outline (OL) as vertices.

In addition, the height (h) of each triangle is calculated. At this time, the height of each triangle is calculated by using the straight line connecting two inflection points (CP) that are not located in the center among the three inflection points (CP) as the base. The largest height (h) of the heights (h) of the triangles calculated in this way is taken as the maximum height of the unevenness of the outline (OL). In this case, it is preferable that the inner peripheral surface (10c) of the via hole (19) is formed so that the maximum height of the unevenness of the outline (OL) is 0.6 ㎛ or more.

In this case, it becomes possible to sufficiently increase the surface area of the inner peripheral surface (10c) of the via hole (19) compared to the case where the maximum height of the unevenness of the outline (OL) is smaller than 0.6 ㎛. That is, since the inner peripheral surface (10c) of the via hole (19) includes microscopically relatively large unevenness, it becomes possible to sufficiently increase the surface area of the inner peripheral surface (10c) of the via hole (19). As a result, the amount of heat transferred from the inner peripheral surface (10c) of the via hole (19) to the metal support (10) per unit time can be increased.

Here, it is more preferable that the inner peripheral surface (10c) of the via hole (19) is formed so that the maximum height of the unevenness of the outline (OL) is 0.9 ㎛ or more. In addition, it is more preferable that the inner peripheral surface (10c) of the via hole (19) is formed so that the maximum height of the unevenness of the outline (OL) is 1.0 ㎛ or more.

In addition, in the above example, a plurality of inflection points (CP) are set on the outline (OL) by setting a plurality of virtual points on the outline (OL), but the method of setting a plurality of inflection points (CP) is not limited to the above example. For example, a plurality of inflection points (CP) on the outline (OL) may be determined based on a distance of each part of the outline (OL) to the virtual straight line defined by defining a virtual straight line that is parallel to the first direction (d1) and passes through approximately the center of the via hole (19).

Specifically, in a case where the outline (OL) has a first inclined portion that is inclined toward a virtual line in the first direction (d1) and a second inclined portion that is inclined away from the virtual line in the first direction (d1), an inflection point (CP) may be set between the first and second inclined portions (e.g., a boundary portion).

5. Manufacturing method of rewiring substrate (100)

FIGS. 10 to 18 are schematic cross-sectional views for explaining an example of a method for manufacturing a rewiring substrate (100) of FIG. 1. The schematic cross-sectional views shown in FIGS. 10 to 18 correspond to the schematic cross-sectional view of FIG. 1. In the present embodiment, the rewiring substrate (100) is manufactured by a roll-to-roll method.

First, a roll (hereinafter referred to as a drawing roll) on which a long metal support (10) made of stainless steel is wound is prepared. The metal support (10) is drawn from the prepared drawing roll. The metal support (10) drawn from the drawing roll is wound on another roll. In Fig. 10, a cross-section of a part of the metal support (10) drawn from the drawing roll is shown. According to the roll-to-roll method, while the long metal support (10) moves in the longitudinal direction, the following processes are sequentially performed on each area of the metal support (10).

First, a photosensitive dry film resist is bonded onto the upper surface (10a) of the metal support (10), and a resist film is formed. The resist film formed on the upper surface (10a) of the metal support (10) is exposed in a predetermined pattern and developed. In addition, a photosensitive dry film resist is bonded onto the lower surface (10b) of the metal support (10), and a resist film is formed. The resist film formed on the lower surface (10b) of the metal support (10) is exposed and developed. As a result, as shown in Fig. 11, an etching resist (29) including a plurality of openings (29x) is formed on the upper surface (10a) of the metal support (10), and an etching resist (28) is formed on the lower surface (10b) of the metal support (10). The plurality of openings (29x) of the present example are formed to overlap a plurality of areas of the metal support (10) in which a plurality of via holes (19) are formed in a post-process.

Next, as shown in Fig. 12, a plurality of portions of the metal support (10) exposed through a plurality of openings (29x) of the etching resist (29) are etched. As a result, a plurality of via holes (19) are formed in the metal support (10). In this example, the metal support (10) is etched from the upper surface (10a) of the metal support (10) toward the lower surface (10b). As a result, the inner peripheral surfaces (10c) of the plurality of via holes (19) are formed to be gently concave from the upper surface (10a) to the lower surface (10b).

In addition, each via hole (19) may be formed by etching from the lower surface (10b) of the metal support (10) toward the upper surface (10a), in addition to etching from the upper surface (10a) of the metal support (10) toward the lower surface (10b). In this case, the inner peripheral surface (10c) of the via hole (19) may have a locally small diameter in the central portion in the thickness direction of the metal support (10). That is, the inner peripheral surface (10c) of the via hole (19) may be formed to protrude toward the inside of the via hole (19) (see FIG. 8). In addition, in the case of performing etching from the lower surface (10b) of the metal support (10) toward the upper surface (10a), it is necessary to form an opening in the etching resist (28) formed on the lower surface (10b) that overlaps the formation portion of the via hole (19). In addition, the via hole (19) is not limited to etching and may be formed by, for example, laser processing. In this case, the via hole (19) needs to be formed so that the outline line (OL) representing the cross section of the inner surface (10c) satisfies the relationship of the above formula (1). At the time when each via hole (19) formed in the metal support (10) is formed, the minimum value of the inner diameter of each via hole (19) is preferably, for example, 10 µm or more and 100 µm or less, more preferably 15 µm or more and 80 µm or less, and even more preferably 20 µm or more and 60 µm or less.

Next, as shown in Fig. 13, the etching resist (29, 28) is peeled off from the upper surface (10a) and the lower surface (10b) of the metal support (10). Thereafter, as shown in Fig. 14, a covering layer (11) including photosensitive polyimide is formed on the exposed upper surface (10a), the lower surface (10b) of the metal support (10) and the inner peripheral surface (10c) of each via hole (19). The covering layer (11) can be formed by various methods. Specific examples of methods for forming the covering layer (11) will be described later. In a state where a covering layer (11) is formed on the inner surface (10c) of each via hole (19) of a metal support (10), the minimum inner diameter of the portion of the covering layer (11) covering the inner surface (10c) is preferably 10 µm or more and 100 µm or less, more preferably 15 µm or more and 80 µm or less, and still more preferably 20 µm or more and 60 µm or less.

Next, as shown in Fig. 15, a via conductor (41) containing copper is formed in each via hole (19) of the metal support (10) (via filling). In addition, a first conductor layer (51) containing copper is formed in a predetermined area on the upper surface (10a) of the metal support (10). In addition, a third conductor layer (61) containing copper is formed in a predetermined area on the lower surface (10b) of the metal support (10). The above-described via filling and the formation of the first conductor layer (51) and the third conductor layer (61) may be performed simultaneously or separately. The formation of the conductors (41, 51, 61) is specifically performed, for example, as follows.

First, a seed layer including, for example, a chromium thin film and a copper thin film is formed on the surface of a covering layer (11) covering the upper surface (10a), lower surface (10b), and inner surface (10c) of a metal support (10) by sputtering or electroless plating. Next, a plating resist having a predetermined pattern is formed on the seed layer, similar to the example of the etching resist (29) described above. Next, a portion of the conductors (41, 51, 61) described above is formed on the seed layer exposed through the openings of the plating resist by electrolytic plating. The portions of the first conductor layer (51) and the third conductor layer (61) formed here are used as wiring portions.

The first conductor layer (51) and the third conductor layer (61) include a via portion in addition to the above wiring portion. Therefore, after the wiring portion of the first conductor layer (51) and the third conductor layer (61) is formed, the via portion of the first conductor layer (51) and the third conductor layer (61) is additionally formed by electrolytic plating using a plating resist.

Thereafter, the plating resist is peeled off, and the exposed portion of the seed layer (the portion where the conductor is not formed) is removed by etching. In addition, a barrier layer is formed on the outer surface of the conductor (41, 51, 61) to suppress the diffusion of copper from the conductor (41, 51, 61). The barrier layer includes, for example, a nickel thin film. In addition, the barrier layer does not have to be formed. In Fig. 15, the illustration of the seed layer and the barrier layer is omitted.

After the formation of the conductors (41, 51, 61), as shown in Fig. 16, a first insulating layer (21) including photosensitive polyimide is formed in an area of the upper surface (10a) of the metal support (10) where the first conductive layer (51) is not formed. The first insulating layer (21) is also formed in an area of the wiring portion of the first conductive layer (51). As a result, the wiring portion of the first conductive layer (51) is covered by the first insulating layer (21), and the via portion (a portion other than the wiring portion) of the first conductive layer (51) is exposed.

In addition, a third insulating layer (31) including photosensitive polyimide is formed in an area of the lower surface (10b) of the metal support (10) where the third conductive layer (61) is not formed. A third insulating layer (31) is also formed in an area of the wiring portion of the third conductive layer (61). As a result, the wiring portion of the third conductive layer (61) is covered by the third insulating layer (31), and the via portion (a portion other than the wiring portion) of the third conductive layer (61) is exposed.

The first insulating layer (21) and the third insulating layer (31) are formed by applying a precursor of photosensitive polyimide to the upper surface (10a) and the lower surface (10b) of the metal support (10), and exposing and developing the precursor. In addition, the formed first insulating layer (21) and the third insulating layer (31) are subjected to a curing process.

Next, a barrier layer existing in a predetermined area on the upper surface of the first conductive layer (51) is removed. In addition, a barrier layer existing in a predetermined area on the lower surface of the third conductive layer (61) is removed.

Thereafter, as shown in Fig. 17, a second conductor layer (52) is formed in a predetermined area on the upper surface of the first conductor layer (51) from which the barrier layer has been removed and on the upper surface of the first insulating layer (21). In addition, a fourth conductor layer (62) is formed in a predetermined area on the lower surface of the third conductor layer (61) from which the barrier layer has been removed and on the lower surface of the third insulating layer (31). Each of the second conductor layer (52) and the fourth conductor layer (62) includes a wiring portion and a via portion, similar to the first conductor layer (51) and the third conductor layer (61). Therefore, the formation of the second conductor layer (52) and the fourth conductor layer (62) is basically performed in the same order as the formation of the first conductor layer (51) and the third conductor layer (61).

Next, as shown in Fig. 18, a second insulating layer (22) including photosensitive polyimide is formed in a region of the upper surface of the first insulating layer (21) and the first conductor layer (51) where the second conductor layer (52) is not formed. The second insulating layer (22) is also formed in the region of the wiring portion of the second conductor layer (52). As a result, the wiring portion of the second conductor layer (52) is covered by the second insulating layer (22), and the via portion (a portion other than the wiring portion) of the second conductor layer (52) is exposed.

In addition, a fourth insulating layer (32) including photosensitive polyimide is formed in an area of the lower surface of the third insulating layer (31) and the third conductive layer (61) where the fourth conductive layer (62) is not formed. The fourth insulating layer (32) is also formed in an area of the wiring portion of the fourth conductive layer (62). As a result, the wiring portion of the fourth conductive layer (62) is covered by the fourth insulating layer (32), and the via portion (a portion other than the wiring portion) of the fourth conductive layer (62) is exposed.

The formation of the second insulating layer (22) and the fourth insulating layer (32) is basically performed in the same sequence as the formation of the first insulating layer (21) and the third insulating layer (31).

Finally, the barrier layer formed on a plurality of portions exposed upwardly among the second conductor layer (52) is removed, and terminal portions (T1) (Fig. 1) are formed on a plurality of portions of the second conductor layer (52) from which the barrier layer is removed. In addition, the barrier layer formed on a plurality of portions exposed downwardly among the fourth conductor layer (62) is removed, and terminal portions (T2) (Fig. 1) are formed on a plurality of portions of the fourth conductor layer (62) from which the barrier layer is removed. Here, the terminal portions (T1, T2) are formed, for example, by gold plating. As a result, the rewiring substrate (100) is completed.

6. Specific example of a method for forming a covering layer (11) on a metal support (10)

(1) First method for forming a covering layer (11) on a metal support (10)

As a specific example of a covering layer (11) for a metal support (10), a first forming method is described. Fig. 19 is a schematic cross-sectional view for explaining a first forming method of a covering layer (11) for a metal support (10). In the first forming method, photosensitive polyimide is used as a material for the covering layer (11).

In the first method of forming the covering layer (11), as described in FIGS. 10 to 13 above, when the metal support (10) having a plurality of via holes (19) formed therein is prepared, a precursor of the photosensitive polyimide is applied so as to cover the upper surface (10a) and the lower surface (10b) of the metal support (10). At the time of this application, the precursor of the photosensitive polyimide is further filled into each via hole (19) so as to fill the internal space of the inner surface (10c) of each via hole (19) of the metal support (10). Thereafter, the precursor of the photosensitive polyimide that has been applied and filled is exposed and developed. As a result, as shown in FIG. 19, a temporary covering layer (11a) is formed so as to cover the upper surface (10a) and the lower surface (10b) of the metal support (10) and to fill the internal space of the plurality of via holes (19). The formed temporary covering layer (11a) is subjected to hardening treatment.

Thereafter, as indicated by a dotted line in Fig. 19, a through hole is formed in a portion of the temporary covering layer (11a) formed in each via hole (19), for example, by laser processing or etching. As a result, the space above and below the metal support (10) are connected by the internal space of each via hole (19) of the metal support (10), and a covering layer (11) is formed on the outer surface of the metal support (10) (see Fig. 14).

The through hole passing through the interior of the via hole (19) may be formed by using an exposure technique of photosensitive polyimide. For example, when forming the temporary covering layer (11a), it may be formed by irradiating or not irradiating a portion of the temporary covering layer (11a) within the via hole (19) with exposure light.

According to the first method of forming the covering layer (11), since a temporary covering layer (11a) is embedded in the interior of each via hole (19) during the formation process of the covering layer (11), a highly reliable covering layer (11) can be formed without being affected by the surface condition of the inner peripheral surface (10c) of the via hole (19).

In addition, in the above example, a precursor of a liquid photosensitive polyimide is used to form a covering layer (11) on a metal support (10), but an element that must be used to form the covering layer (11) is not limited to this. In the first forming method, as an element for forming a covering layer (11) on a metal support (10), instead of a precursor of a liquid photosensitive polyimide, a film of a photosensitive polyimide formed in a sheet shape, a film including a photosensitive material other than the photosensitive polyimide formed in a sheet shape, or a film including a non-photosensitive material formed in a sheet shape may be used.

Here, as a material of a film including a photosensitive material other than photosensitive polyimide, a polymer material such as an acrylic resin, an epoxy resin, or a phenol resin can be exemplified. In addition, as a material of a film including a photosensitive material other than photosensitive polyimide, a material in which a reinforcing agent such as a filler is dispersed in the above polymer material can be exemplified.

In the case where the first conductive layer (11) is formed by a film, one film is attached to the upper surface (10a) of the metal support (10) and another film is attached to the lower surface (10b) of the metal support (10). As a result, the upper surface (10a) and the lower surface (10b) of the metal support (10) are each covered by two films, and the internal space of the inner surface (10c) of each via hole (19) of the metal support (10) is filled with the material forming the film.

When the material of the film used to form the covering layer (11) is composed only of a photosensitive material, a through hole is formed in a portion of the temporary covering layer (11a) formed in each via hole (19) by using an exposure technique. When the material of the film used to form the covering layer (11) includes a reinforcing agent or is a non-photosensitive material, a through hole is formed in a portion of the temporary covering layer (11a) formed in each via hole (19) by, for example, laser processing or processing (perforation) using a drill.

In addition to the above examples, the type of the covering layer (11) formed on the metal support (10) does not need to be just one type. The covering layer (11) may be composed of multiple elements including multiple types of materials.

(2) Second method for forming a covering layer (11) on a metal support (10)

As a specific example of a covering layer (11) for a metal support (10), a second forming method is described. In the second forming method, as in the first forming method, photosensitive polyimide is used as a material for the covering layer (11).

In the second forming method, when the metal support (10) of Fig. 13 is prepared, a precursor of photosensitive polyimide is applied on the outer surface of the metal support (10) by a spray coating method or an electrodeposition coating method without blocking each via hole (19) of the metal support (10).

Thereafter, the precursor of the photosensitive polyimide that has been applied is exposed and developed. As a result, a covering layer (11) is formed on the outer surface of the metal support (10) (see Fig. 14). According to the spray coating method and the electrodeposition coating method described above, a covering layer (11) having a thickness of 5 ㎛ or more and 15 ㎛ or less can be formed on the outer surface of the metal support (10).

According to the second method of forming the covering layer (11), unlike the first forming method, there is no need to embed an insulating layer such as a temporary covering layer (11a) inside the via hole (19) in order to form the covering layer (11) on the inner surface (10c) of the via hole (19). Therefore, the time required for forming the covering layer (11) is reduced.

(3) Third method of forming a covering layer (11) on a metal support (10)

As a specific example of a covering layer (11) for a metal support (10), a third forming method is described. FIGS. 20 to 22 are schematic cross-sectional views for explaining a third forming method of a covering layer (11) for a metal support (10). In the third forming method, as in the first forming method, photosensitive polyimide is used as a material for the covering layer (11).

In the third method of forming a covering layer (11), first, a precursor of a photosensitive polyimide is applied on one surface (in this example, the lower surface (10b)) of a metal support (10) on which a plurality of via holes (19) are not formed, so as to cover the lower surface (10b) of the metal support (10). As a result, as shown in Fig. 20, a first temporary covering layer (11b) is formed so as to cover the lower surface (10b) of the metal support (10). Preferably, the formed first temporary covering layer (11b) is subjected to a curing process.

Next, in a state where the first temporary covering layer (11b) is formed on the lower surface (10b), a plurality of via holes (19) are formed in the metal support (10) according to the examples of FIGS. 11 to 13. When forming a plurality of via holes (19), no through holes are formed in a portion of the first temporary covering layer (11b) that overlaps each via hole (19) in the thickness direction of the metal support (10). Therefore, as shown in FIG. 21, the internal space of the plurality of via holes (19) is not open to the space below the metal support (10) by the first temporary covering layer (11b). The lower end of each via hole (19) is blocked by a portion of the first temporary covering layer (11b).

Next, a precursor of the photosensitive polyimide is applied so as to cover the other surface (the upper surface (10a) in this example) of the metal support (10) of Fig. 21. At the time of this application, the precursor of the photosensitive polyimide is also filled into each via hole (19) so as to fill the internal space of the inner surface (10c) of each via hole (19) of the metal support (10). As a result, as shown in Fig. 22, a second temporary covering layer (11c) is formed so as to cover the upper surface (10a) of the metal support (10) and fill the internal spaces of the plurality of via holes (19). Preferably, the formed second temporary covering layer (11c) is subjected to a curing process.

Thereafter, as indicated by the dotted line in Fig. 22, a through hole is formed, for example, by laser processing or etching, in a portion of the first temporary covering layer (11b) that blocks the lower end of each via hole (19) and in a portion of the second temporary covering layer (11c) formed within each via hole (19). As a result, the space above and the space below the metal support (10) are connected by the internal space of each via hole (19) of the metal support (10), and a covering layer (11) is formed on the outer surface of the metal support (10) (see Fig. 14). In addition, similar to the example of the first forming method, the through hole passing through the interior of the via hole (19) may be formed by laser processing or etching, or may be formed by using an exposure technique of photosensitive polyimide.

According to the third forming method of the covering layer (11), when forming the first temporary covering layer (11b) for the metal support (10), there is no through-hole in the metal support (10). Therefore, for example, when coating the precursor of the photosensitive polyimide on the lower surface (10b) of the metal support (10), it is difficult for the precursor to flow onto the upper surface (10a) of the metal support (10). In addition, when forming the second temporary covering layer (11c) for the metal support (10), there is no through-hole in the first temporary covering layer (11b). Therefore, for example, when coating the precursor of the photosensitive polyimide on the upper surface (10a) of the metal support (10), it is difficult for the precursor to flow onto the lower surface (10b) of the metal support (10). As a result, the formation of the first temporary covering layer (11b) and the second temporary covering layer (11c) is easy.

In addition, according to the third method of forming the covering layer (11), since the second temporary covering layer (11c) is embedded in the interior of each via hole (19) during the formation process of the covering layer (11), a highly reliable covering layer (11) can be formed without being affected by the surface condition of the inner peripheral surface (10c) of the via hole (19).

(4) Fourth method of forming a covering layer (11) on a metal support (10)

As a specific example of a covering layer (11) for a metal support (10), a fourth forming method is described. In the manufacturing method of the above-described rewiring substrate (100), the formation of the covering layer (11) for the metal support (10) (the metal support (10) in which a via hole (19) is formed) of Fig. 13 may be performed as follows. Figs. 23 to 27 are schematic cross-sectional views for explaining the fourth forming method of the covering layer (11) for the metal support (10).

As shown in Fig. 23, in this example, a carrier film (CF1) is bonded to the lower surface (10b) of the metal support (10) of Fig. 13 on which a plurality of via holes (19) are formed. As the carrier film (CF1), for example, an adhesive-attached polyimide film is used. Then, as shown in Fig. 24, a covering layer (11d) is formed on the upper surface (10a) of the metal support (10) and the inner peripheral surface (10c) of the plurality of via holes (19) from above the metal support (10). The formation of the covering layer (11d) is performed by applying a precursor of a photosensitive polyimide on the upper surface (10a) and the inner peripheral surface (10c) of the metal support (10), and exposing and developing the applied precursor of the photosensitive polyimide. The formed covering layer (11d) is subjected to a curing treatment.

Next, as shown in Fig. 25, the carrier film (CF1) is peeled off from the lower surface (10b) of the metal support (10). Thereafter, the carrier film (CF2) is attached to the upper surface (10a) of the metal support (10) with a covering layer (11d) interposed therebetween. As the carrier film (CF2), an adhesive-attached polyimide film, for example, is used, similarly to the carrier film (CF1). Thereafter, as shown in Fig. 26, a covering layer (11e) is formed on the lower surface (10b) of the metal support (10) from the lower side of the metal support (10). The formation of the covering layer (11e) is basically performed in the same procedure as the covering layer (11d) described above. After the formation of the covering layer (11e), the carrier film (CF2) is peeled off from the covering layer (11e).

(5) Another example of a method for forming a covering layer (11) on a metal support (10)

As a material of the covering layer (11) according to the present embodiment, silicon carbide, silicon dioxide, aluminum nitride, or the like may be used. In this way, when silicon carbide, silicon dioxide, or aluminum nitride is used as the material of the covering layer (11), the covering layer (11) is formed, for example, by sputtering. Or, when silicon carbide or aluminum oxide is used as the material of the covering layer (11), the covering layer (11) is formed, for example, by a chemical vapor deposition method. Therefore, in the first to fourth forming methods described above, the covering layer (11) may be formed by sputtering or a chemical vapor deposition method, for example, depending on the material constituting the covering layer (11).

7. Effect

(1) In the above-described rewiring substrate (100), a first insulating layer (21) and a third insulating layer (31) are formed on the upper surface (10a) and the lower surface (10b) of the metal support (10) with a covering layer (11) interposed therebetween. In addition, a via conductor (41) is formed in the via hole (19) of the metal support (10) with a covering layer (11) interposed therebetween. Accordingly, in a state where a semiconductor element (700) and a rigid substrate (800) are connected to the rewiring substrate (100), heat generated from the semiconductor element (700) is transferred to the metal support (10) through the plurality of terminal portions (T1), the conductor layer (50), and the covering layer (11). In addition, a portion of the heat transmitted to the metal support (10) and diffused from the metal support (10) is additionally transmitted to the rigid substrate (800) through the conductive layer (50) and the plurality of terminal portions (T2).

As described above, the outline (OL) of the inner peripheral surface (10c) in the cross-section of the via hole (19) is curved. In this case, the area of the inner peripheral surface (10c) of the via hole (19) becomes larger than in the case where the outline (OL) is formed in a straight line shape. In addition, according to the above configuration, the area of the inner peripheral surface (10c) of the via hole (19) becomes larger than in the case where the outline (OL) does not satisfy the relationship of the above formula (1). As a result, it is possible to increase the surface area of the metal support (10) covered by the conductor layer (50) while suppressing excessive expansion of the formation area of the conductor layer (50) on the upper surface (10a) and the lower surface (10b) of the metal support (10). As a result, it is possible to increase the amount of heat transferred from the semiconductor element (700) to the metal support (10) per unit time. Accordingly, it becomes possible to efficiently dissipate heat generated from a semiconductor element (700) connected to a rewiring substrate (100) through a metal support (10).

In addition, when the outline (OL) satisfies the relationship of the above formula (1), at least a part of the inner peripheral surface (10c) of each via hole (19) faces a direction inclined with respect to the first direction (d1). Therefore, compared to the case where the outline (OL) is parallel to the first direction (d1), the formation of the covering layer (11) on the inner peripheral surface (10c) of the via hole (19) becomes easier. Due to this, the reliability of the covering layer (11) covering the inner peripheral surface (10c) of the via hole (19) is improved. Therefore, the insulation between the metal support (10) and the conductor layer (50) is secured.

As a result, a highly reliable redistribution substrate (100) capable of improving the heat dissipation of connected semiconductor elements (700) and rigid substrates (800) is realized.

(2) As described above, it is preferable that the metal support (10) have a thickness of 10 µm or more and 100 µm or less. In this case, compared to a case where the thickness of the metal support is greater than 100 µm, the heat received from the semiconductor element (700) in the metal support (10) can be efficiently transferred to the rigid substrate (800) connected to the rewiring substrate (100). In addition, compared to a case where the thickness of the metal support (10) is less than 10 µm, the occurrence of warpage in each layer constituting the rewiring substrate (100) can be prevented. In addition, the amount of heat transferred between the semiconductor element (700) and the metal support (10) is prevented from being limited due to insufficient heat capacity of the metal support (10).

(3) As described above, the metal support (10) has a thermal conductivity of, for example, 10 W/mK or more. In this case, compared to a case where the thermal conductivity of the metal support (10) is less than 10 W/mK, the amount of heat transferred from the inner surface (10c) of each via hole (19) to the metal support (10) per unit time can be increased.

(4) As described above, the coefficient of linear expansion of the metal support (10) at 25°C to 200°C is 0 μm/K or more and 25 μm/K or less. In this case, the metal support (10) is prevented from being significantly deformed due to temperature changes in the rewiring substrate (100). As a result, the reliability of the rewiring substrate (100) is improved.

(5) As described above, each via hole (19) is formed, for example, by etching a predetermined portion of the metal support (10). In the process of forming the via hole (19) by etching, the inner peripheral surface (10c) of the via hole (19) is inclined with respect to the first direction (d1). In addition, the surface condition of the inner peripheral surface (10c) of the via hole (19) becomes rough. Due to this, it becomes possible to secure a wider surface area on the inner peripheral surface (10c) of the via hole (19) without requiring complicated processing.

(6) It is preferable that the metal support (10) include a component that improves the adhesion between the metal support (10) and the covering layer (11). In this case, the covering layer (11) is prevented from peeling off the surface of the metal support (10). As a result, since the insulation between the metal support (10) and the conductor layer (50) is secured, the reliability of the rewiring substrate (100) is improved. As a component that improves the adhesion between the metal support (10) and the covering layer (11), copper, aluminum, nickel, chromium, titanium, molybdenum, and the like can be mentioned.

8. Other embodiments

(1) In the rewiring substrate (100) according to the above embodiment, in order to obtain insulation between the metal support (10) and the conductor layer (50), a covering layer (11) is formed on the outer surface of the metal support (10). Here, in order to improve the reliability of insulation between the metal support (10) and the conductor layer (50), an adhesion reinforcing layer that improves adhesion between the outer surface of the metal support (10) and the covering layer (11) may be formed between the outer surface of the metal support (10) and the covering layer (11).

Fig. 28 is a schematic cross-sectional view of a rewiring substrate (100) having an adhesion reinforcing layer. In Fig. 28, a cross-section of one via hole (19) of a metal support (10) in the rewiring substrate (100) and its surrounding area is shown in an enlarged manner. In the example of Fig. 28, an adhesion reinforcing layer (12) is formed between the upper surface (10a), the lower surface (10b), and the inner surface (10c) of the metal support (10) and the covering layer (11).

The adhesion reinforcing layer (12) contains a component that improves the adhesion between the metal support (10) and the covering layer (11), and is formed, for example, by performing a film deposition process using sputtering or a chemical vapor deposition process on the upper surface (10a), the lower surface (10b), and the inner surface (10c) of the metal support (10). Alternatively, the adhesion reinforcing layer (12) contains a component that improves the adhesion between the metal support (10) and the covering layer (11), and is formed, for example, by performing a surface treatment such as anodizing process on the upper surface (10a), the lower surface (10b), and the inner surface (10c) of the metal support (10).

In this case, since the adhesion between the metal support (10) and the covering layer (11) is improved by the adhesion reinforcing layer (12), the covering layer (11) is prevented from peeling off from the metal support (10). As a result, since the insulation between the metal support (10) and the conductor layer (50) is secured, the reliability of the metal support (10) is improved.

Here, when the adhesion reinforcing layer (12) is composed of an oxide of chromium or aluminum, the content of the oxide of chromium or aluminum in the adhesion reinforcing layer (12) is preferably 50 wt% or less.

Chromium and aluminum have lower thermal conductivity when oxidized. According to the above configuration, the decrease in thermal conductivity of the adhesion reinforcing layer (12) is reduced compared to the case where the content of chromium or aluminum oxide in the adhesion reinforcing layer (12) is greater than 50 wt%. Accordingly, the decrease in heat dissipation efficiency of the semiconductor element (700) and the rigid substrate (800) due to the adhesion reinforcing layer (12) is reduced.

(2) In the rewiring substrate (100) according to the above embodiment, the covering layer (11) is formed over the entire upper surface (10a), lower surface (10b), and inner surface (10c) of the metal support (10). Not limited to this example, the covering layer (11) may be formed only on the inner surface (10c) of the via hole (19) of the metal support (10), the region of the upper surface (10a) of the metal support (10) where the first conductive layer (51) is formed, and the region of the lower surface (10b) of the metal support (10) where the third conductive layer (61) is formed.

(3) The covering layer (11) according to the above embodiment is used to secure insulation between the first conductor layer (51) and the metal support (10) on the upper surface (10a) of the metal support (10), but the present invention is not limited thereto. The covering layer (11) may be formed so that a part of the first conductor layer (51) is in direct contact with the upper surface (10a) of the metal support (10). In this case, the part of the first conductor layer (51) that is in direct contact with the upper surface (10a) of the metal support (10) can be used as a heat transfer wiring (thermal wiring) for efficiently transferring heat between an electronic component provided on the upper surface (10a) of the metal support (10) and the metal support (10).

In addition, the covering layer (11) according to the above embodiment is used to secure insulation between the third conductor layer (61) and the metal support (10) on the lower surface (10b) of the metal support (10), but the present invention is not limited thereto. The covering layer (11) may be formed on the lower surface (10b) of the metal support (10) so that a part of the third conductor layer (61) directly contacts the lower surface (10b) of the metal support (10). In this case, the part of the third conductor layer (61) that directly contacts the lower surface (10b) of the metal support (10) can be used as a heat transfer wiring (thermal wiring) for efficiently transferring heat between an electronic component provided on the lower surface (10b) of the metal support (10) and the metal support (10).

(4) The above embodiment is an example of applying the present invention to a rewiring substrate, but is not limited thereto, and the present invention may be applied to other wiring circuit boards including via holes. In addition, the rewiring substrate (100) according to the above embodiment may constitute a part of a semiconductor package substrate.

(5) In the above embodiment, the insulating layer (20) is formed by the first insulating layer (21) and the second insulating layer (22), but the present invention is not limited thereto. The insulating layer (20) may be a single insulating layer, or may be formed by a different number of insulating layers. In addition, in the above embodiment, the insulating layer (30) is formed by the third insulating layer (31) and the fourth insulating layer (32), but the present invention is not limited thereto. The insulating layer (30) may be a single insulating layer, or may be formed by a different number of insulating layers. In these cases, the shape of the conductor layer (50) is determined according to the configuration of the insulating layers (20, 30).

(6) In the rewiring substrate (100) according to the above embodiment, the outline line (OL) in the cross section of the inner peripheral surface (10c) of the via hole (19) is a curved line, but the present invention is not limited to this. The outline line (OL) in the cross section of the inner peripheral surface (10c) of the via hole (19) may be a straight line connecting the first point (P1) and the second point (P2).

9. Correspondence between each component of the claim and each part of the embodiment

Hereinafter, the correspondence between each component of the claim and each element of the embodiment will be described, but the present invention is not limited to the following examples. As each component of the claim, various other elements having the configuration or function described in the claim may also be used.

In the above embodiment, the semiconductor element (700) and the rigid substrate (800) are examples of electronic components, the rewiring substrate (100) is an example of a wiring circuit board, the upper surface (10a) or the lower surface (10b) of the metal support (10) is an example of a first surface, the lower surface (10b) or the upper surface (10a) of the metal support (10) is an example of a second surface, the via hole (19) is an example of a via hole, the metal support (10) is an example of a metal support, and the covering layer (11) is an example of an insulating covering layer.

In addition, the conductor layer (50) is an example of a conductor layer, the first direction (d1) is an example of a first direction, the first point (P1) is an example of a first point, the second point (P2) is an example of a second point, the third point (P3) is an example of a third point, the outline (OL) is an example of an outline, and the second direction (d2) is an example of a second direction.

In addition, the plurality of bending points (CP) are examples of the plurality of bending points, the adhesion reinforcing layer (12) is an example of the adhesion reinforcing layer, the semiconductor element (700) is an example of the first electronic component, the rigid substrate (800) is an example of the second electronic component, the temporary covering layer (11a) is an example of the temporary insulating covering layer, the first temporary covering layer (11b) is an example of the first insulating covering layer, and the second temporary covering layer (11c) is an example of the second insulating covering layer.

Claims (17)

As a wiring circuit board to which electronic components are connected,
A metal support including a first side and a second side facing each other and a via hole penetrating from the first side to the second side,
An insulating coating layer formed to cover the inner surface of the via hole while covering at least a portion of the first surface and the second surface of the metal support,
A conductive layer formed on the first surface and the second surface of the metal support and formed within the via hole with the insulating coating layer interposed therebetween,
The metal support has a cross-section defined that is parallel to the first direction, which is the thickness direction of the metal support, and also passes through the opening of the via hole.
The above cross-section includes an outline representing a portion of the inner surface of the via hole,
The above outline includes a first point located on the first surface, a second point located on the second surface, and a third point located between the first point and the second point in the first direction,
A wiring circuit board, wherein the via hole of the metal support is formed such that a thickness (D) of the metal support, a distance (A1) between the first point and the third point in a second direction orthogonal to the first direction, and a distance (A2) between the first point and the third point in the second direction satisfy a relationship of (A1＋A2)/D≥0.25. In the first paragraph,
A wiring circuit board, wherein the thickness of the metal support is 10 ㎛ or more and 100 ㎛ or less. In paragraph 1 or 2,
The above outline includes a plurality of bending points,
A plurality of triangles are defined, each having three consecutively arranged bend points as vertices on the above outline.
A wiring circuit board, wherein when the height of a triangle is calculated using a straight line connecting two non-center inflection points among three inflection points forming each triangle as a base, the largest height among the plurality of heights of the plurality of triangles calculated is 0.6 ㎛ or more. In any one of claims 1 to 3,
A wiring circuit board, wherein the thermal conductivity of the metal support is 10 W/mK or more. In any one of claims 1 to 4,
A wiring circuit board, wherein the coefficient of thermal expansion of the metal support is 0 ㎛/K or more and 25 ㎛/K or less. In any one of paragraphs 1 to 5,
The above insulating coating layer is formed to contact the metal support,
A wiring circuit board, wherein the metal support includes a component that improves the adhesion of the insulating coating layer to the metal support. In any one of paragraphs 1 to 5,
A wiring circuit board further comprising an adhesion reinforcing layer formed between the metal support and the insulating coating layer so as to contact the metal support and the insulating coating layer, the adhesion reinforcing layer including a component that improves adhesion of the insulating coating layer to the metal support. In Article 7,
The above adhesion reinforcing layer contains chromium or aluminum,
A wiring circuit board, wherein the content of chromium or aluminum in the adhesion reinforcing layer is 50 wt% or less. In any one of claims 1 to 8,
A wiring circuit board, wherein the conductor layer is formed so as to be electrically connected to a first electronic component disposed on the first surface, and is formed so as to be electrically connected to a second electronic component disposed on the second surface. A method for manufacturing a wiring circuit board to which electronic components are connected,
A process for preparing a metal plate including first and second sides facing each other,
A process for forming a metal support by forming a via hole penetrating from the first surface to the second surface in the metal plate;
A process for forming an insulating coating layer so as to cover an inner surface of the via hole while covering at least a portion of the first surface and the second surface of the metal support,
A process of forming a conductor layer on the first surface and the second surface of the metal support, and forming a conductor layer within the via hole by interposing the insulating coating layer,
The process of forming the via hole in the above metal plate is:
In the metal support to be manufactured, a cross-section is defined that is parallel to the first direction, which is the thickness direction of the metal support, and also passes through the opening of the via hole.
When the above cross-section includes an outline representing a part of the inner surface of the via hole, and the outline includes a first point located on the first surface, a second point located on the second surface, and a third point located between the first point and the second point in the first direction,
A method for manufacturing a wiring circuit board, comprising forming a via hole in the metal plate such that a thickness (D) of the metal support, a distance (A1) between the first point and the third point in a second direction orthogonal to the first direction, and a distance (A2) between the first point and the third point in the second direction satisfy a relationship of (A1+A2)/D≥0.25. In Article 10,
The above outline includes a plurality of bending points,
A plurality of triangles are defined, each having three consecutively arranged bend points as vertices on the above outline.
The process of forming the via hole in the above metal plate is:
A method for manufacturing a wiring circuit board, further comprising forming a via hole in the metal plate such that, when calculating the height of the triangle using a straight line connecting two non-center-located inflection points among three inflection points forming each triangle as a base, the largest height among the plurality of heights of the plurality of triangles calculated is 0.6 ㎛ or more. In clause 10 or 11,
The process of forming the via hole in the above metal plate is:
A method for manufacturing a wiring circuit board, further comprising forming the via hole by etching from at least one of the first surface and the second surface of the metal plate. In any one of Articles 10 to 12,
The process of forming the insulating coating layer includes forming the insulating coating layer so as to contact the metal support,
A method for manufacturing a wiring circuit board, wherein the process for preparing the metal plate includes preparing a metal plate as the metal plate, the metal plate including a component that improves the adhesion of the insulating coating layer to the metal support. In any one of Articles 10 to 12,
Before forming the insulating coating layer, the process of forming an adhesion reinforcing layer so as to cover the inner surface of the via hole and to contact the metal support, while covering at least a portion of the first surface and the second surface of the metal support, is further included.
The process of forming the above insulating coating layer is as follows:
Including forming the insulating coating layer on the adhesion reinforcing layer so as to contact the adhesion reinforcing layer,
A method for manufacturing a wiring circuit board, wherein the adhesion reinforcing layer includes a component that improves the adhesion of the insulating coating layer to the metal support. In any one of Articles 10 to 14,
The process of forming the above insulating coating layer is as follows:
Forming a temporary insulating coating layer to cover the first surface of the metal support, the second surface of the metal support, and the inner surface of the via hole, and to fill the inner space of the via hole;
A method for manufacturing a wiring circuit board, comprising forming an insulating coating layer by forming a through hole in a portion of the temporary insulating coating layer formed within the via hole. In any one of Articles 10 to 14,
A method for manufacturing a wiring circuit board, wherein the process of forming the insulating coating layer includes forming the insulating coating layer on the outer surface of the metal support without blocking the via hole. In any one of Articles 10 to 14,
The process of forming the above insulating coating layer is as follows:
Forming a first temporary insulating coating layer to cover the first surface of the metal plate before the via hole is formed;
After the formation of the metal support, a second temporary insulating coating layer is formed to cover the second surface of the metal support and the inner surface of the via hole, and to fill the inner space of the via hole.
A method for manufacturing a wiring circuit board, comprising forming an insulating coating layer by forming a through hole in a portion of the second temporary insulating coating layer formed within the via hole and a portion of the first temporary insulating coating layer overlapping the via hole in the first direction.