KR20240084426A - Display driving circuit, display device comprising thereof and operating method of display driving circuit - Google Patents

Abstract

In a display driving circuit electrically connected to a display panel including a plurality of pixels according to the technical idea of the present disclosure, a compensation voltage is generated based on input image data and information on the display panel, and the input is based on the compensation voltage. a compensation control circuit that performs compensation for the data voltage of the image data; and a timing control circuit that outputs the compensated data voltage to the plurality of pixels.

Description

Display driving circuit, display device including the same, and operating method of the display driving circuit {DISPLAY DRIVING CIRCUIT, DISPLAY DEVICE COMPRISING THEREOF AND OPERATING METHOD OF DISPLAY DRIVING CIRCUIT}

The technical idea of the present disclosure relates to a semiconductor device, and in particular, a display driving circuit that improves the crosstalk problem caused by coupling of a driving voltage to a display device, a display device including the same, and the operation of the display driving circuit. It's about method.

Display devices are widely used in smart phones, laptop computers, monitors, etc., and the display device includes a display panel that displays an image, and a plurality of pixels are arranged on the display panel. As pixels are driven by data signals provided from a display driver IC, an image is implemented on the display panel.

As displays become larger, resolution increases, and accordingly, when a reference voltage generator supplies a reference voltage to the display panel through a buffer circuit, image quality defects such as crosstalk may occur. The electrical interference phenomenon in which unwanted pixels are affected by the operation of neighboring pixels on a display panel is called crosstalk.

The technical idea of the present disclosure provides a display driving circuit that reduces noise such as crosstalk generated by coupling of driving voltages generated in a display panel, a display device including the same, and a method of operating the display driving circuit.

The technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the description below.

In order to achieve the above object, in a display driving circuit electrically connected to a display panel including a plurality of pixels according to the technical idea of the present disclosure: generating a compensation voltage based on input image data and information on the display panel. and a compensation control circuit that performs compensation for the data voltage of the input image data based on the compensation voltage. and a timing control circuit that outputs the compensated data voltage to the plurality of pixels.

In order to achieve the above object, in a display driving circuit electrically connected to a display panel in which a plurality of pixels according to the technical idea of the present disclosure are arranged in a plurality of lines: driving in a target line of the display panel After the first ripple of voltage occurs, generate a compensation voltage based on a stabilization period of the driving voltage of the target line, and perform compensation for the data voltage of the input image data based on the compensation voltage. compensation control circuit; and a timing control circuit that outputs the compensated data voltage to the plurality of pixels.

In order to achieve the above object, in a display driving circuit electrically connected to a display panel in which a plurality of pixels according to the technical idea of the present disclosure are arranged in a plurality of lines: Before the target line of the display panel a compensation control circuit that generates a compensation voltage based on an on pixel ratio (OPR) of a line and performs compensation for a data voltage of input image data based on the compensation voltage; and a timing control circuit that outputs the compensated data voltage to the plurality of pixels.

In order to achieve the above object, there is provided a display device according to the technical idea of the present disclosure: a display panel in which a plurality of pixels are arranged in a plurality of lines; and receiving input image data from a host processor, generating a compensation voltage based on at least one of first compensation data, second compensation data, third compensation data, and fourth compensation data, and generating the compensation voltage based on the compensation voltage. It is configured to include a display driving circuit that performs compensation for the data voltage of the input image data and outputs the compensated data voltage to the plurality of pixels, wherein the first compensation data is the data voltage of the input image data. It is generated based on the amount of change and the information of the display panel, and the second compensation data is generated after the first ripple of the driving voltage in the target line of the display panel is generated, and the stabilization of the driving voltage of the target line ) is generated based on a period, the third compensation data is generated based on the OPR (on pixel ratio) of the previous line compared to the target line, and the fourth compensation data is generated based on the plurality of pixels from the display driving circuit. It can be generated based on the vertical distance to each pixel.

According to the display driving circuit, display device, and operating method of the display driving circuit according to embodiments of the present disclosure, image data (e.g., data By compensating for voltage), effective removal of crosstalk and optimized compensation for image data can be performed, and as a result, the performance of the overall display system can be improved.

The effects that can be obtained from the exemplary embodiments of the present disclosure are not limited to the effects mentioned above, and other effects not mentioned are common knowledge in the technical field to which the exemplary embodiments of the present disclosure belong from the following description. It can be clearly derived and understood by those who have it. That is, unintended effects resulting from implementing the exemplary embodiments of the present disclosure may also be derived by those skilled in the art from the exemplary embodiments of the present disclosure.

FIG. 1A is a circuit diagram for explaining the cause of crosstalk according to an exemplary embodiment of the present disclosure.
FIG. 1B is a timing diagram for explaining a crosstalk occurrence phenomenon according to an exemplary embodiment of the present disclosure.
Figure 2 is a block diagram showing a display device and a display system including the same according to an exemplary embodiment of the present disclosure.
Figure 3 is a block diagram showing a display driving circuit and a display panel according to an exemplary embodiment of the present disclosure.
Figure 4 is a block diagram schematically showing a compensation control circuit according to an exemplary embodiment of the present disclosure.
Figure 5 is a flowchart showing a method of operating a display driving circuit according to an exemplary embodiment of the present disclosure.
FIG. 6A is a block diagram illustrating an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.
FIG. 6B is a diagram for explaining an operation of generating a compensation voltage based on a display panel structure according to an exemplary embodiment of the present disclosure.
FIG. 6C is a diagram for explaining an operation of generating a compensation voltage based on a display panel structure according to an exemplary embodiment of the present disclosure.
FIG. 6D is a diagram for explaining an operation of generating a compensation voltage based on a display panel structure according to an exemplary embodiment of the present disclosure.
Figure 7 is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.
Figure 8A is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.
FIG. 8B is a diagram for explaining an operation of generating a compensation voltage according to distance information according to an exemplary embodiment of the present disclosure.
Figure 9A is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.
FIG. 9B is a diagram for explaining an operation of generating a compensation voltage according to a stabilization period according to an exemplary embodiment of the present disclosure.
FIG. 9C is a diagram for explaining an operation of generating a compensation voltage according to a stabilization period according to an exemplary embodiment of the present disclosure.
Figure 10 shows an implementation example of a display device according to an exemplary embodiment of the present disclosure.
Figure 11 shows an implementation example of a display device according to an exemplary embodiment of the present disclosure.

Above, embodiments of the present invention have been described with reference to the attached drawings, but those skilled in the art will understand that the present invention can be implemented in other specific forms without changing its technical idea or essential features. You will understand that it exists. Therefore, the embodiments described above should be understood as illustrative in all respects and not restrictive.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the attached drawings.

FIG. 1A is a circuit diagram for explaining the cause of crosstalk according to an exemplary embodiment of the present disclosure.

In FIG. 1A, it is assumed that the display panel is an OLED display panel in which each pixel includes an organic light emitting diode (OLED). However, it is not limited to this, and the display panel may be implemented as another type of flat display or flexible display panel.

As shown in Figure 1A, the scan direction for the image on the display panel is assumed to be from top to bottom, the image pattern at position A is kept constant (e.g., remains a gray area), and the image at position B is The pattern is assumed to be changing (e.g., changing from a gray area to a black area).

Referring to FIG. 1A, a circuit diagram of a backplane of a display panel (e.g., Organic Light Emitting Diodes (OLED)) is shown. For example, an OLED display applies the voltage (Vcst) (or data voltage (Vdata)) charged in the storage capacitance (Cst) of the backplane of the display panel to each pixel of the corresponding display panel to display one frame. It is a hold type display that drives image data. At this time, the backplane of the display panel may be composed of a plurality of wires for transmitting and receiving data and control information for driving pixels and for supplying power, and various parasitic capacitances may exist between the wires. In particular, the parasitic capacitance (Cparasitic) generated between the crossing driving voltage (ELVDD) wire and the data wire causes coupling of the driving voltage when the data voltage (Vdata) changes (transition), causing the driving voltage to change. A ripple phenomenon may occur.

For example, in the case of position A, the image pattern is maintained constant and the data voltage (Vdata) can be maintained constant. Conversely, in the case of position B, the image pattern changes and the data voltage (Vdata) may change significantly, which may cause parasitic capacitance (Cparasitic). The phenomenon of crosstalk occurring due to parasitic capacitance (Cparasitic) at position B is explained in Figure 1b.

FIG. 1B is a timing diagram for explaining a crosstalk occurrence phenomenon according to an exemplary embodiment of the present disclosure.

In detail, FIG. 1B is a timing diagram for explaining the phenomenon of crosstalk occurring due to a change in data voltage at position B in FIG. 1A.

When the emission voltage signal (Emss`n) of FIG. 1B is in the EL OFF state maintained at a high level, the n-1th scan voltage signal (Scan(n-1)) transitions (e.g., from high level to low level). The point at which the pixel's data voltage signal (Vdata) transitions (e.g. transitions from low level to high level) is 'p point', and the nth scan voltage signal (Scan(n)) The point at which the first transition (e.g., transition from high level to low level) is 'q time', and the nth scan voltage signal (Scan(n)) is the second transition (e.g., transition from low level to high level). The point in time is 'r time', and the amount of ripple generated in the driving voltage (ELVDD) according to the transition of the data voltage (Vdata) at time r is assumed to be 'dELVDD'. For example, the period during which the data voltage (Vdata) is charged to the pixel by the storage capacitance (Vcst) at location B in FIG. 1A may mean from 'q time' to 'r time'.

Referring to Figure 1b, as the n-1th scan voltage signal (Scan(n-1)) transitions to the low level at time s, the storage capacitance (Vcst) at the B position changes to the existing voltage value (e.g., ' It can be initialized from 'Vdata+Vth', where Vth means the minimum threshold voltage value for driving the display device) to an initialization voltage value (e.g., 'Vint').

As the image pattern in FIG. 1A changes at time point p (e.g., changes from a gray area to a black area), the data voltage Vdata may change from a low level to a high level. As described above in FIG. 1A, a change in the data voltage Vdata may generate a ripple 11 of the driving voltage ELVDD due to coupling of the driving voltage ELVDD. The ripple 11 of the driving voltage (ELVDD) may refer to a phenomenon in which the driving voltage (ELVDD) temporarily fluctuates due to internal and external factors of the display device and/or environmental factors in which the device is driven.

As the nth scan voltage signal (Scan(n)) transitions from low level to high level from time q to time r, the storage capacitance (Vcst) at location B may be charged based on the data voltage (Vdata). . However, due to the ripple 11 (e.g., dELVDD) of the driving voltage (ELVDD) generated at location B, the voltage value charged to the storage capacitance (Vcst) at location B at time r is 'Vdata+', which is the target charging voltage value. Instead of ‘Vth’, it can be changed to ‘Vdata+Vth-dELVDD’. As described above, when a pixel is charged with a voltage value that is different from the target charging voltage value, crosstalk, which is expressed as a luminance value different from the luminance value at which the pixel should be displayed, may occur, which may cause a problem that degrades the performance of the entire display device. there is.

2 to 11, which will be described later, an embodiment of the present disclosure includes a display driving circuit that effectively compensates for crosstalk using a compensation voltage generated in consideration of the characteristics of the display panel and/or the cause of crosstalk, and a display including the same. A device or display system may be provided.

Figure 2 is a block diagram showing a display device and a display system including the same according to an exemplary embodiment of the present disclosure.

The display system 10 according to an exemplary embodiment of the present disclosure may be mounted on an electronic device having an image display function. For example, electronic devices include smartphones, tablet personal computers, portable multimedia players (PMPs), cameras, wearable devices, televisions, digital video disk (DVD) players, Includes refrigerators, air conditioners, air purifiers, set-top boxes, robots, drones, various medical devices, navigation devices, GPS receivers (global positioning system receivers), vehicle devices, furniture, and various measuring devices. can do.

Referring to FIG. 2, the display system 10 includes a display device 100 and a host processor 200, and the display device 100 includes a display driving circuit 110 (also referred to as a display driving integrated circuit) and a display panel. It may include (120).

The host processor 200 may generate image data (IDT) to be displayed on the display panel 120 and transmit the image data (IDT) and control command (CMD) to the display driving circuit 110. For example, the control command (CMD) may include setting information about luminance, gamma, frame frequency, operation mode of the display driving circuit 110, etc. The host processor 200 may transmit a clock signal or a synchronization signal to the display driving circuit 110.

The host processor 200 may be a graphics processor. However, the present invention is not limited thereto, and the host processor 200 may be implemented with various types of processors, such as a Central Processing Unit (CPU), a microprocessor, a multimedia processor, and an application processor. In an embodiment, the host processor 200 may be implemented as an integrated circuit (IC) or system on chip (SoC).

The display device 100 may display image data (IDT) received from the host processor 200. In an embodiment, the display device 100 may be a device in which the display driving circuit 110 and the display panel 120 are implemented as a single module. For example, the display driving circuit 110 is mounted on a substrate of the display panel 120, or the display driving circuit 110 and the display panel 120 are connected to a flexible printed circuit board (FPCB), etc. They can be electrically connected through members.

The display panel 120 is a display unit that displays an actual image, and may include an organic light emitting diode (OLED) display, a thin film transistor-liquid crystal display (TFT-LCD), or a field emission display (FILED). It may be one of a display device that displays a two-dimensional image by receiving an electrically transmitted image signal, such as an emission display or a plasma display panel (PDP). Hereinafter, in the present disclosure, it is assumed that the display panel 120 is an OLED display panel in which each pixel includes an organic light emitting diode (OLED). However, it is not limited thereto, and the display panel 120 may be implemented as another type of flat display or flexible display panel.

The display driving circuit 110 converts the image data (IDT) received from the host processor 200 into a plurality of analog signals, for example, a plurality of data voltages for driving the display panel 120, and the converted analog signals. can be supplied to the display panel 120. Accordingly, an image corresponding to the image data IDT may be displayed on the display panel 120.

The display driving circuit 110 according to this embodiment may include a compensation control circuit 300. The compensation control circuit 300 may compensate the data voltage using a compensation voltage generated based on the characteristics of the display panel and/or the cause of crosstalk. For example, the compensation control circuit 300 may include at least one of data change amount information according to the image pattern, OPR (on pixel ratio) information, distance information from the display driving circuit to the pixel, and information about the stabilization period of the display driving voltage. Based on this, a compensation voltage can be generated. The compensation control circuit 300 can compensate for the amount of change in the data voltage due to crosstalk by adding the generated compensation voltage to the existing data voltage.

The display driving circuit 110 includes a reference voltage generator (115 in FIG. 3) that converts the pixel value into a reference voltage (or gray level voltage) corresponding to the gray level indicated by the pixel value, and generates a reference voltage corresponding to the pixel value. It can be applied to the pixels of the display panel 120. Accordingly, an optical signal with luminance corresponding to the pixel value may be output from the pixel. The reference voltage generator may generate a plurality of reference voltages.

As described above, the display driving circuit 110 according to an embodiment of the present disclosure is a compensation control circuit that adaptively generates a compensation voltage according to the characteristics of the display panel and/or the cause of crosstalk, such as crosstalk. Noise can be reduced.

Figure 3 is a block diagram showing a display driving circuit and a display panel according to an exemplary embodiment of the present disclosure.

In detail, FIG. 3 is a diagram for explaining the display driving circuit and display panel included in the display system 10 of FIG. 2. The compensation control circuit 111 of the display driving circuit 110 of FIG. 3 may correspond to the compensation control circuit 300 of the display driving circuit 110 of FIG. 2 .

Referring to FIG. 3, the display driving circuit 110 includes an interface circuit 110, a compensation control circuit 111, a timing controller 112, a memory 113, a data driver 114 (also called a source driver), It may include a gamma voltage generator 115 and a scan driver 116 (also referred to as a gate driver). The display driving circuit 110 may further include other general-purpose components, such as a voltage generator and a clock generator.

In an embodiment, the interface circuit 110, compensation control circuit 111, timing controller 112, memory 113, data driver 114, gamma voltage generator 115, and scan driver 116 are one It can be integrated into a semiconductor chip. Alternatively, the interface circuit 110, compensation control circuit 111, timing controller 112, memory 113, data driver 114, and gamma voltage generator 115 are formed on one semiconductor chip, and the scan driver ( 116) may be formed on the display panel (120 in FIG. 2).

The interface circuit 110 can transmit and receive signals or data with the host processor 200. The interface circuit 110 is a serial interface such as Mobile Industry Processor Interface (MIPI®), Mobile Display Digital Interface (MDDI), DisplayPort, or Embedded Display Port (eDP). It can be implemented as one of the interfaces).

The memory 113 may store image data received from the host processor 200 in units of frames. In addition, the memory 113 stores various data required when generating a compensation voltage by the compensation control circuit 111 (e.g., ripple generation data of the driving voltage (ELVDD) previously generated in the display panel, average gray scale voltage data, display panel characteristics). Compensation weight data according to, etc.) can be stored and then transmitted to the compensation control circuit 111. The memory 113 may be referred to as graphics RAM (Random Access Memory), frame buffer, etc. The memory 113 is a volatile memory such as Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), or ROM or Flash memory, Resistive Random Access Memory (ReRAM), and Magnetic Random Access Memory (MRAM). It may include the same non-volatile memory. Image data received from the host processor 200 may be stored in the memory 113 before or after the image data is processed by the timing controller 112. In an embodiment, the display driving circuit 110 may not include the memory 113, and in this case, the image data received from the host processor 220 is image-processed by the timing controller 112, and then the data driver ( 114).

The compensation control circuit 111 generates a compensation voltage based on the characteristics of the image data received from the host processor 200 and/or the characteristics of the display panel 120, and compensates the image data (e.g. : data voltage) can be transmitted to the timing controller 112. A detailed description of this is provided later in FIGS. 4 to 9C.

The compensation control circuit 111 may be implemented as hardware or a combination of software (or firmware) and hardware. For example, the compensation control circuit 111 is implemented with hardware logic, various hardware logic such as ASIC (Application Specific IC), FPGA (Field Programmable Gate Array), CPLD (Complex Programmable Logic Device), etc., or MCU ( It may be implemented as firmware or software running on a processor such as a Micro Controller Unit (CPU), or a combination of hardware devices and software.

The timing controller 112 controls the overall operation of the display driving circuit 110 and configures the display driving circuit 110 such that image data received from the host 100 is displayed on the display panel 120, such as an interface. The circuit 110, compensation control circuit 111, memory 113, data driver 114, gamma voltage generator 115, and scan driver 116 can be controlled. The timing controller 112 may generate compensated image data CIDT based on the compensation voltage received from the compensation control circuit 111 and transmit it to the data driver 114.

Additionally, the timing controller 112 performs image processing to change luminance, change size, change format, etc. on the received image data, or generates new image data to be displayed on the display panel 120 based on the received image data. You can also create . To this end, the timing controller 112 may include intellectual properties (IP) for image processing.

The gamma voltage generator 115 generates a plurality of reference voltages (VG<n-1:0>) (also referred to as grayscale voltage or gamma voltage) based on the set gamma curve, for example, n reference voltages (VG<n-1). :0>) (n is an integer of 2 or more), and reference voltages (VG<n-1:0>) may be provided to the data driver 114. The gamma voltage generator 115 may adjust the highest and/or lowest reference voltage and the gamma curve according to the gamma setting value. At this time, the gamma curve is a graph showing the luminance of an optical signal output from a pixel (PX) of the display panel 120 with respect to a plurality of gray levels. The voltage levels of the plurality of reference voltages (VG<n-1:0>) are adjusted so that an optical signal of luminance according to the set gamma curve is output, or the voltage level of the plurality of reference voltages (VG<n-1:0>) is adjusted. According to the voltage level adjustment of >), the gamma curve can be adjusted. The gamma voltage generator 115 may provide a plurality of reference voltages (VG<n-1:0>) to the data driver 114.

The data driver 114 converts the compensated image data (CIDT) received from the timing controller 112 into a plurality of image signals, for example, a plurality of data voltages (VD1 to VDm), and Can be output to the display panel 120 through a plurality of data lines DL.

The data driver 114 may receive the compensated image data (IDT) in line data units, that is, in data units corresponding to a plurality of pixels included in one horizontal line of the display panel. The data driver 114 converts line data received from the timing controller 112 to a plurality of data voltages ( It can be converted to VD1~VDm) (m is an integer of 2 or more).

The scan driver 116 is connected to a plurality of scan lines (SL) of the display panel 120 and can sequentially drive the plurality of scan lines (SL) of the display panel 120. The scan driver 116, under the control of the timing controller 112, sends a plurality of scan signals S1 to Sn (n is a positive integer of 2 or more) having an active level, for example, logic high, to a plurality of scan lines SL. Can be provided sequentially. Accordingly, a plurality of scan lines SL may be sequentially selected, and a plurality of data voltages VD1 to VDm may be applied to a plurality of pixels PX connected to the selected scan line SL.

The display panel 120 may include a plurality of data lines (DL), a plurality of scan lines (SL), and a plurality of pixels (PX) disposed between the lines. Each of the plurality of pixels PX may be connected to a corresponding scan line SL and a data line DL.

Each of the plurality of pixels (PX) may output light of a preset color, and two or more pixels (PX) arranged adjacent to each other on the same or adjacent line and outputting light of different colors (e.g., red, blue, and green pixels) can constitute one unit pixel. At this time, two or more pixels (PX) constituting a unit pixel may be referred to as subpixels. The display panel 120 may have an RGB structure in which red, blue, and green pixels constitute one unit pixel. However, it is not limited to this, and the display panel 120 may have an RGBW structure in which unit pixels further include white pixels to improve luminance. Alternatively, the unit pixel of the display panel 120 may be composed of a combination of pixels of colors other than red, green, and blue.

The display panel 120 may be an OLED display panel in which each of the plurality of pixels (PX) includes an organic light emitting diode. However, it is not limited thereto, and the display panel 120 may be implemented as another type of flat display or flexible display panel.

Figure 4 is a block diagram schematically showing a compensation control circuit according to an exemplary embodiment of the present disclosure.

In detail, a diagram is shown to explain the functional blocks within the compensation control circuit 111 of FIG. 3. Here, the input data voltage in FIG. 4 refers to the image data (IDT) (or the data voltage of the image data) received from the host processor 200 in FIG. 2, and the output data voltage in FIG. 4 refers to the compensation control circuit 111. It can be output to the timing controller 112 as image data compensated by .

Additionally, the display panel information in FIG. 4 is information related to display panel characteristics and may include, for example, information about the structure of a data line driven in the display panel or the structure of a multiplexer (MUX). At this time, the information about the structure of the data line of the display panel may include information about the data line structure selected from a single data line (SDL) structure or a dual data line (DDL) structure, and information about the MUX structure of the display panel. may include information about the MUX structure selected from a no-MUX structure, a two-MUX structure, or a 4:1 MUX structure.

Referring to FIG. 4, the compensation control circuit 111 includes an ELVDD ripple calculation circuit 410, a memory 420, a compensation voltage (CV) calculation circuit 430, and a compensation circuit 440. It can be included.

The OPR calculation circuit 411 may calculate the OPR of the target line compared to the previous line on the display panel and transmit the generated OPR information to the ELVDD ripple calculation circuit 410. In this specification, the target line may refer to a line scanned in the corresponding scan cycle among a plurality of pixel lines (eg, row lines) arranged on the display panel. For example, the size of the OPR of the target line compared to the previous line may be determined based on the difference between the average data voltage (or average gray scale voltage) of the target line and the average data voltage (or average gray scale voltage) of the previous line of the target line. there is.

The ELVDD ripple calculation circuit 410 may receive display panel information from an external processor and receive OPR information from the on pixel ratio (OPR) calculation circuit 411. For example, since the amount of ripple generated in the driving voltage (ELVDD) is affected by the characteristics of the display panel and/or the OPR of the target line in the display panel, the ELVDD ripple calculation circuit 410 provides display panel information and/or Based on the OPR information, the amount of ripple generated in the driving voltage (ELVDD) can be calculated. In addition, the ELVDD ripple calculation circuit 410 is driven based on the ripple generation amount information of the driving voltage ELVDD generated in at least one previous line stored in the memory 420, or the average gray scale voltage information in at least one previous line. The amount of ripple generation in voltage (ELVDD) can be calculated. The ELVDD ripple calculation circuit 410 can predict the amount of crosstalk in the target line based on the calculated ripple amount of the driving voltage (ELVDD). The ELVDD ripple calculation circuit 410 may transmit ripple generation amount information of the driving voltage ELVDD to the compensation voltage (CV) calculation circuit 430.

The compensation voltage (CV) calculation circuit 430 is one of a plurality of weight modules (e.g., a data change weight module 431, an OPR weight module 432, a distance weight module 433, or a stabilization weight module 434). It may include at least one, and may apply a weight to be applied by each of the above-described plurality of weight modules based on ripple generation information of the driving voltage ELVDD. At this time, the compensation voltage (CV) calculation circuit 430 may apply a weight corresponding to the characteristics of a plurality of weight modules from among the plurality of weights stored in the memory 420.

The compensation voltage (CV) calculation circuit 430 may generate a compensation voltage by applying at least one selected weight. For example, the compensation voltage (CV) calculation circuit 430 may generate a compensation voltage based on Equation 1 below.

[Equation 1]

here, means the compensation voltage value of the nth scan line (hereinafter referred to as the target line), means the amount of change in the data voltage value on the target line, means a weight coefficient according to the data change applied by the data change weight module 431 (in Equation 1, the data change weight coefficient is one term (e.g. ), but is not limited thereto, and according to an embodiment of the present disclosure, Equation 1 may include a plurality of data change weight coefficients), means the OPR weight coefficient for the target line applied by the OPR weight module 432, means the vertical distance weight coefficient applied by the distance weight module 433, is the compensation voltage of the previous line (e.g., n-1th scan line) applied by the stabilization weight module 434 ( ) may mean the stabilization weight coefficient for (in Equation 1, the stabilization weight coefficient is one term (e.g. ), but is not limited thereto, and Equation 1 according to an embodiment of the present disclosure may include a plurality of stabilization weight coefficients). Equation 1 represents a plurality of data change amount-related terms (e.g., data line structure and/or MUX structure) depending on the structure of the display panel (e.g., data line structure and/or MUX structure). , , ..., etc.), and Equation 1 may include terms related to a plurality of lines (e.g., compensation voltage of the n-1th scan line ( ), compensation voltage of the n-2th scan line ( ), ..., etc.) may be included.

The compensation circuit 440 applies a compensation voltage (e.g., data voltage of the input image data) to the generated input image data. ), the distortion and/or loss of input image data due to crosstalk can be effectively compensated for.

In FIG. 4, the compensation voltage (CV) calculation circuit 430 includes a plurality of weight modules (e.g., a data change weight module 431, an OPR weight module 432, a distance weight module 433, or a stabilization weight module 434). )), but is not limited thereto, and the compensation voltage (CV) calculation circuit 430 according to an embodiment of the present disclosure includes a plurality of weight modules (e.g., data change weight module 431, OPR It may operate as any one of the weight module 432, the distance weight module 433, or the stabilization weight module 434) or a combination of some modules. A detailed description of the operation of each weight module is provided in FIGS. 6A to 9C described below.

Figure 5 is a flowchart showing a method of operating a display driving circuit according to an exemplary embodiment of the present disclosure.

In detail, FIG. 5 shows image data (or data voltage) lost due to crosstalk using a compensation voltage generated by the display device 100 of FIG. 2 in consideration of the cause of crosstalk and the characteristics of the display panel. ) This is a diagram to explain the operation method to compensate.

In this specification, the target line may refer to a line scanned in the corresponding scan cycle among a plurality of pixel lines (eg, row lines) arranged on the display panel.

Referring to FIG. 5 , compensation voltage generation and image data compensation operations by the display driving circuit 110 of the display device 100 of FIG. 2 may include steps S100, S110, S120, and S130.

In step S100, the display driving circuit 110 may receive input image data from the host processor.

In step S110, the display driving circuit 110 may generate a compensation voltage based on at least one of first compensation data, second compensation data, third compensation data, or fourth compensation data. Here, the first to fourth compensation data may mean weight data to be applied to the input image data depending on the characteristics of the display panel and the cause of crosstalk.

In one embodiment, first compensation data may be generated based on the amount of change in data voltage of the input image data and information on the display panel. A detailed description of this is provided later in FIGS. 6A to 6C. In one embodiment, the second compensation data is generated based on the amount of first ripple generated in the driving voltage of the target line of the display panel and the amount of second ripple generated in the driving voltage of the peripheral line of the target line, The second ripple may refer to a ripple of the driving voltage generated in a line surrounding the target line due to the first ripple. A detailed description of this is provided later in FIGS. 9A and 9B. In one embodiment, the third compensation data may be generated based on the on pixel ratio (OPR) of the previous line compared to the target line. A detailed description of this is provided later in FIG. 7 . In one embodiment, the fourth compensation data may be generated based on the vertical distance from the display driving circuit 110 to each pixel disposed on the display panel. A detailed description of this is provided later in FIGS. 8A to 8B.

In step S120, the display driving circuit 110 may perform compensation for the data voltage of the input image data based on the compensation voltage. For example, the display driving circuit 110 may compensate for input image data lost/transformed due to crosstalk by adding the generated compensation voltage to the data voltage of the input image data.

In step S130, the display driving circuit 110 may output the compensated data voltage to a plurality of pixels of the display panel.

As described above, the display driving circuit according to an embodiment of the present disclosure, and the display device and display system including the same, use a compensation voltage generated in consideration of the cause of crosstalk and the characteristics of the display panel to use image data (e.g. : Data voltage), effective removal of crosstalk and optimized compensation of image data can be performed, and as a result, the performance of the overall display system can be improved.

Figure 6A is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.

In detail, this is a diagram to explain an operation in which the compensation control circuit 111 of FIG. 4 generates a compensation voltage by applying a weight according to the amount of change in image data (or the amount of change in data voltage). The ELVDD ripple calculation circuit 410, memory 420, and compensation circuit 440 of FIG. 6A have been described with reference to FIG. 4, and redundant description will be omitted.

The amount of change in image data (or the amount of change in data voltage) may be proportional to the amount of change in the image pattern for display, and the amount of ripple generation (or amount of crosstalk) in the driving voltage is proportional to the amount of change in image data (or the amount of change in data voltage). You can do it. However, embodiments according to the present disclosure are not limited thereto.

Referring to FIG. 6A, the compensation voltage (CV) calculation circuit 430 may include a data change weight module 431. The data change weight module 431 may apply a data change weight corresponding to the amount of change in image data (or the amount of change in data voltage) of the scanned target line from among the plurality of weights stored in the memory 420. The data change weight is 'in Equation 1 of FIG. 4 described above. ' can be responded to. Since the greater the amount of change in the image pattern for display, the greater the amount of change in image data (or the amount of change in data voltage), the compensation voltage (CV) calculation circuit 430 can also apply a large data change weight. For example, a pattern that changes from a gray area to a black area is assumed to be a first image pattern, and a pattern that changes from a white area to a black area is assumed to be a second image pattern. Because the amount of change in image data in the second image pattern is greater than that in the first image pattern, the data change weight applied to the second image pattern may be relatively larger than the data change weight applied to the first image pattern.

In one embodiment, the compensation voltage (CV) calculation circuit 430 may apply a data change weight using a different algorithm depending on the data line structure of the display panel. 6B to 6C, which will be described later, an embodiment of applying a data change weight for each type of data line structure will be disclosed.

A display driving circuit according to an embodiment of the present disclosure and a display device or display system including the same adaptively adjust the compensation voltage in consideration of the structural characteristics of the display panel by applying different weights to the compensation voltage for each data line structure of the display panel. can be created.

FIG. 6B is a diagram for explaining an operation of generating a compensation voltage based on a display panel structure according to an exemplary embodiment of the present disclosure.

The pixel arrangement in FIG. 6B is shown in RGBG form, but is not limited thereto, and the pixel arrangement of the display panel according to an exemplary embodiment of the present disclosure may be composed of various types of pixel arrangement, such as GGRB form or RBGB form. You can.

In detail, this is a diagram to explain an embodiment of applying a data change weight by the compensation voltage (CV) calculation circuit 430 of FIG. 6A in the single data line (SDL) structure of the display panel.

In FIG. 6B, when scanning the G3 line among the plurality of lines arranged on the display panel, as the image pattern changes (e.g., from a gray area to a black area), a ripple is caused in the driving voltage (ELVDD), causing a cross It is assumed that torque occurs.

Referring to FIG. 6b, in the case of the SDL structure of the display panel, the first pixel (R11), the second pixel (B21), the third pixel (R31), and the fourth pixel (B41) of the display panel are connected to the first data line ( Pixel data is output to the source line (S1) through A1), and the fifth pixel (G11), sixth pixel (G21), seventh pixel (G31), and eighth pixel (G41) of the display panel are second data. Pixel data can be output to the source line (S1) through the line (A2).

When the G3 line of the display panel is scanned, the compensation voltage (CV) calculation circuit 430 can generate a compensation voltage by applying a data change weight based on Equation 2.

[Equation 2]

here, ' ' is the value in Equation 1 where the data change weight is applied to the amount of change in image data (or data voltage) in the SDL structure. can respond. 'a' refers to the data change weight in the first data line (A1), and '(R31-B21)' refers to the amount of change in image data (or amount of change in data voltage) in the first data line (A1). and 'b' refers to the data change weight in the second data line (A2), and '(G31-G21)' refers to the change amount of image data (or change amount of data voltage) in the second data line (A2). It can mean.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated based on '. For example, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage (CV) based on Equation 3. ) can be created.

[Equation 3]

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated by applying at least one weight of Equation 1 described above.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' in Equation 1 above. You can generate a compensation voltage by substituting into '.

FIG. 6C is a diagram for explaining an operation of generating a compensation voltage based on a display panel structure according to an exemplary embodiment of the present disclosure.

In detail, this is a diagram to explain an embodiment of applying a data change weight by the compensation voltage (CV) calculation circuit 430 of FIG. 6A in the dual data line (DDL) structure of the display panel.

Although the pixel arrangement in FIG. 6C is shown in RGBG form, it is not limited to this, and the pixel arrangement of the display panel according to an exemplary embodiment of the present disclosure may be composed of various types of pixel arrangement, such as GGRB form or RBGB form. You can.

In FIG. 6C, when scanning the G3 line among the plurality of lines arranged on the display panel, as the image pattern changes (e.g., from a gray area to a black area), a ripple is caused in the driving voltage (ELVDD), causing a cross It is assumed that torque occurs.

Referring to FIG. 6C, in the case of the DDL structure of the display panel, the first pixel (R11) and the third pixel (R31) of the display panel transmit pixel data to the source line (S1) through the first data line (A1). The second pixel B21 and the fourth pixel B41 of the display panel may output pixel data to the source line S1 through the second data line A1'.

The fifth pixel G11 and the seventh pixel G31 of the display panel output pixel data to the source line S1 through the third data line A2, and the sixth pixel G21 of the display panel outputs pixel data to the source line S1 through the third data line A2. The eighth pixel G41 may output pixel data to the source line S1 through the fourth data line A2′.

When the G3 line of the display panel is scanned, the compensation voltage (CV) calculation circuit 430 can generate a compensation voltage by applying a data change weight based on Equation 4.

[Equation 4]

here, ' ' is the value in Equation 1 where the data change weight is applied to the change amount of image data (or data voltage) in the DDL structure. can respond. 'e' refers to the data change weight in the first data line (A1), and '(R31-R11)' refers to the amount of change in image data (or amount of change in data voltage) in the first data line (A1). And, 'f' means the data change weight in the second data line (A1`), and '(B41- B21)' means the amount of change in image data (or data voltage) in the second data line (A1`). It can mean amount of change). 'g' refers to the data change weight in the third data line (A2), and '(G31-G11)' refers to the amount of change in image data (or change in data voltage) in the third data line (A2). And, 'h' means the data change weight in the fourth data line (A2`), and '(G41-G21)' means the amount of change in image data (or data voltage) in the fourth data line (A2`). It can mean amount of change).

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated based on '. For example, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage (CV) based on Equation 5. ) can be created.

[Equation 5]

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' and at least one weight of Equation 1 described above can be applied to generate a compensation voltage.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' in Equation 1 above. You can generate a compensation voltage by substituting into '.

FIG. 6D is a diagram for explaining an operation of generating a compensation voltage based on a display panel structure according to an exemplary embodiment of the present disclosure.

Although the pixel arrangement in FIG. 6D is shown in RGBG form, it is not limited to this, and the pixel arrangement of the display panel according to an exemplary embodiment of the present disclosure may be composed of various types of pixel arrangement, such as GGRB form or RBGB form. You can.

In detail, this is a diagram to explain an embodiment of applying a data change weight by the compensation voltage (CV) calculation circuit 430 of FIG. 6A in the no-MUX structure of the SDL of the display panel.

In FIG. 6D, when scanning the G3 line among the plurality of lines arranged on the display panel, as the image pattern changes (e.g., from a gray area to a black area), a ripple is caused in the driving voltage (ELVDD), causing a cross It is assumed that torque occurs.

Referring to FIG. 6D, in the case of the SDL structure of the display panel, the first pixel (R11), the second pixel (B21), the third pixel (R31), and the fourth pixel (B41) of the display panel are connected to the first data line ( Pixel data is output to the source line (S1) through A1), and the fifth pixel (G11), sixth pixel (G21), seventh pixel (G31), and eighth pixel (G41) of the display panel are second data. Pixel data can be output to the source line (S2) through the line (A2).

When the G3 line of the display panel is scanned, the compensation voltage (CV) calculation circuit 430 can generate a compensation voltage by applying a data change weight based on Equation 6.

[Equation 6]

here, ' ' is the value in Equation 1 where the data change weight is applied to the amount of change in image data (or data voltage) in the SDL structure. can respond. 'a' refers to the data change weight in the first data line (A1), and '(R31-B21)' refers to the amount of change in image data (or amount of change in data voltage) in the first data line (A1). And '(G31-G21)' may mean the amount of change in image data (or the amount of change in data voltage) in the second data line A2. In Equation 6, only the first data line (A1) and the second data line (A2) are described for convenience of explanation, but it is not limited thereto, and the compensation voltage (CV) calculation circuit according to an embodiment of the present disclosure ( 430) may generate a compensation voltage based on the amount of change in image data up to the nth data line An (n≥1) disposed on the display panel.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated based on '. For example, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage (CV) based on Equation 7. ) can be created.

[Equation 7]

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated by applying at least one weight of Equation 1 described above.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' in Equation 1 above. You can generate a compensation voltage by substituting into '.

Figure 7 is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.

In detail, this is a diagram to explain the operation of the compensation control circuit 111 of FIG. 4 to generate a compensation voltage by applying weight according to the on pixel ratio (OPR) to the target line. The ELVDD ripple calculation circuit 410, OPR calculation circuit 411, memory 420, and compensation circuit 440 of FIG. 7 have been described with reference to FIG. 4, and redundant description will be omitted.

The amount of ripple generation (or the amount of crosstalk) of the driving voltage may be proportional to the size of the OPR for the target line. However, embodiments according to the present disclosure are not limited thereto. In this specification, the target line may refer to a line scanned in the corresponding scan cycle among a plurality of pixel lines (eg, row lines) arranged on the display panel.

Referring to FIG. 7 , the compensation voltage (CV) calculation circuit 430 may include an OPR weight module 432. The OPR weight module 432 may select an OPR weight corresponding to the OPR of the target line from among a plurality of weights stored in the memory 420. The OPR weight is expressed in Equation 1 of FIG. 4 described above. ' can be responded to. For example, the OPR weight may be selected as a large value in proportion to the size of the OPR of the target line, but is not limited to this. For example, the size of the OPR of the target line can be determined by the data average value of the previous line (e.g., the average value of the data voltage or the average value of gray levels), the average value of the data of the target line (e.g., the average value of the data voltage or the average value of the gray level), or the previous line. It may be determined based on at least one of the difference between the data average value of and the data average value of the target line.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage (CV) based on Equation 8. ) can be created.

[Equation 8]

here, means the amount of change in the data voltage value on the target line, may mean the OPR weight coefficient for the target line applied by the OPR weight module 432.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated by applying at least one weight of Equation 1 described above.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' can be substituted into Equation 1 described above to generate a compensation voltage.

A display driving circuit according to an embodiment of the present disclosure and a display device or display system including the same may adaptively generate a compensation voltage by applying a weight corresponding to the OPR of the target line of the display panel.

Figure 8A is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.

In detail, this is a diagram to explain the operation of the compensation control circuit 111 of FIG. 4 to generate a compensation voltage by applying weight according to the vertical distance of pixels arranged on the display panel. The ELVDD ripple calculation circuit 410, memory 420, and compensation circuit 440 of FIG. 8A have been described with reference to FIG. 4, and redundant description will be omitted.

The amount of ripple generated (or the amount of crosstalk generated) of the driving voltage may be proportional to the vertical distance of pixels arranged on the display panel. However, embodiments according to the present disclosure are not limited thereto.

Referring to FIG. 8A , the compensation voltage (CV) calculation circuit 430 may include a distance weighting module 433. The distance weight module 433 may select a distance weight corresponding to the vertical distance of the target pixel from among a plurality of weights stored in the memory 420. The distance weight is 'in Equation 1 of FIG. 4 described above. ' can be responded to. For example, the distance weight may be selected to have a large value proportional to the vertical distance from the display driving circuit to the corresponding pixel, but is not limited to this.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage (CV) based on Equation 9. ) can be created.

[Equation 9]

here, means the amount of change in the data voltage value on the target line, may mean a distance weight coefficient for the corresponding pixel applied by the distance weight module 433.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated by applying at least one weight of Equation 1 described above.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' can be substituted into Equation 1 described above to generate a compensation voltage.

The display driving circuit according to an embodiment of the present disclosure and a display device or display system including the same may adaptively generate a compensation voltage by applying a weight corresponding to the distance from the display driving circuit to the pixel.

FIG. 8B is a diagram for explaining an operation of generating a compensation voltage according to distance information according to an exemplary embodiment of the present disclosure.

Referring to FIG. 8B, the horizontal axis represents the vertical distance from the display driver IC (DDI) to the corresponding pixel, and the vertical axis may represent the crosstalk occurrence rate.

As shown in FIG. 8B, it can be seen that the occurrence rate of crosstalk increases as the vertical distance from the display driving circuit (DDI) to the corresponding pixel increases. For example, if the first pixel is a pixel located close to the DDI (Near IC) and the second pixel is a pixel located far from the DDI (Far IC), the amount of crosstalk occurring in the image data of the second pixel is the first pixel. It may be relatively large compared to the amount of crosstalk occurring in pixel image data.

8B is explained on the assumption that the crosstalk occurrence rate increases as the vertical distance from the display driving circuit (DDI) to the corresponding pixel increases, but the embodiment according to the present disclosure is not limited thereto.

Figure 9A is a block diagram showing an example of a compensation control circuit according to an exemplary embodiment of the present disclosure.

In detail, the compensation control circuit 111 of FIG. 4 applies a weight according to the stabilization period in which the driving voltage (ELVDD) of the peripheral line is affected by the ripple of the driving voltage (ELVDD) generated in the target line. This is a diagram to explain the operation of generating a compensation voltage. The ELVDD ripple calculation circuit 410, memory 420, and compensation circuit 440 of FIG. 8A have been described with reference to FIG. 4, and redundant description will be omitted.

Ripple occurrence (or crosstalk) of the driving voltage (ELVDD) in the target line of the display panel may also affect the driving voltage (ELVDD) of the surrounding lines during the stabilization period of the target line. As the distance from the target line to the surrounding line becomes shorter, the amount of ripple (or amount of crosstalk) generated in the driving voltage (ELVDD) in the surrounding line may increase, but is not limited to this. For example, an embodiment of the present disclosure may include a case where the shorter the distance from the target line to the peripheral line, the smaller the amount of ripple (or the amount of crosstalk) of the driving voltage ELVDD in the peripheral line. Another embodiment of the present disclosure may include a case in which the amount of ripple (or amount of crosstalk) generated in the driving voltage ELVDD in the peripheral line increases or decreases as the distance from the target line to the peripheral line increases.

In this specification, a peripheral line may mean at least one adjacent pixel line arranged continuously from the target line in a display panel.

Referring to FIG. 9A , the compensation voltage (CV) calculation circuit 430 may include a stabilization weight module 434. The stabilization weight module 434 performs stabilization based on at least one of the characteristic information of the display panel (e.g., characteristic information for each line of the display panel) or the operating environment information of the display driving circuit among the plurality of weights stored in the memory 420. You can select weights. The stabilization weight is expressed in Equation 1 of FIG. 4 described above. ' can be responded to. For example, the stabilization weight may be selected as a large value in proportion to the distance from the target line to the surrounding lines, but is not limited to this.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage based on the stabilization period of the driving voltage of the target line after the first ripple of the driving voltage occurs in the target line of the display panel. can be created. For example, when a second ripple occurs in a line surrounding the target line during the stabilization period, the compensation voltage (CV) calculation circuit 430 may select a stabilization weight corresponding to the surrounding line from among a plurality of weights. Here, the second ripple of the peripheral line may mean a ripple generated due to the first ripple of the target line.

The compensation voltage (CV) calculation circuit 430 may generate a compensation voltage for the peripheral line by applying the stabilization weight to the compensation voltage for the peripheral line. The compensation voltage (CV) calculation circuit 430 may generate a final compensation voltage based on the compensation voltage for the peripheral line and the compensation voltage for the target line. For example, the compensation voltage (CV) calculation circuit 430 may generate a final compensation voltage by adding the compensation voltage for the target line to the compensation voltage for the peripheral lines.

In one embodiment, the compensation voltage (CV) calculation circuit 430 may generate the final compensation voltage based on Equation 10 and Equation 11. For example, the compensation voltage (CV) calculation circuit 430 may calculate the total compensation voltage in the even channel of the display panel based on Equation 10. For example, the compensation voltage (CV) calculation circuit 430 may calculate the total compensation voltage in the odd channel of the display panel based on Equation 11. For example, the compensation voltage (CV) calculation circuit 430 may generate a final compensation voltage based on the total compensation voltage in even channels and the total compensation voltage in odd channels of the display panel. .

[Equation 10]

here, ' ' means the total compensation voltage in the even channel of the display panel, ' ' means the compensation voltage for the target line (nth line), ' ' means the compensation voltage for the first peripheral line (n-1th line), ' ' means the compensation voltage for the second peripheral line (n-2th line), ' ' may mean the compensation voltage for the third peripheral line (n-3th line). ' ' means the stabilization weight coefficient for the first peripheral line (n-1th line), ' ' means the stabilization weight coefficient for the second peripheral line (n-2th line), ' ' may mean the stabilization weight coefficient for the third peripheral line (n-3th line). In Equation 10, for convenience of explanation, an embodiment in which compensation is performed up to the third peripheral line (n-3th line) is described, but the present invention is not limited thereto, and calculation of compensation voltage (CV) according to an embodiment of the present disclosure The circuit 430 may perform compensation up to the nmth peripheral line ((nm)th line, (nm)≥1) according to various factors of the stabilization period.

[Equation 11]

here, ' ' means the total compensation voltage in the even channel of the display panel, ' ' means the compensation voltage for the target line (nth line), ' ' means the compensation voltage for the first peripheral line (n-1th line), ' ' means the compensation voltage for the second peripheral line (n-2th line), ' ' may mean the compensation voltage for the third peripheral line (n-3th line). ' ' means the stabilization weight coefficient for the first peripheral line (n-1th line), ' ' means the stabilization weight coefficient for the second peripheral line (n-2th line), ' ' may mean the stabilization weight coefficient for the third peripheral line (n-3th line).

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates the compensation voltage (CV) based on Equation 12. ) can be created.

[Equation 12]

here, means the amount of change in the data voltage value on the target line, may mean a stabilization weight coefficient applied by the stabilization weight module 434.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' A compensation voltage can be generated by applying at least one weight of Equation 1 described above.

In one embodiment, the compensation voltage (CV) calculation circuit 430 calculates ' ' can be substituted into Equation 1 described above to generate a compensation voltage.

FIG. 9B is a diagram for explaining an operation of generating a compensation voltage according to a stabilization period according to an exemplary embodiment of the present disclosure.

Referring to FIG. 9b, the ripple of the driving voltage (ELVDD) generated on the nth line (e.g., target line) of the display panel is connected to the surrounding lines: n+1th line, n+2th line, n+3th line, It can be seen that it also affects the driving voltage (ELVDD) of the n+4th line.

If the amount of ripple generated in the driving voltage (ELVDD) generated in the nth line (e.g. target line) is 'a', the amount of ripple generated in the driving voltage (ELVDD) generated in the n+1th line, which is the surrounding line, is 'a'. b', the ripple generation amount of the driving voltage (ELVDD) generated in the n+2-th line may be 'c', and the ripple generation amount of the driving voltage (ELVDD) generated in the n+3-th line may be 'd'. For example, if the amount of ripple generated in the driving voltage (ELVDD) generated in the nth line (e.g. target line) is '69', this causes the driving voltage (ELVDD) generated in the n+1th line, which is a peripheral line, to be '69'. The ripple generation amount is '28', the ripple generation amount of the driving voltage (ELVDD) generated in the n+2th line is '11', and the ripple generation amount of the driving voltage (ELVDD) generated in the n+3th line is '4'. It can be.

Therefore, the embodiment of the present disclosure generates a compensation voltage by considering the ripple (or crosstalk) of the driving voltage (ELVDD) of the peripheral line caused by the ripple (or crosstalk) of the driving voltage (ELVDD) on the target line. A display driving circuit and a display device or display system including the same can be provided.

FIG. 9C is a diagram for explaining an operation of generating a compensation voltage according to a stabilization period according to an exemplary embodiment of the present disclosure.

In detail, a graph of the compensation voltage generated by applying the stabilization weight by the compensation voltage (CV) calculation circuit 430 of FIG. 9A is shown.

Referring to FIG. 9C, the horizontal axis may indicate the position of the surrounding lines relative to the target line (origin) in the display panel, and the vertical axis may indicate the compensation voltage.

The compensation voltage (CV) calculation circuit 430 according to an embodiment of the present disclosure may determine at least one of the characteristics of the display panel, the stabilization period of the ripple generated in the target line, or the position (or distance) from the target line to the surrounding line. Stabilization weight based on one ( ) can be determined.

In one embodiment, the compensation voltage (CV) calculation circuit 430 sets a stabilization weight ( ) can be applied to generate a relatively large compensation voltage. For example, the compensation voltage (CV) calculation circuit 430 sets a stabilization weight ( ) can be applied to generate a relatively small compensation voltage.

In Figure 9c, the closer the surrounding line is to the target line (origin), the larger the stabilization weight ( ), but is not limited thereto. For example, in the compensation voltage (CV) calculation circuit 430 according to an embodiment of the present disclosure, the peripheral lines located closer to the target line (origin) are more stable according to the characteristics of the display panel and the stabilization period of the ripple generated in the target line. Small-sized stabilization weights ( ) can be applied.

Figure 10 shows an implementation example of a display device according to an exemplary embodiment of the present disclosure.

The display device 1000 of FIG. 10 is a device equipped with a small display panel 1200 and can be applied to mobile devices such as smartphones and tablet PCs, for example.

Referring to FIG. 10 , the display device 1000 may include a display driving circuit 1100 and a display panel 1200. The display driving circuit 1100 may be composed of one or more ICs and is mounted on a circuit film such as TCP (Tape Carrier Package), COF (Chip On Film), FPC (Flexible Print Circuit), and TAB (Tape Automatic Bonding). It may be attached to the display panel 1200 using a COG (Chip On Glass) method or mounted on a non-display area (eg, an area where an image is not displayed) of the display panel 1200 using a COG (Chip On Glass) method.

The display driving circuit 1100 may include a data driver 1110 and control logic 1120, and may further include a gate driver. In an embodiment, the gate driver may be mounted on the display panel 1200.

Figure 11 shows an implementation example of a display device according to an exemplary embodiment of the present disclosure.

The display device of FIG. 11 is a device equipped with a medium-to-large display panel 2200 and can be applied to, for example, televisions, monitors, etc.

Referring to FIG. 11 , the display device 2000 may include a data driver 2110, a timing controller 2120, a gate driver 2130, and a display panel 1200.

Timing controller 2120 may be comprised of one or more ICs or modules. The timing controller 2120 may communicate with a plurality of data driving ICs (DDIC) and a plurality of gate driving ICs (GDIC) through a set interface.

The timing controller 2120 generates control signals that control the driving timing of a plurality of data driving ICs (DDIC) and a plurality of gate driving ICs (GDIC), and sends control signals to a plurality of data driving ICs (DDIC) and a plurality of gates. It can be provided to the driver IC (GDIC).

The timing controller 2120 generates and provides control signals to compensate for image data (or data voltage) using a compensation voltage to which at least one compensation data is applied according to the characteristics of the display panel and/or the cause of crosstalk. can do. Here, the at least one compensation data includes compensation data for the change in image data (or data voltage) and/or characteristics of the display panel, compensation data for OPR (on pixel ratio), and compensation data for the distance from the display driving circuit. , may include compensation data for stabilization of the driving voltage.

The data driver 2110 includes a plurality of data driving ICs (DDIC), and the plurality of data driving ICs (DDIC) are mounted on a circuit film such as TCP, COF, FPC, etc., and are attached to the display panel 2200 using a TAB method. Alternatively, it may be mounted on the non-display area of the display panel 2200 using a COG method.

The gate driver 2130 includes a plurality of gate driving ICs (GDIC), and the plurality of gate driving ICs (GDIC) are mounted on a circuit film and attached to the display panel 2200 in a TAB method, or by a COG method on the display panel ( 2200) can be mounted on the non-display area. Alternatively, the gate driver 2130 may be formed directly on the lower substrate of the display panel 2200 using a gate-driver in panel (GIP) method. The gate driver 2130 is formed in a non-display area outside the pixel array where subpixels (PX) are formed in the display panel 2200, and may be formed using the same TFT process as the subpixels.

As above, exemplary embodiments have been disclosed in the drawings and specification. Although embodiments have been described in this specification using specific terms, this is only used for the purpose of explaining the technical idea of the present disclosure and is not used to limit the meaning or scope of the present disclosure as set forth in the claims. . Therefore, those skilled in the art will understand that various modifications and other equivalent embodiments are possible therefrom. Therefore, the true technical protection scope of the present disclosure should be determined by the technical spirit of the attached patent claims.

Claims (20)

In a display driving circuit electrically connected to a display panel including a plurality of pixels:
a compensation control circuit that generates a compensation voltage based on input image data and information on the display panel, and performs compensation for the data voltage of the input image data based on the compensation voltage; and
A display driving circuit comprising a timing control circuit that outputs the compensated data voltage to the plurality of pixels.
In claim 1,
The compensation control circuit is,
Selecting a data change weight based on the amount of change in data voltage of the input image data and the structure of the display panel,
A display driving circuit configured to generate the compensation voltage by applying the data change weight.
In claim 2,
The information on the display panel is,
A display driving circuit comprising structure information of a data line driven in the display panel or MUX (multiplexer) structure information.
In claim 3,
The structure information of the data line is,
Contains information about the structure selected from a single data line (SDL) structure or a dual data line (DDL) structure,
The MUX structure information is,
Containing information about the MUX structure selected from a no-MUX structure, a two-MUX structure, or a 4:1 MUX structure.
A display driving circuit comprising:
In claim 1,
The compensation control circuit is,
Measure a vertical distance from the display driving circuit to each pixel of the plurality of pixels,
A display driving circuit further configured to generate a compensation voltage in each pixel of the plurality of pixels based on the measured vertical distance.
In a display driving circuit electrically connected to a display panel in which a plurality of pixels are arranged in a plurality of lines:
After the first ripple of the driving voltage occurs in the target line of the display panel, a compensation voltage is generated based on the stabilization period of the driving voltage of the target line, and input based on the compensation voltage. a compensation control circuit that performs compensation for the data voltage of the image data; and
A display driving circuit comprising a timing control circuit that outputs the compensated data voltage to the plurality of pixels.
In claim 6,
The compensation control circuit is,
If a second ripple occurs in a line surrounding the target line during the stabilization period, select a stabilization weight corresponding to the line surrounding the target line from among a plurality of weights,
Applying the stabilization weight to the compensation voltage for the peripheral line,
A display driving circuit further configured to generate a final compensation voltage based on the compensation voltage for the peripheral line to which the stabilization weight is applied and the compensation voltage for the target line.
In claim 7,
The stabilization weight is,
A display driving circuit, characterized in that the calculation is based on at least one of line-specific characteristic information of the display panel or operating environment information of the display driving circuit.
In claim 7,
The second ripple of the peripheral line is,
Occurred due to the first ripple of the target line,
The surrounding lines are,
A display driving circuit, characterized in that it refers to at least one adjacent line arranged continuously from the target line in the display panel.
In claim 6,
The compensation control circuit is,
Measure a vertical distance from the display driving circuit to each pixel of the plurality of pixels,
A display driving circuit further configured to generate a compensation voltage in each pixel of the plurality of pixels based on the measured vertical distance.
In a display driving circuit electrically connected to a display panel in which a plurality of pixels are arranged in a plurality of lines:
a compensation control circuit that generates a compensation voltage based on an on pixel ratio (OPR) of a previous line compared to a target line of the display panel, and performs compensation for a data voltage of input image data based on the compensation voltage; and
A display driving circuit comprising a timing control circuit that outputs the compensated data voltage to the plurality of pixels.
In claim 11,
The OPR is,
It is determined based on at least one of the average data value of the previous line, the average data value of the target line, or the difference between the average data value of the previous line and the average data value of the target line,
A display driving circuit, wherein the data average value refers to the average value of data voltage or gray level for each line.
In claim 11,
The compensation control circuit is,
Selecting an OPR weight corresponding to the OPR from among a plurality of weights,
A display driving circuit further configured to generate the compensation voltage based on a value obtained by applying the OPR weight corresponding to the OPR to the change in data voltage of the target line compared to the previous line.
In claim 11,
The compensation control circuit is,
Measure a vertical distance from the display driving circuit to each pixel of the plurality of pixels,
A display driving circuit further configured to generate a compensation voltage in each pixel of the plurality of pixels based on the measured vertical distance.
For display devices:
A display panel in which a plurality of pixels are arranged in a plurality of lines; and
Receive input image data from a host processor, generate a compensation voltage based on at least one of first compensation data, second compensation data, third compensation data, and fourth compensation data, and generate the input image data based on the compensation voltage. Configured to include a display driving circuit that performs compensation for a data voltage of image data and outputs the compensated data voltage to the plurality of pixels,
The first compensation data is generated based on the amount of change in data voltage of the input image data and information on the display panel,
The second compensation data is generated based on a stabilization period of the driving voltage of the target line after the first ripple of the driving voltage occurs in the target line of the display panel,
The third compensation data is generated based on the OPR (on pixel ratio) of the previous line compared to the target line, and
The fourth compensation data is generated based on a vertical distance from the display driving circuit to each pixel of the plurality of pixels.
In claim 15,
The information on the display panel of the first compensation data is,
A display device characterized in that it refers to structure information of a data line or MUX (multiplexer) structure information driven in the display panel.
In claim 16,
The structure information of the data line is,
Contains information about the selected structure, either a single data line (SDL) structure or a dual data line (DDL) structure,
The MUX structure information is,
A display device comprising information on a MUX structure selected from a no-MUX structure, a two-MUX structure, or a 4:1 MUX structure.
In claim 15,
The display driving circuit is,
If a second ripple occurs in a line surrounding the target line during the stabilization period, select a stabilization weight corresponding to the line surrounding the target line from among a plurality of weights,
Applying the stabilization weight to the compensation voltage for the peripheral line,
further configured to generate a final compensation voltage based on the compensation voltage for the peripheral line to which the stabilization weight is applied and the compensation voltage for the target line,
A display device, characterized in that the second ripple of the peripheral line is generated due to the first ripple of the target line.
In claim 15,
The OPR of the third compensation data is,
It is determined based on at least one of the average data value of the previous line, the average data value of the target line, or the difference between the average data value of the previous line and the average data value of the target line,
A display device, characterized in that the data average value refers to the average value of data voltage or gray level for each line.
In claim 15,
The display driving circuit is,
Selecting an OPR weight corresponding to the OPR from among a plurality of weights,
The display device is further configured to generate the compensation voltage based on a value obtained by applying the OPR weight corresponding to the OPR to the change in data voltage of the target line compared to the previous line.

Images