KR20240074611A - Method and electronic device for manufacturing storage device - Google Patents

Abstract

According to various embodiments, a storage device includes a first memory including a first storage space in which a first bit of data is stored and a second storage space in which a second bit or more of data other than the first bit is stored. It may include a second memory in which information is stored, and a memory controller operatively connected to the first memory and the second memory. The memory controller may check whether the storage device supports the PSA interface based on the status information stored in the second memory. The memory controller may change the state information to the first state in response to confirmation of support of the PSA interface. In response to the status information being in the first state, the memory controller may store data downloaded from the external electronic device in the first storage space of the first memory. The memory controller may change the state information to the second state in response to completion of the process corresponding to the downloaded data. The memory controller may migrate data stored in the first storage space to the second storage space in response to the state information being in the second state. Various other embodiments may be possible.

Description

Manufacturing method and electronic device of storage device {METHOD AND ELECTRONIC DEVICE FOR MANUFACTURING STORAGE DEVICE}

Various embodiments relate to methods of manufacturing storage devices and electronic devices.

Recently, thanks to remarkable developments in information and communication technology and semiconductor technology, the spread and use of electronic devices (e.g. portable terminal devices, smartphones) are rapidly increasing and have become a necessity for modern people. Electronic devices provide various functions required by users (e.g., mobile communication function, short-range wireless communication function, broadcast reception function, Internet access function).

Electronic devices may include a storage device (eg, NAND flash memory) for storing data. For example, storage devices can be classified into eMMC (embedded multimedia card), UFS (Universal Flash Storage), and SSD (Solid State Drive) devices according to the interface protocol between the host and NAND Flash memory. In the process of manufacturing an electronic device, data (e.g., S/W binary) for operating the electronic device may be stored in a storage device.

The above information may be provided as background technology for the purpose of aiding understanding of the present disclosure. No claim or determination is made as to whether any of the foregoing may apply as prior art with respect to the present disclosure.

Typically, in the process of manufacturing an electronic device, a process that generates heat may be included. For example, heat may be generated during a manufacturing process (e.g., Surface Mount Device (SMD)) in which storage devices and other devices (e.g., components) are mounted on a printed circuit board (PCB). For example, due to a situation in which the manufacturing process is changed and a defect occurs in the manufacturing process, rework may occur, and heat may be generated during rework.

In the manufacturing process of electronic devices, if heat is generated, data stored in the storage device may be damaged or bad blocks (eg, runtime bad blocks) may increase. As a result, the performance of the electronic device may deteriorate or the electronic device may malfunction.

According to one embodiment, the electronic device may utilize manufacturing process information (e.g., manufacturing process) to transmit control information related to the storage device to the storage device, and under the control of the storage device controller, the manufacturing process process in which heat is generated. You can prevent damage to data stored on the storage device.

Various embodiments of the present disclosure seek to provide an electronic device to prevent data stored in a storage device from being lost due to heat generated during a manufacturing process.

The technical challenges sought to be achieved in this document are not limited to the technical challenges mentioned above, and other technical challenges not mentioned can be clearly understood by those skilled in the art of this document from the description below. There will be.

According to one embodiment, the storage device includes a first memory including a first storage space in which a first bit of data is stored and a second storage space in which a second or more bit of data other than the first bit is stored. It may include a second memory in which information is stored, and a memory controller operatively connected to the first memory and the second memory. The memory controller may check whether the storage device supports a product state awareness (PSA) interface based on the state information stored in the second memory. The memory controller may change the state information to the first state in response to confirmation of support of the PSA interface. In response to the status information being in the first state, the memory controller may store data downloaded from the external electronic device in the first storage space of the first memory. The memory controller may change the state information to the second state in response to completion of the process corresponding to the downloaded data. The memory controller may migrate data stored in the first storage space to the second storage space in response to the state information being in the second state.

In a method of operating a storage device according to an embodiment, a first storage space 231 in which a first bit of data is stored and a second storage space 232 in which data of a second or more bit, rather than the first bit, is stored. An operation of checking whether the storage device 220 supports the PSA interface based on the state information stored in the second memory of the first memory 230 and the second memory in which the state information is stored, the operation of the PSA interface An operation of changing state information to a first state upon confirmation of support, and in response to the state information being in a first state, storing data downloaded from an external electronic device in the first storage space 231 of the first memory 230. An operation, in response to completion of a process corresponding to the downloaded data, changing the state information to a second state, and in response to the state information being in the second state, storing the data stored in the first storage space 231. An operation of migrating to the second storage space 232 may be included.

According to one embodiment, a non-transitory computer-readable storage medium (or computer program product) storing one or more programs may be described. According to one embodiment, when one or more programs are executed by a processor of an electronic device, a first storage space 231 in which a first bit of data is stored and a first storage space 231 in which second or more bits of data, rather than the first bit, are stored. Based on the state information stored in the second memory of the first memory 230 including the second storage space 232 and the second memory in which the state information is stored, whether the storage device 220 supports the PSA interface An operation of confirming, an operation of changing status information to a first state upon confirmation of support of the PSA interface, and in response to the status information being in the first state, first storing data downloaded from an external electronic device in the first memory 230. An operation of storing in the space 231, in response to completion of a process process corresponding to the downloaded data, an operation of changing the state information to a second state, and in response to the state information being in the second state, the first storage space. It may include instructions for migrating data stored in 231 to the second storage space 232 .

According to one embodiment, the electronic device can provide information related to the manufacturing process to the storage device and prevent data damage due to heat under the control of the storage device controller. For example, the storage device controller may move data to a heat-resistant storage space before performing a process that generates heat.

According to one embodiment, in order to prevent data damage due to heat, by moving data to a heat-resistant storage space, data writing performance can be improved and the defect rate due to the manufacturing process can be reduced. According to one embodiment, productivity associated with electronic devices and storage devices may increase.

The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by those skilled in the art from the description below. will be.

In relation to the description of the drawings, identical or similar reference numerals may be used for identical or similar components.
1 is a block diagram of an electronic device in a network environment according to embodiments of the present disclosure.
Figure 2 is a block diagram of a processor and a storage device included in an electronic device according to an embodiment of the present disclosure.
FIG. 3 is a first flowchart illustrating a method of migrating data based on status information of an electronic device according to an embodiment of the present disclosure.
FIG. 4 is a second flowchart illustrating a method of migrating data based on status information of an electronic device according to an embodiment of the present disclosure.
FIG. 5 is an exemplary diagram illustrating a process for migrating data based on status information of an electronic device according to an embodiment of the present disclosure.
FIG. 6 is a first flowchart illustrating a method of migrating data based on the write booster function according to an embodiment of the present disclosure.
FIG. 7 is a second flowchart illustrating a method of migrating data based on the write booster function according to an embodiment of the present disclosure.
Figure 8 is an example diagram illustrating a process for migrating data based on the write booster function according to an embodiment of the present disclosure.

1 is a block diagram of an electronic device 101 in a network environment 100, according to various embodiments. Referring to FIG. 1, in the network environment 100, the electronic device 101 communicates with the electronic device 102 through a first network 198 (e.g., a short-range wireless communication network) or a second network 199. It is possible to communicate with at least one of the electronic device 104 or the server 108 through (e.g., a long-distance wireless communication network). According to one embodiment, the electronic device 101 may communicate with the electronic device 104 through the server 108. According to one embodiment, the electronic device 101 includes a processor 120, a memory 130, an input module 150, an audio output module 155, a display module 160, an audio module 170, and a sensor module ( 176), interface 177, connection terminal 178, haptic module 179, camera module 180, power management module 188, battery 189, communication module 190, subscriber identification module 196 , or may include an antenna module 197. In some embodiments, at least one of these components (eg, the connection terminal 178) may be omitted or one or more other components may be added to the electronic device 101. In some embodiments, some of these components (e.g., sensor module 176, camera module 180, or antenna module 197) are integrated into one component (e.g., display module 160). It can be.

The processor 120, for example, executes software (e.g., program 140) to operate at least one other component (e.g., hardware or software component) of the electronic device 101 connected to the processor 120. It can be controlled and various data processing or calculations can be performed. According to one embodiment, as at least part of data processing or computation, the processor 120 stores commands or data received from another component (e.g., sensor module 176 or communication module 190) in volatile memory 132. The commands or data stored in the volatile memory 132 can be processed, and the resulting data can be stored in the non-volatile memory 134. According to one embodiment, the processor 120 includes a main processor 121 (e.g., a central processing unit or an application processor) or an auxiliary processor 123 that can operate independently or together (e.g., a graphics processing unit, a neural network processing unit ( It may include a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device 101 includes a main processor 121 and a secondary processor 123, the secondary processor 123 may be set to use lower power than the main processor 121 or be specialized for a designated function. You can. The auxiliary processor 123 may be implemented separately from the main processor 121 or as part of it.

The auxiliary processor 123 may, for example, act on behalf of the main processor 121 while the main processor 121 is in an inactive (e.g., sleep) state, or while the main processor 121 is in an active (e.g., application execution) state. ), together with the main processor 121, at least one of the components of the electronic device 101 (e.g., the display module 160, the sensor module 176, or the communication module 190) At least some of the functions or states related to can be controlled. According to one embodiment, the auxiliary processor 123 (e.g., image signal processor (image signal processor) or communication processor (CP)) is connected to other functionally related components (e.g., camera module 180 or communication module According to one embodiment, the auxiliary processor 123 (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. This learning may be generated through machine learning, for example, may be performed in the electronic device 101 itself where the artificial intelligence model is performed, or may be performed through a separate server (e.g., server 108). Learning algorithms may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning. The artificial intelligence model may include a plurality of artificial neural network layers, such as a deep neural network (DNN), a convolutional neural network (CNN), or a recurrent neural network (RNN). It may be one of a restricted boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is limited to the examples described above. In addition to hardware structures, artificial intelligence models may additionally or alternatively include software structures.

The memory 130 may store various data used by at least one component (eg, the processor 120 or the sensor module 176) of the electronic device 101. Data may include, for example, input data or output data for software (e.g., program 140) and instructions related thereto. Memory 130 may include volatile memory 132 or non-volatile memory 134.

The program 140 may be stored as software in the memory 130 and may include, for example, an operating system 142, middleware 144, or application 146.

The input module 150 may receive commands or data to be used in a component of the electronic device 101 (e.g., the processor 120) from outside the electronic device 101 (e.g., a user). The input module 150 may include, for example, a microphone, mouse, keyboard, keys (eg, buttons), or digital pen (eg, stylus pen).

The sound output module 155 may output sound signals to the outside of the electronic device 101. The sound output module 155 may include, for example, a speaker or a receiver. Speakers can be used for general purposes such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part of it.

The display module 160 can visually provide information to the outside of the electronic device 101 (eg, a user). The display module 160 may include, for example, a display, a hologram device, or a projector, and a control circuit for controlling the device. According to one embodiment, the display module 160 may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of force generated by the touch.

The audio module 170 can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module 170 acquires sound through the input module 150, the sound output module 155, or an external electronic device (e.g., directly or wirelessly connected to the electronic device 101). Sound may be output through the electronic device 102 (e.g., speaker or headphone).

The sensor module 176 detects the operating state (e.g., power or temperature) of the electronic device 101 or the external environmental state (e.g., user state) and generates an electrical signal or data value corresponding to the detected state. can do. According to one embodiment, the sensor module 176 includes, for example, a gesture sensor, a gyro sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, It may include a temperature sensor, humidity sensor, or light sensor.

The interface 177 may support one or more designated protocols that can be used to connect the electronic device 101 directly or wirelessly with an external electronic device (eg, the electronic device 102). According to one embodiment, the interface 177 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

The connection terminal 178 may include a connector through which the electronic device 101 can be physically connected to an external electronic device (eg, the electronic device 102). According to one embodiment, the connection terminal 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).

The haptic module 179 can convert electrical signals into mechanical stimulation (e.g., vibration or movement) or electrical stimulation that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

The camera module 180 can capture still images and moving images. According to one embodiment, the camera module 180 may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module 188 can manage power supplied to the electronic device 101. According to one embodiment, the power management module 188 may be implemented as at least a part of, for example, a power management integrated circuit (PMIC).

The battery 189 may supply power to at least one component of the electronic device 101. According to one embodiment, the battery 189 may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

Communication module 190 is configured to provide a direct (e.g., wired) communication channel or wireless communication channel between electronic device 101 and an external electronic device (e.g., electronic device 102, electronic device 104, or server 108). It can support establishment and communication through established communication channels. The communication module 190 operates independently of the processor 120 (e.g., an application processor) and may include one or more communication processors (CPs) that support direct (e.g., wired) communication or wireless communication. . According to one embodiment, the communication module 190 may be a wireless communication module 192 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (e.g., : LAN (local area network) communication module, or power line communication module) may be included. Among these communication modules, the corresponding communication module is a first network 198 (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network 199 (e.g., legacy It may communicate with an external electronic device 104 through a telecommunication network such as a cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., LAN or WAN). These various types of communication modules may be integrated into one component (e.g., a single chip) or may be implemented as a plurality of separate components (e.g., multiple chips). The wireless communication module 192 uses subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module 196 within a communication network such as the first network 198 or the second network 199. The electronic device 101 can be confirmed or authenticated.

The wireless communication module 192 may support 5G networks after 4G networks and next-generation communication technologies, for example, NR access technology (new radio access technology). NR access technology provides high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and access to multiple terminals (massive machine type communications (mMTC)), or ultra-reliable and low-latency (URLLC). -latency communications)) can be supported. The wireless communication module 192 may support high frequency bands (eg, mmWave bands), for example, to achieve high data rates. The wireless communication module 192 uses various technologies to secure performance in high frequency bands, for example, beamforming, massive array multiple-input and multiple-output (MIMO), and full-dimensional multiplexing. It can support technologies such as input/output (FD-MIMO: full dimensional MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module 192 may support various requirements specified in the electronic device 101, an external electronic device (e.g., electronic device 104), or a network system (e.g., second network 199). According to one embodiment, the wireless communication module 192 supports Peak data rate (e.g., 20 Gbps or more) for realizing eMBB, loss coverage (e.g., 164 dB or less) for realizing mmTC, or U-plane latency (e.g., 164 dB or less) for realizing URLLC. Example: Downlink (DL) and uplink (UL) each of 0.5 ms or less, or round trip 1 ms or less) can be supported.

The antenna module 197 may transmit or receive signals or power to or from the outside (eg, an external electronic device). According to one embodiment, the antenna module 197 may include an antenna including a radiator made of a conductor or a conductive pattern formed on a substrate (eg, PCB). According to one embodiment, the antenna module 197 may include a plurality of antennas (eg, an array antenna, a first antenna, and a second antenna). For example, the first antenna may generate a first antenna signal according to a first direction based on a linear polarization method, and the second antenna may generate a first antenna signal different from the first direction based on a linear polarization method. A second antenna signal according to two directions can be generated. For example, the first antenna signal and the second antenna signal may be implemented in directions perpendicular to each other. If the first antenna signal is a communication signal along the x-axis direction, the second antenna signal may include a communication signal along the y-axis direction.

According to one embodiment, at least one antenna suitable for a communication method used in a communication network such as the first network 198 or the second network 199, for example, is connected to the plurality of antennas by the communication module 190. Can be selected from antennas. Signals or power may be transmitted or received between the communication module 190 and an external electronic device through the at least one selected antenna. According to some embodiments, in addition to the radiator, other components (eg, radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module 197.

According to various embodiments, the antenna module 197 may form a mmWave antenna module. According to one embodiment, a mmWave antenna module includes: a printed circuit board, an RFIC disposed on or adjacent to a first side (e.g., bottom side) of the printed circuit board and capable of supporting a designated high frequency band (e.g., mmWave band); And a plurality of antennas (e.g., array antennas) disposed on or adjacent to the second side (e.g., top or side) of the printed circuit board and capable of transmitting or receiving signals in the designated high frequency band. can do.

At least some of the components are connected to each other through a communication method between peripheral devices (e.g., bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)) and signal ( (e.g. commands or data) can be exchanged with each other.

According to one embodiment, commands or data may be transmitted or received between the electronic device 101 and the external electronic device 104 through the server 108 connected to the second network 199. Each of the external electronic devices 102 or 104 may be of the same or different type as the electronic device 101. According to one embodiment, all or part of the operations performed in the electronic device 101 may be executed in one or more of the external electronic devices 102, 104, or 108. For example, when the electronic device 101 must perform a certain function or service automatically or in response to a request from a user or another device, the electronic device 101 may perform the function or service instead of executing the function or service on its own. Alternatively, or additionally, one or more external electronic devices may be requested to perform at least part of the function or service. One or more external electronic devices that have received the request may execute at least part of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device 101. The electronic device 101 may process the result as is or additionally and provide it as at least part of a response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology can be used. The electronic device 101 may provide an ultra-low latency service using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device 104 may include an Internet of Things (IoT) device. Server 108 may be an intelligent server using machine learning and/or neural networks. According to one embodiment, the external electronic device 104 or server 108 may be included in the second network 199. The electronic device 101 may be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

Figure 2 is a block diagram of a processor and a storage device included in an electronic device according to an embodiment of the present disclosure.

According to some embodiments, the electronic device 201 of FIG. 2 may be at least partially similar to the electronic device 101 of FIG. 1 or may include other embodiments of the electronic device 210. The processor 210 of FIG. 2 may be at least partially similar to the processor 120 of FIG. 1 or may include other embodiments of the processor 210. The storage device 220 of FIG. 2 may be at least partially similar to the memory 130 of FIG. 1 or may include other embodiments of the storage device 220 .

Referring to FIG. 2, the electronic device 201 (e.g., the electronic device 101 of FIG. 1) includes a dynamic random access memory (DRAM) 205 (e.g., a temporary storage device) and a processor 210 (e.g., AP). It may include an application processor, a host, and a storage device (universal flash storage (UFS)) 220. The processor 210 may utilize data (eg, binary data) stored in the DRAM 205 and the storage device 220.

According to one embodiment, the processor 210 may load data stored in the DRAM 205 and the storage device 220, or may store data in the storage device 220. The processor 210 may at least partially control other components (eg, hardware and/or software components) included in the electronic device 101 and may perform various data processing and/or calculations. According to one embodiment, the processor 210 may be operatively, functionally, and/or electrically connected to the DRAM 205 and the storage device 220.

Referring to FIG. 2 , the processor 210 may be in the form of a system on chip (SOC) and may include a host controller 211 for controlling the storage device 220 . For example, the processor 210 may include a host device corresponding to each of the components included in the electronic device 101. Host controller 211 is responsive to the operative connection between processor 210 and DRAM 205 and storage device 220 to store data in DRAM 205 and storage device 220, or to store data in DRAM 205 ) and data stored in the storage device 220 can be loaded.

Referring to FIG. 2, the electronic device 101 includes a DRAM (DRAM) for storing at least one binary data (e.g., the first binary 212, the second binary 213, and/or the third binary 214). 205) (e.g., temporary storage device, temporary storage space, temporary storage area). For example, the first binary 212 may include an eDL binary, the second binary 213 may include a bootloader, and the third binary 214 may include a kernel binary. (kernel binary) may be included. At least one of the first binary 212, the second binary 213, and/or the third binary 214 is a host controller for initializing the storage device 220 and reading and writing data to the storage device 220. It may include a program that can operate (211). For example, in the process of booting the electronic device 101, the second binary 213 (e.g., bootloader) installs a third binary (e.g., kernel binary) before the operating system (OS) is executed. Based on this, it can include programs that perform boot-related tasks.

According to one embodiment, the first binary 212 (e.g., eDL binary) is a software binary (SW binary) downloaded from an external electronic device (e.g., the electronic devices 102 and 104 of FIG. 1, a personal computer (PC)). ) may include. The processor 120 may store the first binary 212 in a partial area of the DRAM 205. The processor 210 may download a software binary from an external electronic device connected through a connection terminal (e.g., the connection terminal 178 of FIG. 1, a USB interface), and store the software binary in the first binary 212 (DRAM). 205). The processor 210 may initialize the storage device 220 based on the downloaded software binary.

According to one embodiment, when the electronic device 101 boots, the processor 210 initializes the electronic device 101 based on the second binary 213 (e.g., bootloader) or the third binary 214. ) (e.g. kernel binary), you can perform tasks related to the operation of the operating system (OS).

Referring to FIG. 2, the storage device 220 may include a universal flash storage (UFS) 220 designed based on a high-speed serial communication protocol. Referring to FIG. 2, the storage device 220 includes a storage device controller 221 for at least partially controlling the storage device 220 and a NAND storage unit 230 for storing data. ) (e.g., single level cell (SLC) 231, multi level cell (MLC)/triple level cell (TLC)/quad level cell (QLC) 232).

According to one embodiment, the storage device control unit 221 may at least partially control and manage components included in the storage device 220. The storage device control unit 221 may process commands (eg, binary data) transmitted from the processor 210 and control operations related to the storage device 220 . For example, the storage device control unit 221 stores data (e.g., binary data, process binary) in the SLC 231 (e.g., first storage space) and MLC/TLC/QLC (232) (e.g., second storage space). ) can be saved, or the saved data can be loaded. For example, the storage device control unit 221 migrates data stored in the first storage space 231 to the second storage space 232, or migrates data stored in the second storage space 232 to the first storage space 232. It can be migrated to the storage space (231).

According to one embodiment, the first storage space 231 may include a single level cell (SLC) area of the NAND storage unit 230, and data can be read at a relatively faster speed than the second storage space 232. or it can be written. For example, the first storage space 231 consists of at least one cell and can store approximately 1 bit of data per cell. The first storage space 231 may be composed of a plurality of cells in which the first bit of data is stored. According to one embodiment, the second storage space 232 includes at least one of a multi level cell (MLC) area, a triple level cell (TLC) area, and a quad level cell (QLC) area of the NAND storage unit 230. Data can be read or written at a relatively slower speed than the first storage space 231. For example, if the second storage space 232 is an MLC area, about 2 bits of data can be stored per cell, and if the second storage space 232 is a TLC area, about 3 bits of data can be stored per cell. Data can be stored, and when the second storage space 232 is a QLC area, approximately 4 bits of data can be stored per cell. When the second storage space 232 is an MLC area, the second storage space 232 may be composed of a plurality of cells in which second bits of data are stored.

According to one embodiment, the NAND storage 230 may record or store data by applying a set amount of charge to the first storage space 231 and the second storage space 232. For example, the first storage space 231 stores approximately 1 bit of data per cell, so data of “0” or “1” may be stored based on one cell. For example, the NAND storage 230 may set a reference value (e.g., charge amount, approximately 5V) in response to the first storage space 231, and when a charge amount exceeding the reference value is applied, “0” Data of “1” can be stored, and when a charge amount less than the above reference value is applied, data of “1” can be stored. According to one embodiment, when heat is generated during the manufacturing process of the electronic device 201, the amount of charge applied to the first storage space 231 may be at least partially changed (e.g., increased or decreased), and 1 Data stored in the storage space 231 may have error values. For another example, when the second storage space 232 is an MLC area, about 2 bits of data are stored in the second storage space 232 per cell, so “00” based on one cell. One of “01”, “10”, and “11” data can be stored. For example, the storage device control unit 221 may set a plurality of reference values (e.g., a plurality of charge amounts, a first reference value (about 2.5V), a second reference value (about 5V), and a third reference value in response to the second storage space 232. A reference value (about 7.5V)) can be set, and the voltage within the range divided based on the reference value (e.g., about 2.5V or less, about 2.5V to about 5V, about 5V to about 7.5V, or more than about 7.5V) When the amount of charge is applied, one of the data “00”, “01”, “10”, and “11” can be stored. According to one embodiment, when heat is generated during the manufacturing process of the electronic device 201, the amount of charge applied to the second storage space 232 may be at least partially changed, and the amount of charge applied to the second storage space 232 may be at least partially changed. The saved data may have error values.

According to one embodiment, as the second storage space 232 has a relatively more detailed reference value set than the first storage space 231, a different amount of charge is applied due to temperature fluctuations, and an error value is stored. There may be a high possibility that it will happen. For example, if the second storage space 232 is a TLC area or a QLC area, the number of reference values may be relatively larger than the MLC, and the size of the range according to the reference value may also be relatively smaller than the MLC. As the storage capacity of the second storage space 232 increases, it may be more affected by temperature changes due to heat generation.

According to one embodiment, the second data stored in the second storage space 232 may be more likely to be damaged or modified by temperature changes than the first data stored in the first storage space 231. . According to one embodiment, the first data stored in the first storage space 231 may be relatively undamaged even if a process that generates heat is performed.

According to one embodiment, the processor 210 may provide process-related data (e.g., whether the process is in progress) to the storage device 220 from a binary downloaded from an external electronic device (e.g., a personal computer (PC)). . The storage device control unit 221 of the storage device 220 can check the process procedure based on process-related data and store write information generated during the performance of the process procedure in the first storage space 231. For example, data in the first storage space 231 may not be damaged due to heat generation. According to one embodiment, the electronic device 101 stores the write information in the first storage space 231, so that even if a process that generates heat is performed due to the process procedure, the write information stored in the first storage space 231 is stored in the electronic device 101. Damage can be prevented. According to one embodiment, the electronic device 101 can reduce the occurrence of bad blocks and improve writing performance of data.

According to one embodiment, the processor 210 may transmit process completion information to the storage device control unit 221 in response to a reboot operation after the process generating heat is terminated in the process procedure, and the storage device control unit ( 221) may perform an operation to migrate the write information stored in the first storage space 231 to the second storage space 232 in response to confirmation of the process completion information.

According to one embodiment, the electronic device 201 may perform a migration operation on data by utilizing a product state awareness (PSA) interface (e.g., state information). For example, the processor 210 of the electronic device 201 may transmit status information (e.g., PSA code, PSA data) about the electronic device to the storage device 220, and the storage device 220 may transmit the information on its own. Migration operations for data can be performed based on the received status information.

For example, the status information (eg, PSA interface) of the electronic device 101 may include the information shown in Table 1 below.

explanation Device descriptor eExtendedUFSFeature Production State Awareness
(PSA support or not) dPSAMaxDataSize PSA Maximum Data Size
(PSA maximum data size) Attribute bPSAState
(PSA status) 00h: OFF
01h: Pre-soldering
02h: Loading Complete
03h: Soldered bPSADataSize Size of PSA storage space

Referring to (Table 1), the processor 210 can check whether the storage device 220 supports the PSA interface based on “eExtendedUFSFeature” of the status information. The processor 210 may check the maximum size of the SLC (e.g., the first storage space 231) available in the storage device 220 based on “dPSAMaxDataSize” of the status information. The processor 210 may check the status of the electronic device 101 (e.g., progress status of the process) based on “bPSAState” of the status information. For example, the processor 210 may provide “bPSAState” to the storage device 220 under the control of the host controller 211, and the storage device 220 may provide the electronic device 101 based on “bPSAState”. You can check the progress of the related processes. For example, if “bPSAState” is 00h, the PSA interface may be in the OFF state (e.g., the state before performing the process), and if “bPSAState” is 01h, the PSA interface may be in the “Pre-soldering” state ( For example: a process may be in progress). If “bPSAState” is 02h, the PSA interface may be in the “Loading Complete” state (e.g., a process that generates heat during the process has been completed), and if “bPSAState” is 03h, the PSA interface may be in the “Soldered” state. (e.g., the migration operation may be completed). The processor 210 may check the size of the first storage space 231 (eg, SLC) based on “bPSADataSize” of the status information. According to one embodiment, the storage device control unit 221 of the storage device 220 may check status information (e.g., PSA interface) provided from the processor 210, and determine a preset process process based on the confirmed status information. can be performed.

According to one embodiment, the electronic device 101 may perform a provisioning operation to configure the storage area of the second storage space 232 within the storage device 220. For example, the provisioning operation may include setting the size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. According to one embodiment, the provisioning operation may be set in advance by the developer during the design process of the electronic device 101. The electronic device 101 may perform a preset provisioning operation in response to a command to perform a provisioning operation.

According to one embodiment, when the electronic device 101 performs a provisioning operation while supporting the PSA interface, state information related to the PSA interface (e.g., PSA-related field information of the PSA interface, “dPSAMaxDataSize”, “bPSAState”) , “bPSADataSize”) can all be initialized. The electronic device 101 may initialize all data (eg, error data) stored in the storage device 220 in response to the provisioning operation. For example, when performing a provisioning operation, if “bPSAState” is in the “Pre-soldering” state (e.g., a process in progress), the storage device 220 stores the data stored in the first storage space 231. can be confirmed, and the confirmed data can be set as “invalidate” data. For example, data set as “invalidate” data may be excluded from the migration target when performing a migration operation (e.g., migration from the first storage space 231 to the second storage space 232). After the provisioning operation, when write data exceeding the first storage space 231 occurs, the electronic device 101 may be set to store the excess write data in the second storage space 232. The electronic device 101 stores the first storage space so that the size of the first storage space 231 corresponds to at least 1/3 based on the total capacity of the storage device 220 (e.g., NAND storage unit 230). The size of the space 231 can be set. For example, no matter what size is used as the first storage space 231, there may be no change in the size of the total capacity of the storage device 220. The electronic device 101 has a size exceeding the total size (e.g., SLC size*3+TLC size) of the first storage space 231 (e.g., SLC) and the second storage space 232 (e.g., TLC). When a write request signal occurs, the write request signal may be set to be processed as an error signal.

According to one embodiment, the electronic device 101 may allow an “overwrite” function to the same address, reduce “bPSADataSize” by the “overwritten” capacity, and “invalidate” the “overwritten” data as “invalidate” data. It can be set to . According to one embodiment, the electronic device 101 may be set to ensure sequential write performance of at least about 60 MB/s when performing a migration operation. According to one embodiment, writing performance is not limited to a specific speed, and may be determined at a level that does not affect the performance of the electronic device 101 during a migration operation. According to one embodiment, the processor 210 of the electronic device 101 may transmit a provisioning command to the storage device 220, and the storage device 220 may perform a preset provisioning operation in response to the received provisioning command. Based on this, the settings of the storage device 220 (eg, settings for the second storage space 232) may be changed at least partially.

According to one embodiment, the processor 210 of the electronic device 101 may provide information related to the manufacturing process (eg, process binary) to the storage device 220. When a process that generates heat is in progress (e.g., when the status information is in the “Pre-soldering” state), the control unit (e.g., the storage device control unit 221) of the storage device 220 controls the first storage space 231. ), data can be stored based on . According to one embodiment, when the electronic device 101 is rebooted after a process that generates heat is completed (e.g., when the status information is in the “Loading Complete” state), the storage device control unit 221 stores the first storage device. A migration operation may be performed to move data stored in the space 231 to the second storage space 232.

According to one embodiment, in a storage device (e.g., the storage device 220 of FIG. 2), a first storage space (e.g., the first storage space 231 of FIG. 2, SLC) where the first bit of data is stored. ) and a first memory (e.g., NAND) including a second storage space (e.g., the second storage space 232 in FIG. 2, MLC/TLC/QLC) in which data of more than 2 bits, rather than the first bit, is stored. storage) (e.g., NAND storage unit 230 in FIG. 2), a second memory in which state information is stored (e.g., DRAM 205 in FIG. 2), and an operational memory in the first memory 230 and the second memory. It may include a memory controller (eg, the storage device control unit 221 of FIG. 2) connected to . The memory controller 221 may check whether the storage device 220 supports the PSA interface based on the status information stored in the second memory 205. The memory controller 221 may change the state information to the first state (eg, pre-soldering) in response to confirmation of support of the PSA interface. The memory controller 221 may store data downloaded from an external electronic device in the first storage space 231 of the first memory 230 in response to the status information being in the first state. The memory controller 221 may change the state information to the second state in response to completion of the process corresponding to the downloaded data. The memory controller 221 may migrate data stored in the first storage space 231 to the second storage space 232 in response to the state information being in the second state.

According to one embodiment, the memory controller 221 may check the ratio occupied by the first storage space 231 among the total storage space of the first memory 230. If the confirmed ratio satisfies the first condition, the memory controller 221 may check the size of the first storage space 231. The memory controller 221 may store the downloaded data in the first storage space 231 of the first memory 230 in response to the status information being in the first state.

According to one embodiment, the first condition may include a condition in which the proportion of the first storage space 231 of the total storage space of the first memory 230 exceeds about 1/3. According to one embodiment, when the first condition is met, the memory controller 221 may check whether the size of the first storage space 231 is set to about 20 GB or more.

According to one embodiment, the status information includes first code information indicating whether the PSA interface is supported, second code information indicating the maximum size of the first storage space 231, and third code indicating the status of the electronic device 101. It may include at least one of information and fourth code information indicating the size of the first storage space 231.

According to one embodiment, the memory controller 221 may store data corresponding to the process binary in the first storage space 231 of the first memory 230. The memory controller 221 may store at least one data generated while a process is in progress based on the process binary in the first storage space 231.

According to one embodiment, when storing at least one data in the first storage space 231, the memory controller 221 may check a situation in which the first storage space 231 is exceeded. The memory controller 221 may store at least one data in the second storage space 232 in response to a situation in which the first storage space 231 is exceeded.

According to one embodiment, when the migration operation in which data stored in the first storage space 231 is moved to the second storage space 232 is completed, the memory controller 221 changes the state information from the second state to the third state. You can change it.

According to one embodiment, the memory controller 221 may check data previously stored in the first storage space 231 when the state information is in the first state. The memory controller 221 may set pre-stored data as data excluded from migration. When a migration operation is performed, the memory controller 221 may migrate remaining data other than data excluded from migration among the data stored in the first storage space 231.

According to one embodiment, the manufacturing process may include testing and processing steps that generate heat.

According to one embodiment, the memory controller 221 may check whether the write booster function is supported. If the memory controller 221 supports the light booster function, it can activate the light booster function. The memory controller 221 may store data downloaded from an external electronic device in the first storage space 231 of the first memory 230 based on the activated light booster function.

According to one embodiment, when supporting the light booster function, the memory controller 221 may disable the light booster flush function related to the light booster function. The memory controller 221 may stop the migration operation based on the disabled light booster flush function.

According to one embodiment, the memory controller 221 may activate the disabled light booster flush function in response to execution of the operating system according to the reboot operation. The memory controller 221 may migrate data stored in the first storage space 231 to the second storage space 232 based on the activated light booster flush function.

According to one embodiment, the memory controller 221 may activate the light booster function in response to execution of the bootloader of the electronic device 101. The memory controller 221 may disable the light booster function in response to execution of the operating system of the electronic device 101.

According to one embodiment, in an electronic device (e.g., electronic device 101 of FIG. 1), a communication circuit (e.g., communication module 190 of FIG. 1) and a first memory (e.g., FIG. 2 DRAM 205), a first storage space in which the first bit of data is stored (e.g., the first storage space 231 in FIG. 2, SLC), and a second storage space in which not the first bit but the second bit or more of data is stored. A second memory (e.g., NAND storage) including a second storage space (e.g., second storage space 232 in FIG. 2, MLC/TLC/QLC) (e.g., NAND storage unit 230 in FIG. 2) and a storage device (e.g., storage device 220 of FIG. 2) and a communication circuit 190 including a memory controller (e.g., memory controller 211 of FIG. 2) operatively connected to the second memory 230; It may include a processor (eg, processor 120 of FIG. 1) operatively connected to the first memory 205 and the storage device 220. The processor 120 may check whether the storage device 220 supports the PSA interface based on the status information stored in the first memory 205. The processor 120 may change the state information to the first state in response to the storage device 220 supporting the PSA interface. The processor 120 may transmit data downloaded from an external electronic device connected through the communication circuit 190 to the storage device 220 in response to the status information being in the first state. The processor 120 may check whether the process corresponding to the downloaded data has been completed while the downloaded data is stored in the first storage space 231 of the storage device 220. The processor 120 may change the state information to the second state in response to completion of the process process. In response to the state information being in the second state, the processor 120 configures the memory of the storage device 220 to migrate the data stored in the first storage space 231 to the second storage space 232 of the storage device 220. The controller 221 can be controlled.

FIG. 3 is a first flowchart illustrating a method of migrating data based on status information of an electronic device according to an embodiment of the present disclosure.

In the following embodiments, each operation may be performed sequentially, but is not necessarily performed sequentially. For example, the order of each operation may be changed, and at least two operations may be performed in parallel.

The electronic device 101 of FIG. 3 may be at least partially similar to the electronic device 101 of FIG. 1 and the electronic device 201 of FIG. 2, or may further include other embodiments of the electronic device 101.

According to one embodiment, the electronic device 101 is connected to an external electronic device (e.g., the electronic devices 102 and 104 of FIG. 1, a PC) through a connection terminal (e.g., the connection terminal 178 of FIG. 1, a USB interface). While operationally connected to a personal computer, a software binary (SW binary) can be obtained from an external electronic device. For example, the software binary may include data (eg, process binary) for the operation (eg, process) of the electronic device 101. The electronic device 101 may store the acquired software binary in DRAM (eg, DRAM 205 in FIG. 2). According to one embodiment, the electronic device 101 may have a storage device (e.g., the storage device 220 of FIG. 2) disposed in an internal space (e.g., a surface mount device (SMD)). The electronic device 101 may perform operations related to the electronic device 101 and the storage device 220 based on the downloaded software binary.

According to one embodiment, the processor of the electronic device 101 (e.g., processor 120 in FIG. 1, processor 210 in FIG. 2) checks status information (e.g., PSA interface) related to the storage device 220. It is possible to determine whether the storage device 220 supports the PSA interface based on the confirmed status information. For example, the processor 210 may check whether the storage device 220 supports the PSA interface based on “eExtendedUFSFeature” (e.g., PSA code) included in the status information. If the storage device 220 supports the PSA interface, the processor 210 can perform a process based on status information. The processor 210 can change “bPSAState” included in the state information to “Pre-soldering” (e.g., a PSA code indicating that the electronic device 101 is in progress) and transmit it to the storage device 220. there is.

In operation 301, the storage device 220 can determine whether the state information (e.g., “bPSAState” information) is in the first state (e.g., “Pre-soldering”) based on the state information provided from the electronic device 101. there is. For example, while the storage device control unit of the storage device 220 (e.g., the storage device control unit 221 of FIG. 2) is performing a process based on the PSA interface, “bPSAState” included in the state information is “Pre- You can check whether it is a code corresponding to “soldering”.

In operation 303, in response to the status information being in the first state, the storage device control unit 221 stores data downloaded from the external electronic device in the first storage space (e.g., the first storage space (SLC) 231 in FIG. 2). It can be saved in . For example, data (eg, software binary) downloaded from an external electronic device (eg, electronic devices 102 and 104 of FIG. 1) may be stored in the DRAM 205 of the electronic device 101. The storage device control unit 221 may move data stored in the DRAM 205 to the first storage space 231. For example, the corresponding data (e.g., process binary (e.g., first binary 212 in FIG. 2), kernel binary (e.g., third binary 214 in FIG. 2)) is utilized when performing a process process. It can be. For example, a process process (e.g., a process step) may include the operation of arranging various component parts in an internal space and performing various tests related to the component parts. The manufacturing process may include rework performed when defects are identified with component parts and may include operations that generate heat. According to one embodiment, the storage device control unit 221 may store various data related to the process in the first storage space 231 while the process is in progress. The first storage space 231 may be a storage space in which damage or modification of stored data is prevented even if heat-generating work is performed during the process. When a request to write data exceeding the first storage space 231 is confirmed, the storage device control unit 221 may store the data in the second storage space 232. Between operations 303 and 305, the processor 210 and the storage device 220 may perform a process.

In operation 305, the electronic device 101 may perform a reboot operation after the process step (eg, process process) is completed. For example, the process may include storing a user binary in the storage device 220 when set tests and tasks are completed. For example, when the data capacity of the user binary exceeds the first storage space 231, the storage device control unit 221 may store the user binary in the second storage space 232. If the operation of storing the user binary in the storage device 220 is confirmed in operation 305, the electronic device 101 may reboot. The processing process may be set to perform a reboot in response to the operation of storing the user binary in the storage device 220.

In operation 307, the electronic device 101 may execute a bootloader (eg, the second binary 213 in FIG. 2) in response to the reboot operation. For example, the processor 210 may execute a bootloader based on the second binary 213.

In operation 309, the processor 210 may check whether the state information of the electronic device 101, confirmed by the bootloader, is in the first state (e.g., “Pre-soldering”), and determine whether the state information is in the first state. In response to this, the status information is changed from a first state (e.g., “Pre-soldering”, a state in which the process is in progress) to a second state (e.g., “Loading Complete”, a state in which a process that generates heat during the process has been completed). It can be changed to . The processor 210 may transmit state information changed to the second state (e.g., “Loading Complete”) to the storage device 220.

Referring to FIG. 3 , operations 301 to 303 may be performed by the storage device controller 221, and operations 305 to 309 may be performed by the processor 210 of the electronic device 101.

In operation 311, the storage device control unit 221 may check whether the state information (e.g., “bPSAState” information) is in the second state (e.g., “Loading Complete”) based on the state information provided from the electronic device 101. there is. For example, the fact that the status information is in the second state may mean that a process that generates heat during the process has been completed.

In response to the state information being in the second state in operation 313, the storage device control unit 221 may perform a migration operation to move the data stored in the first storage space 231 to the second storage space 232. According to one embodiment, if a write request occurs even while a migration operation is being performed, the electronic device 101 may set the write performance according to the write request to at least about 60 MB/s. According to one embodiment, writing performance is not limited to a specific speed, and may be determined at a level that does not affect the performance of the electronic device 101 during a migration operation. When the migration operation is completed, the storage device control unit 221 may change the state information from the second state (e.g., “Loading Complete”) to the third state (“Soldered”). According to one embodiment, the electronic device 101 may check the status information (e.g., status changed to “Soldered”) of the storage device 220 and determine that the migration operation has been completed.

According to one embodiment, the electronic device 101 may check status information (e.g., PSA interface, code information related to the PSA interface) related to the storage device 220, and based on the confirmed status information, the storage device ( 220) can determine whether it supports the PSA interface. If the storage device 220 supports the PSA interface, the electronic device 101 may perform a process based on the first flowchart of FIG. 3. According to one embodiment, even if an operation that generates heat is performed during the process, the electronic device 101 stores data based on the first storage space 231, thereby preventing damage and modification of the data. You can.

FIG. 4 is a second flowchart illustrating a method of migrating data based on status information of an electronic device according to an embodiment of the present disclosure.

In the following embodiments, each operation may be performed sequentially, but is not necessarily performed sequentially. For example, the order of each operation may be changed, and at least two operations may be performed in parallel.

The electronic device 101 of FIG. 4 may be at least partially similar to the electronic device 101 of FIG. 1 and the electronic device 201 of FIG. 2, or may further include other embodiments of the electronic device 101.

In operation 401, the electronic device 101 is in a state in which the processor (e.g., the processor 120 of FIG. 1, the processor 210 of FIG. 2, and the SMD of a surface mount device (SMD) (e.g., an application processor (AP)) is completed. It can be. For example, the process of placing the components of the processor 210 in the internal space of the electronic device 101 may have been completed. When the SMD of the processor 210 is completed, the electronic device 101 may enter an emergency download (eDL) mode. For example, the eDL mode is a state in which no data is stored in the storage device 220 (e.g., initialization state) or a connection terminal of the electronic device 101 (e.g., the connection terminal 178 of FIG. 1, USB interface). ) can be entered when an external electronic device (e.g., USB device) connected via ) is set as a boot device. According to one embodiment, the processor 210 may download a software binary (SW binary) from an external electronic device (e.g., the electronic devices 102 and 104 of FIG. 1) connected through the connection terminal in eDL mode, The software binary may be stored in a first binary (e.g., first binary 212 of FIG. 2) of DRAM (e.g., DRAM 205 of FIG. 2). The processor 210 may at least partially control the electronic device 101 based on the first binary 212.

In operation 403, the processor 210 may initialize status information (e.g., information related to the PSA interface (e.g., PSA code information)). According to one embodiment, a host controller (e.g., host controller 211 in FIG. 2) may initialize the storage device 220 based on the first binary 212 and perform a provisioning operation. (Example: LU (logical unit) configuration operation) can be performed. For example, a provisioning operation may reset thermal damage data caused by SMD operation. The provisioning operation may include setting the logical unit size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. After the provisioning operation is completed, the host controller 211 determines whether the storage device 220 supports the PSA interface (e.g., “eExtendedUFSFeature” information included in the status information) and the first storage space 231 based on the status information. ) (e.g., “dPSAMaxDataSize” information included in the status information) is set to occupy approximately 1/3 or more of the NAND storage unit 230.

In operation 405, the processor 210 (e.g., host controller 211) may check whether the storage device 220 supports the PSA interface based on status information (e.g., first binary 212). For example, the processor 210 can check the “eExtendedUFSFeature” information included in the status information and determine whether the storage device 220 supports the PSA interface.

If the storage device 220 supports the PSA interface in operation 405, the processor 210 may check whether a process binary (eg, a process process) is in progress based on the status information in operation 407. For example, if a process binary is in progress, the processor 210 may store setting information of the storage device 220 (e.g., information related to the setting of the first storage space 231, information of the PSA interface) based on the process binary in progress. (information related to settings) can be changed. If the storage device 220 does not support the PSA interface in operation 405, the processor 210 may end the second flowchart operation based on the status information.

If the progress of the process binary is confirmed in operation 407, the processor 210 may check the first storage space 231 (eg, the size of the first storage space 231) of the storage device 220 in operation 409. According to one embodiment, when the conditions for the storage device 220 to support the PSA interface and the conditions related to the maximum size of the first storage space 231 are met, the host controller 211 stores the first storage space based on the process binary. You can check the size of the storage space 231 (e.g., “bPSADataSize” information). For example, there may be a plurality of process processes according to the process binary, and the size of the first storage space 231 for each process process may be set differently. For example, the size of the first storage space 231 may be set to at least about 20 GB. According to one embodiment, the size of the first storage space 231 may be preset according to conditions for supporting the PSA interface.

In operation 411, the processor 210 (e.g., host controller 211) may set state information (e.g., “bPSAState” information) to a first state (e.g., “Pre-soldering”), and the state of the first state. Information (e.g., binary data) may be provided to the storage device 220.

In operation 413, the processor 210 may store data related to the process in the first storage space 231 of the storage device 220. According to one embodiment, the host controller 211 may execute a bootloader based on a second binary (e.g., the second binary 213 in FIG. 2), and in the process of executing the bootloader, the storage device 220 ) can be checked whether the state information related to is in the first state, and whether the size of the first storage space 231 is the size corresponding to the process binary.

According to one embodiment, the host controller 211 may perform an operation based on a third binary (eg, the third binary 214 in FIG. 2) corresponding to the process binary. For example, the host controller 211 may provide the third binary 214 to the storage device 220, and the storage device control unit 221 of the storage device 220 may provide the third binary 214. It can be stored in the first storage space 231. For example, when data is stored in the first storage space 231 and the storage capacity of the first storage space 231 is exceeded, the remaining data may be stored in the second storage space 232.

In operation 415, the electronic device 101 may perform various types of functional tests and process steps (eg, process processes) based on the process binary stored in the first storage space 231. For example, a process process (e.g., a process step) may include the operation of arranging various component parts in an internal space and performing various tests related to the component parts. The manufacturing process may include rework performed when defects are identified with component parts and may include operations that generate heat.

According to one embodiment, the electronic device 101 stores data based on the first storage space 231, so even if the heat-generating process in operation 415 proceeds, the data stored in the first storage space 231 You can prevent situations where data is damaged or altered. According to one embodiment, the first storage space 231 may include a single level cell (SLC) area of the NAND storage unit 230, and approximately 1 bit of data is stored per cell, so the peripheral area is relatively small. Data damage due to temperature rise may be less. While a process is in progress, the electronic device 101 stores data based on the first storage space 231 to prevent damage or modification of the data.

When the process process based on the process binary is completed in operation 415, the process may return to operation 405. In operation 405, the processor 210 may check whether the PSA interface is supported.

If the progress of the process binary is not confirmed in operation 407 (e.g., if the process has been completed), status information is changed from a first state (e.g., “Pre-soldering”) to a second state (e.g., “Loading Complete”) in operation 417. ) can be changed to . For example, a situation in which the progress of a process binary is not confirmed may include a situation in which a process processor (e.g., a process step) has been completed. Completion of the manufacturing process may mean that the manufacturing process that generates heat has been completed.

In operation 419, the storage device control unit 221 of the storage device 220 stores the first storage space 231 in response to the status information being a second state (e.g., “Loading Complete”) (e.g., completion of the process process). ) can perform a migration operation to move the data stored in the second storage space 232. For example, the storage device control unit 221 may store data stored in the SLC area (e.g., the first storage space 231) by moving it to the MLC/TLC/QLC area (e.g., the second storage space 232). there is.

When the migration operation is completed in operation 421, the storage device control unit 221 may change the state information from the second state (e.g., “Loading Complete”) to the third state (“Soldered”). For example, the storage device control unit 221 may transmit a signal indicating completion of the migration operation (e.g., state information changed to the third state) to the processor 210, and the processor 210 may confirm that the migration operation has been completed. You can. For example, the processor 210 may confirm that the migration operation has been completed based on status information about the storage device 220.

FIG. 5 is an exemplary diagram illustrating a process for migrating data based on status information of an electronic device according to an embodiment of the present disclosure.

The electronic device 101 of FIG. 5 may be at least partially similar to the electronic device 101 of FIG. 1 and the electronic device 201 of FIG. 2, or may further include other embodiments of the electronic device 101. The processor 210 of FIG. 5 may be at least partially similar to the processor 210 of FIG. 2 or may further include other embodiments of the processor 210.

Referring to FIG. 5, during the progress and completion of the process, the PSA state 510 according to the state information of the electronic device and the cell type 520 used as storage space in the storage device 220 are shown. do. For example, PSA state 510 may mean information corresponding to “bPSAState” included in the state information.

Referring to FIG. 5, after the 1st SMD 531 (e.g., SMD of AP) is completed in operation 501, the first process process (e.g., operation 501, operation 502) is performed and the 2nd SMD 533 in operation 503 ( A second process processor (e.g., operations 503 and 504) performed after (e.g., SMD of Master RF) is completed is shown, but is not limited thereto. For example, a plurality of process processes may be configured.

In operation 501, the processor 210 completes the 1st SMD 531 and may perform a provisioning operation (eg, a logical unit (LU) configuration operation). For example, the provisioning operation may include an operation of initializing thermal damage data generated due to the operation of the 1st SMD 531. The provisioning operation may include setting the logical unit size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. In operation 501, the processor 210 may store data related to the first process in the first storage space 231 (eg, download the 1st binary).

In operation 502, the electronic device 101 may perform a function test related to the first process, and if a defect is confirmed as a result of the function test, rework based on the first process (e.g. Rework may occur (532)). For example, rework may involve operations that generate heat.

According to one embodiment, a first process (eg, operations 501 and 502) may proceed, and a second process (eg, operations 503 and 504) may proceed. Referring to FIG. 5, while the first process 501 and 502 and the second process 503 and 504 are in progress, state information (e.g., PSA state 510) is displayed in the first state (e.g., “Pre”). -soldering” (511)) can be maintained. For example, when a write request occurs during the process, the storage device 220 stores the data according to the write request in the first storage space 321 (e.g., Cell Type (520): SLC (521)). You can.

In operation 503, the processor 210 completes the 2nd SMD 533 and may perform a provisioning operation (eg, a logical unit (LU) configuration operation). For example, the provisioning operation may include an operation of initializing thermal damage data generated by the 2nd SMD 533 operation. The provisioning operation may include setting the logical unit size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. In operation 503, the processor 210 may store data related to the second process in the first storage space 231 (eg, download the 2nd binary).

In operation 504, the electronic device 101 may perform a function test related to the second process and proceed with the main process. If a defect is confirmed as a result of the function test and the main process, the electronic device 101 may perform rework (e.g., rework may occur 534) based on the second process. For example, rework may involve operations that generate heat.

According to one embodiment, when all processes related to manufacturing the electronic device 101 are completed, the processor 210 may download a user binary in operation 505. For example, user binaries may be stored in the first storage space 231. If the data capacity of the user binary exceeds the first storage space 231, the user binary may be stored in the second storage space 232.

In response to the operation of storing the user binary in the storage device 220 in operation 505, the electronic device 101 may perform a reboot operation (eg, power on the terminal) in operation 506. According to one embodiment, in response to a reboot operation, the electronic device 101 may perform a bootloader based on a second binary (eg, the second binary 213 in FIG. 2). According to one embodiment, when the state information confirmed by the bootloader is the first state 511 (e.g., “Pre-soldering”), the electronic device 101 sends the state information to the first state 511 (e.g., “Pre-soldering”). : You can change from “Pre-soldering” (511) to the second state (512) (e.g. “Loading Complete” (512)). The processor 210 may transmit state information corresponding to the second state 512 (e.g., “bPSAState” information included in the state information) to the storage device 220.

When the storage device control unit 211 of the storage device 220 confirms that the status information is in the second state 512 (e.g., “Loading Complete” 512), it controls the data stored in the first storage space 231. Migration operation 513 may be performed. For example, data stored in the first storage space 231 can be moved to the second storage space 232 and stored. When the migration operation 513 is completed, the storage device control unit 221 changes the status information from the second state 512 (e.g., “Loading Complete” 512) to the third state 514 (“Soldered” 514). ) can be changed to . According to one embodiment, the electronic device 101 may check the status information of the storage device 220 (e.g., status changed to “Soldered” 514) and determine that the migration operation 513 has been completed. .

FIG. 6 is a first flowchart illustrating a method of migrating data based on the write booster function according to an embodiment of the present disclosure.

In the following embodiments, each operation may be performed sequentially, but is not necessarily performed sequentially. For example, the order of each operation may be changed, and at least two operations may be performed in parallel.

The electronic device 101 of FIG. 6 may be at least partially similar to the electronic device 101 of FIG. 1 and the electronic device 201 of FIG. 2, or may further include other embodiments of the electronic device 101.

According to one embodiment, the electronic device 101 is connected to an external electronic device (e.g., the electronic devices 102 and 104 of FIG. 1, a PC) through a connection terminal (e.g., the connection terminal 178 of FIG. 1, a USB interface). While operationally connected to a personal computer, a software binary (SW binary) can be obtained from an external electronic device. For example, the software binary may include data (eg, process binary) for the operation (eg, process) of the electronic device 101. The electronic device 101 may store the acquired software binary in DRAM (eg, DRAM 205 in FIG. 2). According to one embodiment, the electronic device 101 may have a storage device (e.g., the storage device 220 of FIG. 2) disposed in an internal space (e.g., a surface mount device (SMD)). The electronic device 101 may perform operations related to the electronic device 101 and the storage device 220 based on the downloaded software binary.

In operation 601, the processor of the electronic device 101 (e.g., the processor 120 of FIG. 1 or the processor 210 of FIG. 2) may check whether the storage device 220 supports the write booster function. there is. For example, the processor 210 may check whether the storage device 220 supports the light booster function while a process is in progress.

If the storage device 220 supports the write booster function in operation 603, the processor 210 may activate the write booster function and disable the write booster flush function. For example, the storage device 220 supporting the light booster function is based on the first storage space (e.g., the first storage space 231 in FIG. 2) when the light booster function is in an activated state (e.g., ON). Data can be stored, and when the light booster function is in an inactive state (eg, OFF), data can be stored based on the second storage space (eg, the second storage space 232 in FIG. 2). According to one embodiment, when the light booster function is changed from the activated state to the deactivated state, if the light booster flush function is activated, data stored in the first storage space 231 will be migrated to the second storage space 232. You can. According to one embodiment, the electronic device 101 sets the light booster flush function to a disabled state so that data stored in the first storage space 231 is not migrated to the second storage space 232 while the process is in progress. You can. The storage device control unit 221 of the storage device 220 may confirm that the light booster flush function is in a deactivated state and not perform a migration operation.

In operation 605, in response to the light booster function being in an activated state (e.g., ON), the storage device control unit 221 stores data (e.g., software binary) downloaded from an external electronic device into the first storage space (e.g., of FIG. 2). It can be stored in the first storage space (SLC) 231). According to one embodiment, the storage device control unit 221 may store various data related to the process in the first storage space 231 while the process is in progress. The first storage space 231 may be a storage space in which damage or modification of stored data is prevented even if heat-generating work is performed during the process.

In operation 607, the processor 210 may download the user binary after the process step (eg, process process) is completed. For example, the process may include an operation of storing a user binary in the process step in the storage device 220 when set tests and tasks are completed. For example, if the operation of storing the user binary in the storage device 220 is confirmed, the processor 210 may reboot.

In operation 609, the processor 210 may switch the light booster flush function, which is in a disabled state at the time the operating system (OS) is executed, to an activated state. For example, while the electronic device 101 is rebooting, the processor 210 can run an operating system and change the light booster flush function from a disabled state to an activated state.

In operation 611, the storage device control unit 221 performs a migration operation to move data stored in the first storage space 231 to the second storage space 232 based on the light booster flush function (e.g., ON state, activated state). It can be done.

According to one embodiment, the electronic device 101 may check whether the light booster function related to the storage device 220 is supported, and may perform operations to activate the light booster function and deactivate the light booster flush function. If the storage device 220 supports the light booster function, the electronic device 101 may store data in the first storage space 231 in response to activation of the light booster function. For example, the electronic device 101 stores data in the first storage space 231 according to the light booster function, but since the light booster flush function is disabled, the electronic device 101 stores data from the first storage space 231 to the second storage space 231. A migration operation to move to the storage space 232 may not be performed. According to one embodiment, the electronic device 101 may download the user binary when tests and tasks according to the process process (e.g., operation 607 of FIG. 6) are completed. According to one embodiment, even if heat-generating work is performed during the process, the electronic device 101 stores data in the first storage space 231 based on the light booster function, thereby preventing damage to data due to heat generation. and deformation can be prevented. According to one embodiment, the electronic device 101 may perform a reboot operation after the manufacturing process is completed and change the light booster flush function, which is in an inactive state to an activated state, when the operating system (OS) is executed. The electronic device 101 may perform a migration operation to move data stored in the first storage space 231 to the second storage space 232 based on the light booster flush function.

FIG. 7 is a second flowchart illustrating a method of migrating data based on the write booster function according to an embodiment of the present disclosure.

In the following embodiments, each operation may be performed sequentially, but is not necessarily performed sequentially. For example, the order of each operation may be changed, and at least two operations may be performed in parallel.

The electronic device 101 of FIG. 7 may be at least partially similar to the electronic device 101 of FIG. 1 and the electronic device 201 of FIG. 2, or may further include other embodiments of the electronic device 101.

In operation 701, the electronic device 101 is in a state in which the processor (e.g., the processor 120 of FIG. 1, the processor 210 of FIG. 2, and the SMD of a surface mount device (SMD) (e.g., an application processor (AP)) is completed. It can be. For example, the process of placing the components of the processor 210 in the internal space of the electronic device 101 may have been completed. When the SMD of the processor 210 is completed, the electronic device 101 may enter an emergency download (eDL) mode. For example, the eDL mode is a state in which no data is stored in the storage device 220 (e.g., initialization state) or a connection terminal of the electronic device 101 (e.g., the connection terminal 178 of FIG. 1, USB interface). ) can be entered when an external electronic device (e.g., a USB device, the electronic devices 102 and 104 of FIG. 1) connected via ) is set as a boot device. According to one embodiment, the processor 210 may download a software binary (SW binary) from an external electronic device connected through the connection terminal in eDL mode, and download the software binary into DRAM (e.g., DRAM 205 in FIG. 2). )) can be stored in the first binary (e.g., the first binary 212 in FIG. 2).

In operation 703, the processor 210 may invalidate data previously stored in the storage device 220. For example, invalidated data may be excluded from migration when a migration operation is performed later. According to one embodiment, in response to execution of the eDL binary 212, a host controller (e.g., the host controller 211 of FIG. 2) may initialize the storage device 220 and perform provisioning. ) operations (e.g., LU (logical unit) configuration operations) can be performed. For example, a provisioning operation may reset thermal damage data caused by SMD operation. The provisioning operation may include setting the logical unit size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. After the provisioning operation is completed, the storage device controller 221 can check data already stored in the storage device 220 and invalidate the confirmed data.

In operation 705, the processor 210 (eg, host controller 211) may check whether the storage device 220 supports a write booster function. If the storage device 220 does not support the write booster function in operation 705, the processor 210 may end the second flowchart operation based on the write booster function.

If the storage device 220 supports the write booster function in operation 705, the processor 210 may check whether the process binary is in progress in operation 707. For example, if a process binary is in progress, the processor 210 may disable the light booster flush function while activating the light booster function.

At operation 709, processor 210 may enable the light booster function and may disable the light booster flush function. The processor 210 may change the setting to activate the light booster function and disable the light booster flush function. For example, the processor 210 stores data in the first storage space 231 based on the activated light booster function, and stores the data stored in the first storage space 231 based on the deactivated light booster flush function. A migration operation to move data to the second storage space 232 may not be performed.

In operation 711, the processor 210 may store data related to the process in the first storage space 231 of the storage device 220. According to one embodiment, the host controller 211 may execute a bootloader (e.g., the bootloader 213 in FIG. 2), and in the process of executing the bootloader 213, a write related to the storage device 220 may be executed. You can check whether the booster function is activated. According to one embodiment, the host controller 211 may execute a kernel binary (eg, kernel binary 214 in FIG. 2) corresponding to a process binary. For example, the host controller 211 may provide a process binary to the storage device 220, and the storage device control unit 221 of the storage device 220 may provide the process binary based on the activated write booster function. It can be stored in the first storage space 231. For example, when data is stored in the first storage space 231 and the storage capacity of the first storage space 231 is exceeded, the remaining data may be stored in the second storage space 232. In operation 711, the processor 210 may download the user binary.

In operation 713, the electronic device 101 may perform various types of functional tests and process steps (eg, process processes) based on the process binary. For example, a process process (e.g., a process step) may include the operation of arranging various component parts in an internal space and performing various tests related to the component parts. The manufacturing process may include rework performed when defects are identified with component parts and may include operations that generate heat.

According to one embodiment, the electronic device 101 stores data based on the first storage space 231, so even if the heat-generating process in operation 713 proceeds, the data stored in the first storage space 231 You can prevent situations where data is damaged or altered. According to one embodiment, the first storage space 231 may include a single level cell (SLC) area of the NAND storage unit 230, and approximately 1 bit of data is stored per cell, so the peripheral area is relatively small. Data damage due to temperature rise may be less. While a process is in progress, the electronic device 101 stores data based on the first storage space 231 to prevent damage or modification of the data.

When the process process based on the process binary is completed in operation 713, the process may return to operation 705. In operation 705, the processor 210 may check whether the storage device 220 supports the light booster function.

If the progress of the process binary is not confirmed in operation 707, the processor 210 may perform a reboot operation. For example, a situation in which the progress of a process binary is not confirmed may include a situation in which a process processor (e.g., a process step) has been completed. Completion of the manufacturing process may mean that the manufacturing process that generates heat has been completed. The processor 210 may execute an operating system (OS) through a reboot operation, and in operation 715, the light booster flush function, which is in an inactive state when the operating system is executed, may be converted to an activated state.

In operation 717, the storage device control unit 221 of the storage device 220 may migrate the data stored in the first storage space 231 to the second storage space 232 in response to the light booster flush function being activated. there is. For example, the storage device control unit 221 may store data stored in the SLC area (e.g., the first storage space 231) by moving it to the MLC/TLC/QLC area (e.g., the second storage space 232). there is.

Figure 8 is an example diagram illustrating a process for migrating data based on the write booster function according to an embodiment of the present disclosure.

The electronic device 101 of FIG. 8 may be at least partially similar to the electronic device 101 of FIG. 1 and the electronic device 201 of FIG. 2, or may further include other embodiments of the electronic device 101. The processor 210 of FIG. 8 may be at least partially similar to the processor 210 of FIG. 2 or may further include other embodiments of the processor 210.

Referring to FIG. 8, during the progress and completion of the process, the state (WB state) 810 and storage of the light booster function indicating the activation state (e.g., ON) and the deactivation state (e.g., OFF) of the light booster function. A cell type 820 used as a storage space in the device 220 is shown.

Referring to FIG. 8, after the 1st SMD 831 (e.g., SMD of AP) is completed in operation 801, the first process (e.g., operation 801, operation 802) and the 2nd SMD 833 (e.g., operation 803) are performed in operation 803. A second process processor (e.g., operations 803 and 804) performed after the SMD of Master RF (e.g., SMD of Master RF) is completed is shown, but is not limited thereto. For example, a plurality of process processes may be configured.

In operation 801, the processor 210 completes the 1st SMD 831 and may perform a provisioning operation (eg, a logical unit (LU) configuration operation). For example, the provisioning operation may include an operation of initializing thermal damage data generated due to the operation of the 1st SMD 831. The provisioning operation may include setting the logical unit size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. In operation 801, the processor 210 may store data related to the first process in the first storage space 231 (eg, download the 1st binary).

In operation 802, the electronic device 101 may perform a function test related to the first process, and if a defect is confirmed as a result of the function test, rework based on the first process (e.g., Rework may occur (832)). For example, rework may involve operations that generate heat.

According to one embodiment, a first process (eg, operations 801 and 802) may proceed, and a second process (eg, operations 803 and 804) may proceed. Referring to FIG. 8, while the first process 801 and 802 and the second process 803 and 804 are in progress, the processor 210 processes the second binary (e.g., the second binary 213 of FIG. 2). ), the light booster function may be activated, and in response to the operation of the operating system (OS), the light booster function may be deactivated. For example, in operations 801, 803, and 805, the light booster function 810 may be activated (ON) (811, 813, 815), and in operations 802 and 804, the light booster function 810 may be deactivated. It may be in a state (OFF) (812, 814). In operations 801, 803, and 805, the processor 210 may store data in the first storage space 231 (e.g., SLC 821, 823, 825) based on the activated light booster function. At 802 and operation 804, the processor 210 may store data in the second storage space 232 (eg, TLCs 822 and 824) based on the deactivated light booster function.

In operation 803, the processor 210 completes the 2nd SMD 833 and may perform a provisioning operation (eg, a logical unit (LU) configuration operation). For example, the provisioning operation may initialize thermal damage data generated by the Master RF SMD (833) operation. The provisioning operation may include setting the logical unit size of the second storage space 232 (eg, MLC/TLC/QLC) based on the NAND storage unit 230. In operation 803, the processor 210 may store data related to the second process in the first storage space 231 (eg, download the 2nd binary).

In operation 804, the electronic device 101 may perform a function test related to the second process and proceed with the main process. If a defect is confirmed as a result of the function test and the main process, the electronic device 101 may perform rework (e.g., rework may occur 834) based on the second process. For example, rework may involve operations that generate heat.

According to one embodiment, when all processes related to manufacturing the electronic device 101 are completed, the processor 210 may download a user binary in operation 805. For example, in operation 805, the light booster state 810 is in the ON state 815, and the storage device control unit 221 may store the user binary in the first storage space 231 (e.g., SLC 825). . For example, user binaries may be stored in the first storage space 231 based on the light booster function. If the data capacity of the user binary exceeds the first storage space 231, the user binary may be stored in the second storage space 232.

In response to the operation of storing the user binary in the storage device 220 in operation 805, the electronic device 101 may perform a reboot operation (eg, power on the terminal) in operation 806. According to one embodiment, the electronic device 101 may execute an operating system (OS) in response to a reboot operation, and may change the light booster flush function from a disabled state to an activated state at the time the operating system is executed. For example, in operation 806, the write booster state 810 is in the OFF state 816, and the storage device control unit 221 may perform a migration operation based on the write booster flush function.

According to one embodiment, when the storage device control unit 211 of the storage device 220 confirms that the light booster flush function is activated, it performs a migration operation 816 on the data stored in the first storage space 231. can do. For example, data stored in the first storage space 231 can be moved to the second storage space 232 (eg, TLC 826) and stored.

In a method of operating a storage device (e.g., the storage device 220 of FIG. 2) according to an embodiment, a first storage space (e.g., the first storage space 231 of FIG. 2) in which the first bit of data is stored. , SLC) and a second storage space (e.g., the second storage space 232 in FIG. 2, MLC/TLC/QLC) in which data of more than 2 bits, rather than the first bit, is stored (e.g., : Based on the state information stored in the second memory 205 of the NAND storage unit 230 in FIG. 2) and the second memory in which state information is stored (e.g. DRAM 205 in FIG. 2), the storage device (e.g. : An operation of checking whether the storage device 220 of FIG. 2 supports the PSA interface, an operation of changing the state information to the first state upon confirmation of support of the PSA interface, in response to the state information being the first state, An operation of storing data downloaded from an external electronic device in the first storage space 231 of the first memory 230, and changing state information to a second state in response to completion of a process corresponding to the downloaded data. The operation may include migrating data stored in the first storage space 231 to the second storage space 232 in response to the state information being in the second state.

A method according to an embodiment includes the operation of checking the ratio occupied by the first storage space 231 among the total storage space of the first memory 230, and if the confirmed ratio satisfies the first condition, the first storage space 231 An operation to check the size of (231) may be further included. According to one embodiment, the first condition may include a condition in which the proportion of the first storage space 231 of the total storage space of the first memory 230 exceeds about 1/3.

A method according to an embodiment includes an operation of storing data corresponding to a process binary in the first storage space 231 of the first memory 230, and at least one operation that occurs while a process is in progress based on the process binary. An operation of storing data in the first storage space 231 may be further included.

The method according to one embodiment further includes changing the state information from the second state to the third state when the migration operation in which the data stored in the first storage space 231 is moved to the second storage space 232 is completed. It can be included.

A method according to an embodiment includes checking whether the write booster function is supported, if the write booster function is supported, activating the write booster function, and an external electronic device based on the activated write booster function. It may further include storing data downloaded from in the first storage space 231 of the first memory 230.

A method according to an embodiment includes, in response to completion of a process, rebooting the electronic device 101, confirming execution of the operating system in response to the rebooting operation of the electronic device 101, and following the rebooting operation. In response to execution of the operating system, activating a disabled light booster flush function, and migrating data stored in the first storage space 231 to the second storage space 232 based on the activated light booster flush function. Additional actions may be included.

The method according to one embodiment further includes activating the light booster function in response to execution of the bootloader of the electronic device 101, and deactivating the light booster function in response to execution of the operating system of the electronic device 101. It can be included.

Electronic devices according to various embodiments disclosed in this document may be of various types. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to embodiments of this document are not limited to the above-described devices.

The various embodiments of this document and the terms used herein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various changes, equivalents, or replacements of the embodiments. In connection with the description of the drawings, similar reference numbers may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the above items, unless the relevant context clearly indicates otherwise. As used herein, “A or B”, “at least one of A and B”, “at least one of A or B”, “A, B or C”, “at least one of A, B and C”, and “A Each of phrases such as “at least one of , B, or C” may include any one of the items listed together in the corresponding phrase, or any possible combination thereof. Terms such as "first", "second", or "first" or "second" may be used simply to distinguish one component from another, and to refer to those components in other respects (e.g., importance or order) is not limited. One (e.g., first) component is said to be “coupled” or “connected” to another (e.g., second) component, with or without the terms “functionally” or “communicatively.” When mentioned, it means that any of the components can be connected to the other components directly (e.g. wired), wirelessly, or through a third component.

The term “module” used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is interchangeable with terms such as logic, logic block, component, or circuit, for example. It can be used as A module may be an integrated part or a minimum unit of the parts or a part thereof that performs one or more functions. For example, according to one embodiment, the module may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments of the present document are one or more instructions stored in a storage medium (e.g., built-in memory 136 or external memory 138) that can be read by a machine (e.g., electronic device 101). It may be implemented as software (e.g., program 140) including these. For example, a processor (e.g., processor 120) of a device (e.g., electronic device 101) may call at least one command among one or more commands stored from a storage medium and execute it. This allows the device to be operated to perform at least one function according to the at least one instruction called. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. A storage medium that can be read by a device may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' only means that the storage medium is a tangible device and does not contain signals (e.g. electromagnetic waves), and this term refers to cases where data is semi-permanently stored in the storage medium. There is no distinction between cases where it is temporarily stored.

According to one embodiment, methods according to various embodiments disclosed in this document may be provided and included in a computer program product. Computer program products are commodities and can be traded between sellers and buyers. The computer program product may be distributed in the form of a machine-readable storage medium (e.g. compact disc read only memory (CD-ROM)) or through an application store (e.g. Play StoreTM) or on two user devices (e.g. It can be distributed (e.g. downloaded or uploaded) directly between smart phones) or online. In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

According to various embodiments, each component (e.g., module or program) of the above-described components may include a single or plural entity, and some of the plurality of entities may be separately placed in other components. there is. According to various embodiments, one or more of the components or operations described above may be omitted, or one or more other components or operations may be added. Alternatively or additionally, multiple components (eg, modules or programs) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each component of the plurality of components identically or similarly to those performed by the corresponding component of the plurality of components prior to the integration. . According to various embodiments, operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, or omitted. Alternatively, one or more other operations may be added.

101: electronic device 120, 210: processor
205: DRAM 211: Host Controller
212: first binary 213: second binary
214: third binary 220: storage device
221: storage device control unit 230: NAND storage unit
231: first storage space 232: second storage space

Claims (20)

In the storage device 220,
A first memory 230 including a first storage space 231 in which a first bit of data is stored and a second storage space 232 in which a second or more bit of data other than the first bit is stored;
a second memory 205 in which status information is stored; and
a memory controller 221 operatively connected to the first memory 230 and the second memory 205; Including,
The memory controller 221,
Based on the state information stored in the second memory 205, determine whether the storage device 220 supports a product state awareness (PSA) interface,
In response to confirmation of support of the PSA interface, change the state information to a first state,
In response to the state information being the first state, data downloaded from an external electronic device is stored in the first storage space 231 of the first memory 230,
In response to completion of the process process corresponding to the downloaded data, changing the state information to a second state,
A storage device that migrates data stored in the first storage space (231) to the second storage space (232) in response to the state information being the second state. According to claim 1,
The memory controller 221,
Check the ratio occupied by the first storage space 231 among the total storage space of the first memory 230,
If the confirmed ratio satisfies the first condition, check the size of the first storage space 231,
A storage device that stores the downloaded data in the first storage space (231) of the first memory (230) in response to the state information being the first state. According to claims 1 and 2,
The first condition includes a condition in which the proportion of the first storage space 231 of the total storage space of the first memory 230 exceeds about 1/3,
The memory controller 221,
A storage device that checks whether the size of the first storage space (231) is set to about 20 GB or more when the first condition is met. According to claims 1 to 3,
The status information includes first code information indicating whether the PSA interface is supported, second code information indicating the maximum size of the first storage space 231, third code information indicating the status of the electronic device 101, and the A storage device including at least one of fourth code information indicating the size of the first storage space 231. According to claims 1 to 4,
The memory controller 221,
Store data corresponding to the process binary in the first storage space 231 of the first memory 230,
A storage device that stores at least one data generated while the process is in progress based on the process binary in the first storage space (231). According to claims 1 to 5,
The memory controller 221,
When storing the at least one data in the first storage space 231, confirming a situation in which the first storage space 231 is exceeded,
A storage device that stores the at least one data in the second storage space (232) in response to a situation where the first storage space (231) is exceeded. According to claims 1 to 6,
The memory controller 221,
A storage device that changes the state information from the second state to the third state when a migration operation in which data stored in the first storage space (231) is moved to the second storage space (232) is completed. According to claims 1 to 7,
The memory controller 221,
When the state information is in the first state, check data previously stored in the first storage space 231,
Set the previously stored data as data excluded from migration,
A storage device that migrates remaining data other than the migration-excluded data among the data stored in the first storage space (231) when the migration operation is performed. According to claim 1,
A storage device in which the processing process includes testing and processing steps in which heat is generated. According to claim 1,
The memory controller 221,
Check whether the write booster function is supported,
If the light booster function is supported, activate the light booster function,
A storage device that stores data downloaded from the external electronic device in the first storage space (231) of the first memory (230) based on the activated light booster function. The method of claims 1 to 10,
The memory controller 221,
If the light booster function is supported, disable the light booster flush function related to the light booster function,
A storage device that stops the migration operation based on the disabled light booster flush function. The method of claims 1 to 11,
The memory controller 221,
In response to execution of the operating system following a reboot operation, activating the disabled light booster flush function,
A storage device that migrates data stored in the first storage space (231) to the second storage space (232) based on the activated light booster flush function. The method of claims 1 to 12,
The memory controller 221,
In response to executing the bootloader of the electronic device 101, activating the light booster function,
A storage device that disables the light booster function in response to execution of the operating system of the electronic device (101). In the method of operating the storage device 220,
A first memory 230 and status information including a first storage space 231 in which a first bit of data is stored and a second storage space 232 in which a second or more bit of data other than the first bit is stored An operation of checking whether the storage device 220 supports a product state awareness (PSA) interface based on state information stored in the second memory 205 of the second memory 205 in which is stored;
Changing the state information to a first state upon confirmation of support of the PSA interface;
In response to the state information being the first state, storing data downloaded from an external electronic device in the first storage space 231 of the first memory 230;
In response to completion of a process corresponding to the downloaded data, changing the state information to a second state; and
migrating data stored in the first storage space (231) to the second storage space (232) in response to the state information being in the second state; How to include . According to claim 14,
Checking the ratio occupied by the first storage space 231 among the total storage space of the first memory 230; and
If the confirmed ratio satisfies a first condition, confirming the size of the first storage space 231; It further includes,
The first condition includes a condition that the ratio of the first storage space 231 to the total storage space of the first memory 230 exceeds about 1/3. The method of claims 14 to 15,
An operation of storing data corresponding to a process binary in the first storage space 231 of the first memory 230; and
An operation of storing at least one data generated while the process is in progress based on the process binary in the first storage space 231; How to include more. The method of claims 14 to 16,
When a migration operation in which data stored in the first storage space 231 is moved to the second storage space 232 is completed, changing the state information from the second state to a third state; How to include more. According to claim 14,
An operation to check whether the write booster function is supported;
If the light booster function is supported, activating the light booster function; and
An operation of storing data downloaded from the external electronic device in the first storage space 231 of the first memory 230 based on the activated light booster function; How to include more. The method of claims 14 to 18,
In response to completion of the processing process, rebooting the electronic device 101;
Confirming execution of an operating system in response to a rebooting operation of the electronic device 101;
activating the disabled light booster flush function in response to execution of the operating system according to the reboot operation; and
An operation of migrating data stored in the first storage space (231) to the second storage space (232) based on the activated light booster flush function; How to include more. The method of claims 14 to 19,
activating the light booster function in response to execution of the bootloader of the electronic device 101; and
disabling the light booster function in response to execution of an operating system of the electronic device 101; How to include more.

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