KR20230045488A - Method for connecting external electronic device and electronic device supporting the same - Google Patents

Abstract

The present invention relates to an electronic device connected to a connector included in an outer electronic device. Various embodiments of the present invention can provide a connection method for an outer electronic device, capable of supporting a hot plug-in function even when the outer electronic device, such as a module M.2 is mounted on the connector after power is applied to the electronic device, and the electronic device supporting the same. The electronic device includes: a power supply module; a processor; a first circuit receiving a first signal related to power control of the electronic device generated in the processor of the outer electronic device and a second signal output from the power supply module while the electronic device is mounted on the connector, and transmitting a third signal related to the power control of the electronic device to the processor; a second circuit generating a fourth signal related to reset of the electronic device by receiving the power from the power supply module; and a third circuit receiving the fourth signal generated in the second circuit and a fifth signal related to the reset of the electronic device generated in the processor of the outer electronic device and transmitting a sixth signal related to the reset of the electronic device to the processor. Other embodiments identified through the present document are possible.

Description

Method for connecting external electronic device and electronic device supporting the same

Various embodiments of the present disclosure relate to a technology for connecting an external electronic device.

With the development of digital technology, electronic devices such as smartphones, PCs (personal computers), or laptops support connection and communication between components within the electronic devices for various types of data processing and communication support. In addition, an interface capable of supporting connection and communication with an external device may be provided. This interface may include a physical connector for connection with a host device. For example, a connector may be disposed on a main board in an electronic device, and when a slave device is mounted on the connector, the slave device is connected to the main board (host device) to transmit and receive data. can perform communication for

Meanwhile, the electronic device may provide a hot plug in function for normal operation of the USB device when an external device such as a universal serial bus (USB) device is mounted on the connector after power is applied. . For example, even if a USB device is mounted after power is applied to the electronic device and an initialization operation of the electronic device is completed, the USB device can be normally connected to the electronic device and transmit/receive data through a hot plug-in function.

However, conventional electronic devices may not support the hot plug-in function for PCIe (peripheral component interconnect express) signals and GPIO (general-purpose input/output) signals in addition to USB signals (e.g., USB Tx/Rx serial signals). there is. Accordingly, when an M.2 module supporting an M.2 interface using PCIe as an internal bus interface is mounted on a connector after power is applied to the electronic device, the existing electronic device is hot-pluggable. function may not be performed normally. In this case, the electronic device may not normally recognize the M.2 module, and electrical damage may be applied to the M.2 module or the signal line of the electronic device depending on the signal voltage state of various signals connected to the connector of the electronic device.

Various embodiments of the present invention are a method for connecting an external electronic device capable of supporting a hot plug-in function even when an external electronic device such as an M.2 module is mounted in a connector after power is applied to the electronic device, and an electronic device supporting the same can provide.

An electronic device connected to a connector included in an external electronic device according to various embodiments of the present disclosure includes a power supply module, a processor, and the electronic device generated by the processor of the external electronic device while the electronic device is mounted on the connector. A first circuit that receives a first signal related to power control of an electronic device and a second signal output from the power supply module, and transfers a third signal related to power control of the electronic device to the processor, the power supply module A second circuit that receives power from the circuit and generates a fourth signal related to the reset of the electronic device, and the fourth signal generated from the second circuit and the reset of the electronic device generated from the processor of the external electronic device and a third circuit for receiving a fifth signal related to and transmitting a sixth signal related to reset of the electronic device to the processor.

In addition, an electronic device according to various embodiments of the present invention includes a power supply module, a connector for connecting an external electronic device, and a processor, and the processor, when power is applied from the power supply module, connects to the connector. It is determined whether the external electronic device is mounted, and based on the determination that the external electronic device is mounted in the connector, a first signal related to power control and a second signal related to reset control are transmitted to the external electronic device. and isolate at least one signal line among signal lines connected to the connector based on a determination that the external electronic device is not mounted in the connector.

In addition, a method for connecting an external electronic device according to various embodiments of the present disclosure includes an operation of determining whether the external electronic device is mounted in a connector of the electronic device when power is applied to the electronic device, and the external electronic device is connected to the connector. An operation of transmitting a first signal related to power control and a second signal related to reset control to the external electronic device based on the determination that the electronic device is mounted, and the determination that the external electronic device is not mounted to the connector Based on this, an operation of isolating at least one signal line among signal lines of a processor of the electronic device connected to the connector may be included.

According to various embodiments of the present disclosure, through a hot plug-in function for an external electronic device, an external electronic device in an assembly process or a reassembly process after disassembly of an electronic device in which an external electronic device such as an M.2 module is embedded is installed. Normal operation can be supported.

In addition, according to various embodiments of the present invention, normal operation of the external electronic device can be supported when the external electronic device including the M.2 module is mounted through a hot plug-in function for the external electronic device.

In addition to this, various effects identified directly or indirectly through this document may be provided.

1 is a block diagram of an electronic device in a network environment according to various embodiments.
2 is a diagram for explaining an electronic device and an M.2 module connected to the electronic device according to an embodiment of the present invention.
3 is a diagram for explaining a method of operating an electronic device depending on whether an M.2 module is mounted or not according to an embodiment of the present invention.
4 is a diagram for explaining a method of operating an electronic device when an M.2 module is mounted after power is applied to the electronic device according to an embodiment of the present invention.
5 is a diagram for explaining a method of operating an M.2 module according to an embodiment of the present invention.
6 is a diagram for explaining a device state in a connection process between a host device and an M.2 module according to an embodiment of the present invention.
7 is a diagram for explaining an M.2 module embedded in an electronic device according to an embodiment of the present invention.
8 is a diagram for explaining an external device including an M.2 module according to an embodiment of the present invention.
9 is a diagram for explaining another external device including an M.2 module according to an embodiment of the present invention.
In connection with the description of the drawings, the same or similar reference numerals may be used for the same or similar elements.

Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings. For convenience of explanation, the size of the elements shown in the drawings may be exaggerated or reduced, and the present invention is not necessarily limited by the drawings.

1 is a block diagram of an electronic device 101 within a network environment 100, according to various embodiments. Referring to FIG. 1 , in a network environment 100, an electronic device 101 communicates with an electronic device 102 through a first network 198 (eg, a short-range wireless communication network) or through a second network 199. It may communicate with at least one of the electronic device 104 or the server 108 through (eg, a long-distance wireless communication network). According to an embodiment, the electronic device 101 may communicate with the electronic device 104 through the server 108 . According to an embodiment, the electronic device 101 includes a processor 120, a memory 130, an input module 150, an audio output module 155, a display module 160, an audio module 170, a sensor module ( 176), interface 177, connection terminal 178, haptic module 179, camera module 180, power management module 188, battery 189, communication module 190, subscriber identification module 196 , or the antenna module 197 may be included. In some embodiments, in the electronic device 101, at least one of these components (eg, the connection terminal 178) may be omitted or one or more other components may be added. In some embodiments, some of these components (eg, sensor module 176, camera module 180, or antenna module 197) are integrated into a single component (eg, display module 160). It can be.

The processor 120, for example, executes software (eg, the program 140) to cause at least one other component (eg, hardware or software component) of the electronic device 101 connected to the processor 120. It can control and perform various data processing or calculations. According to one embodiment, as at least part of data processing or operation, processor 120 transfers instructions or data received from other components (e.g., sensor module 176 or communication module 190) to volatile memory 132. , processing commands or data stored in the volatile memory 132 , and storing resultant data in the non-volatile memory 134 . According to one embodiment, the processor 120 includes a main processor 121 (eg, a central processing unit or an application processor) or a secondary processor 123 (eg, a graphic processing unit, a neural network processing unit ( NPU: neural processing unit (NPU), image signal processor, sensor hub processor, or communication processor). For example, when the electronic device 101 includes the main processor 121 and the auxiliary processor 123, the auxiliary processor 123 may use less power than the main processor 121 or be set to be specialized for a designated function. can The secondary processor 123 may be implemented separately from or as part of the main processor 121 .

The secondary processor 123 may, for example, take the place of the main processor 121 while the main processor 121 is in an inactive (eg, sleep) state, or the main processor 121 is active (eg, running an application). ) state, together with the main processor 121, at least one of the components of the electronic device 101 (eg, the display module 160, the sensor module 176, or the communication module 190) It is possible to control at least some of the related functions or states. According to one embodiment, the auxiliary processor 123 (eg, an image signal processor or a communication processor) may be implemented as part of other functionally related components (eg, the camera module 180 or the communication module 190). there is. According to an embodiment, the auxiliary processor 123 (eg, a neural network processing device) may include a hardware structure specialized for processing an artificial intelligence model. AI models can be created through machine learning. Such learning may be performed, for example, in the electronic device 101 itself where the artificial intelligence model is performed, or may be performed through a separate server (eg, the server 108). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning or reinforcement learning, but in the above example Not limited. The artificial intelligence model may include a plurality of artificial neural network layers. Artificial neural networks include deep neural networks (DNNs), convolutional neural networks (CNNs), recurrent neural networks (RNNs), restricted boltzmann machines (RBMs), deep belief networks (DBNs), bidirectional recurrent deep neural networks (BRDNNs), It may be one of deep Q-networks or a combination of two or more of the foregoing, but is not limited to the foregoing examples. The artificial intelligence model may include, in addition or alternatively, software structures in addition to hardware structures.

The memory 130 may store various data used by at least one component (eg, the processor 120 or the sensor module 176) of the electronic device 101 . The data may include, for example, input data or output data for software (eg, program 140) and commands related thereto. The memory 130 may include volatile memory 132 or non-volatile memory 134 .

The program 140 may be stored as software in the memory 130 and may include, for example, an operating system 142 , middleware 144 , or an application 146 .

The input module 150 may receive a command or data to be used by a component (eg, the processor 120) of the electronic device 101 from the outside of the electronic device 101 (eg, a user). The input module 150 may include, for example, a microphone, a mouse, a keyboard, a key (eg, a button), or a digital pen (eg, a stylus pen).

The sound output module 155 may output sound signals to the outside of the electronic device 101 . The sound output module 155 may include, for example, a speaker or a receiver. The speaker can be used for general purposes such as multimedia playback or recording playback. A receiver may be used to receive an incoming call. According to one embodiment, the receiver may be implemented separately from the speaker or as part of it.

The display module 160 may visually provide information to the outside of the electronic device 101 (eg, a user). The display module 160 may include, for example, a display, a hologram device, or a projector and a control circuit for controlling the device. According to an embodiment, the display module 160 may include a touch sensor configured to detect a touch or a pressure sensor configured to measure the intensity of force generated by the touch.

The audio module 170 may convert sound into an electrical signal or vice versa. According to an embodiment, the audio module 170 acquires sound through the input module 150, the sound output module 155, or an external electronic device connected directly or wirelessly to the electronic device 101 (eg: Sound may be output through the electronic device 102 (eg, a speaker or a headphone).

The sensor module 176 detects an operating state (eg, power or temperature) of the electronic device 101 or an external environmental state (eg, a user state), and generates an electrical signal or data value corresponding to the detected state. can do. According to one embodiment, the sensor module 176 may include, for example, a gesture sensor, a gyro sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a bio sensor, It may include a temperature sensor, humidity sensor, or light sensor.

The interface 177 may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device 101 to an external electronic device (eg, the electronic device 102). According to one embodiment, the interface 177 may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

The connection terminal 178 may include a connector through which the electronic device 101 may be physically connected to an external electronic device (eg, the electronic device 102). According to one embodiment, the connection terminal 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (eg, a headphone connector).

The haptic module 179 may convert electrical signals into mechanical stimuli (eg, vibration or motion) or electrical stimuli that a user may perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

The camera module 180 may capture still images and moving images. According to one embodiment, the camera module 180 may include one or more lenses, image sensors, image signal processors, or flashes.

The power management module 188 may manage power supplied to the electronic device 101 . According to one embodiment, the power management module 188 may be implemented as at least part of a power management integrated circuit (PMIC), for example.

The battery 189 may supply power to at least one component of the electronic device 101 . According to one embodiment, the battery 189 may include, for example, a non-rechargeable primary cell, a rechargeable secondary cell, or a fuel cell.

The communication module 190 is a direct (eg, wired) communication channel or a wireless communication channel between the electronic device 101 and an external electronic device (eg, the electronic device 102, the electronic device 104, or the server 108). Establishment and communication through the established communication channel may be supported. The communication module 190 may include one or more communication processors that operate independently of the processor 120 (eg, an application processor) and support direct (eg, wired) communication or wireless communication. According to one embodiment, the communication module 190 may be a wireless communication module 192 (eg, a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 194 (eg, a : a local area network (LAN) communication module or a power line communication module). Among these communication modules, a corresponding communication module is a first network 198 (eg, a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network 199 (eg, a legacy communication module). It may communicate with the external electronic device 104 through a cellular network, a 5G network, a next-generation communication network, the Internet, or a telecommunications network such as a computer network (eg, a LAN or a WAN). These various types of communication modules may be integrated as one component (eg, a single chip) or implemented as a plurality of separate components (eg, multiple chips). The wireless communication module 192 uses subscriber information (eg, International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module 196 within a communication network such as the first network 198 or the second network 199. The electronic device 101 may be identified or authenticated.

The wireless communication module 192 may support a 5G network after a 4G network and a next-generation communication technology, for example, NR access technology (new radio access technology). NR access technologies include high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and access of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low latency (URLLC)). -latency communications)) can be supported. The wireless communication module 192 may support a high frequency band (eg, mmWave band) to achieve a high data rate, for example. The wireless communication module 192 uses various technologies for securing performance in a high frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), and full-dimensional multiplexing. Technologies such as input/output (FD-MIMO: full dimensional MIMO), array antenna, analog beam-forming, or large scale antenna may be supported. The wireless communication module 192 may support various requirements defined for the electronic device 101, an external electronic device (eg, the electronic device 104), or a network system (eg, the second network 199). According to one embodiment, the wireless communication module 192 may be used to realize peak data rate (eg, 20 Gbps or more) for realizing eMBB, loss coverage (eg, 164 dB or less) for realizing mMTC, or U-plane latency (for realizing URLLC). Example: downlink (DL) and uplink (UL) each of 0.5 ms or less, or round trip 1 ms or less) may be supported.

The antenna module 197 may transmit or receive signals or power to the outside (eg, an external electronic device). According to an embodiment, the antenna module 197 may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (eg, PCB). According to one embodiment, the antenna module 197 may include a plurality of antennas (eg, an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network such as the first network 198 or the second network 199 is selected from the plurality of antennas by the communication module 190, for example. can be chosen A signal or power may be transmitted or received between the communication module 190 and an external electronic device through the selected at least one antenna. According to some embodiments, other components (eg, a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module 197 in addition to the radiator.

According to various embodiments, the antenna module 197 may form a mmWave antenna module. According to one embodiment, the mmWave antenna module includes a printed circuit board, an RFIC disposed on or adjacent to a first surface (eg, a bottom surface) of the printed circuit board and capable of supporting a designated high frequency band (eg, mmWave band); and a plurality of antennas (eg, array antennas) disposed on or adjacent to a second surface (eg, a top surface or a side surface) of the printed circuit board and capable of transmitting or receiving signals of the designated high frequency band. can do.

At least some of the components are connected to each other through a communication method between peripheral devices (eg, a bus, general purpose input and output (GPIO), serial peripheral interface (SPI), or mobile industry processor interface (MIPI)) and signal ( e.g. commands or data) can be exchanged with each other.

According to an embodiment, commands or data may be transmitted or received between the electronic device 101 and the external electronic device 104 through the server 108 connected to the second network 199 . Each of the external electronic devices 102 or 104 may be the same as or different from the electronic device 101 . According to an embodiment, all or part of operations executed in the electronic device 101 may be executed in one or more external electronic devices among the external electronic devices 102 , 104 , and 108 . For example, when the electronic device 101 needs to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device 101 instead of executing the function or service by itself. Alternatively or additionally, one or more external electronic devices may be requested to perform the function or at least part of the service. One or more external electronic devices receiving the request may execute at least a part of the requested function or service or an additional function or service related to the request, and deliver the execution result to the electronic device 101 . The electronic device 101 may provide the result as at least part of a response to the request as it is or additionally processed. To this end, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device 101 may provide an ultra-low latency service using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device 104 may include an internet of things (IoT) device. Server 108 may be an intelligent server using machine learning and/or neural networks. According to one embodiment, the external electronic device 104 or server 108 may be included in the second network 199 . The electronic device 101 may be applied to intelligent services (eg, smart home, smart city, smart car, or health care) based on 5G communication technology and IoT-related technology.

2 is a diagram for explaining an electronic device and an M.2 module connected to the electronic device according to an embodiment of the present invention.

Referring to FIG. 2 , an electronic device 210 (eg, the electronic device 101 of FIG. 1 ) includes a processor 211 (eg, the processor 120 of FIG. 1 ), a power supply module 212 (eg, the electronic device 101 of FIG. 1 ). 1 power management module 188), a first memory 213 (eg, non-volatile memory 134 of FIG. 1), a second memory 214 (eg, volatile memory 132 of FIG. 1), a connector 215 (eg, connection terminal 178 of FIG. 1) and a communication module 216 (eg, communication module 190 of FIG. 1). However, the configuration of the electronic device 210 is not limited thereto. According to various embodiments, the electronic device 210 may omit at least one of the above-described components and may further include at least one other component. For example, the electronic device 210 may omit the communication module 216 . As another example, the electronic device 210 may further include several devices 217 such as an audio module, a display, an input module, or an input/output device.

The processor 211 may control at least one component of the electronic device 210 and may perform various data processing or calculations. According to one embodiment, the processor 211 stores commands or data received from other components in the second memory 214, processes the commands or data stored in the second memory 214, and results Data may be stored in the first memory 213 . In addition, the processor 211 may perform a function related to connection of the M.2 module 230 mounted on the connector 215 by executing a command stored in the second memory 214 .

According to an embodiment, when the processor 211 is connected to the M.2 module 230, a signal (power control signal) 261 for controlling the power of the M.2 module 230, the M. 2 Signal for controlling reset of module 230 (reset control signal) 262, USB signal 271, PCIe control signal 281, 282, 283, PCIe Tx/Rx/clock signal 284, 285, 286 ), and GPIO signal 287 through at least one of the M.2 module 230 and can perform various operations, including communication.

According to an embodiment, the processor 211 may transmit a signal to the processor 231 of the M.2 module 230 through a PCIe bus to identify whether the M.2 module 230 is mounted. there is. For example, the processor 211 receives a signal through an input/output terminal connected to an input/output terminal corresponding to the PCIe bus of the M.2 module 230 (eg, a PCIe Tx/Rx/clock signal (284, 285, 286) )), it is possible to identify whether the M.2 module 230 is mounted.

According to an embodiment, the processor 211 applies a power control signal 261 and a reset control signal 262 to the M.2 module 230 when the M.2 module 230 is mounted. (e.g. 'High' signal transmission). In addition, the processor 211 may communicate with the processor 231 of the M.2 module 230 to initialize the connection with the M.2 module 230. For example, the processor 211 may set a parameter value for PCIe bus communication with the processor 231 of the M.2 module 230.

According to one embodiment, the processor 211 sends a power control signal 261 and a reset control signal 262 to the M.2 module 230 when the M.2 module 230 is not installed. It can be unapproved (e.g. 'Low' signal transmission). Also, the processor 211 may isolate at least one signal line among signal lines connected to the connector 215 . For example, the processor 211 may isolate the PCIe signal lines and the GPIO signal line except for the USB signal line by setting them to a high impedance (Hi-Z) state. Accordingly, when power is applied to the processor 211 and the M.2 module 230 is mounted on the connector 215 during operation, the signal lines connected to the connector 215 are set to output. Malfunction and damage due to possible leakage can be prevented.

According to one embodiment, when power is applied to the processor 211 and the M.2 module 230 is mounted on the connector 215 while performing an operation, the M.2 module 230 receives a power control signal ( 261) and the reset control signal 262 may be applied (eg, 'High' signal transmission). Also, the processor 211 may release at least one isolated signal line from among signal lines connected to the connector 215 . For example, the processor 211 may release the isolated PCIe signal lines and GPIO signal lines from a high impedance state, and set a corresponding pin state so that each signal line can perform a predefined function. The state of the pin may include, for example, input, output, or bi-direction. In addition, the processor 211 may communicate with the processor 231 of the M.2 module 230 to initialize the connection with the M.2 module 230. For example, the processor 211 may set parameter values for PCIe bus communication with the processor 231 of the M.2 module 230 . Accordingly, when power is applied to the processor 211 and the M.2 module 230 is mounted on the connector 215 while performing an operation, the M.2 module 230 operates through the hot plug-in function described above. can normally be recognized, and the normal operation of the M.2 module 230 can be supported.

The power supply module 212 may supply 251 power to the electronic device 210 . For example, the power supply module 212 may supply 251 power to at least one component included in the electronic device 210 (eg, the processor 211). In addition, when an external device (eg, the M.2 module 230) is mounted on the connector 215, the power supply module 212 may supply power to the external device (252). For example, when an external device (eg, M.2 module 230) is mounted on the connector 215, the power supply module 212 may be configured to supply power to the external device (eg, the power supply module 232). )) can be supplied with power (252).

The first memory 213 and the second memory 214 may store various data used by at least one component of the electronic device 210 . According to an embodiment, the first memory 213 and the second memory 214 may store commands and data related to connection of the M.2 module 230 . The first memory 213 may include a non-volatile memory. According to an embodiment, the first memory 213 may store codes and files related to an operating system. The second memory 214 may include a volatile memory. According to an embodiment, the second memory 214 may store codes, applications, various states, and contexts related to an operating system after a booting procedure of the electronic device 210 .

The connector 215 may support an external electronic device (eg, the M.2 module 230) to be connected to the electronic device 210. For example, the external electronic device may be mounted on the connector 215 and connected to the electronic device 210 . The connector 215 may include an M.2 slot into which the M.2 module 230 may be mounted.

The communication module 216 may support communication between the electronic device 210 and an external electronic device. For example, the communication module 216 may establish wired or wireless communication with an external electronic device according to a prescribed communication protocol, and transmit/receive signals or data.

The M.2 module 230 includes a processor 231, a power supply module 232, a first memory 233, a second memory 234, a first circuit 235, a second circuit 236, 3 may include a circuit 237 and a communication module 239 . However, the configuration of the M.2 module 230 is not limited thereto. According to various embodiments, the M.2 module 230 may omit at least one of the above-described components and may further include at least one other component. For example, the M.2 module 230 may omit the communication module 239.

The processor 231 may control at least one component of the M.2 module 230 and may perform various data processing or operations. According to one embodiment, the processor 231 stores commands or data received from other components in the second memory 234, processes the commands or data stored in the second memory 234, and results Data may be stored in the first memory 233 . In addition, the processor 231 executes a command stored in the second memory 234, so that when the M.2 module 230 is mounted on the connector 215 of the electronic device 210, the electronic device It can perform functions related to connection with (210).

According to an embodiment, the processor 231 receives a power control signal 261 from the processor 211 of the electronic device 210 when the M.2 module 230 is connected to the electronic device 210. By receiving, power on operation and power off operation may be performed. Also, upon receiving the power control signal 261 and the reset control signal 262 from the processor 211 of the electronic device 210, the processor 231 may perform a power-on operation and an initialization operation. Also, when the M.2 module 230 is connected to the electronic device 210, the processor 231 supplies power to the M.2 module 230 from the processor 211 of the electronic device 210. A controlling signal (power control signal) 261, a signal controlling reset of the M.2 module 230 (reset control signal) 262, a USB signal 271, and a PCIe control signal 281, 282, 283 ), PCIe Tx/Rx/clock signals 284, 285, and 286, and GPIO signal 287 to perform communication with the electronic device 210.

The power supply module 232 may supply 253 power to the M.2 module 230 . For example, the power supply module 232 may supply 253 power to at least one component included in the M.2 module 230 (eg, the processor 231).

The first memory 233 and the second memory 234 may store various data used by at least one component of the M.2 module 230 . According to an embodiment, the first memory 233 and the second memory 234 may store commands and data related to connection of the electronic device 210 . The first memory 233 may include a non-volatile memory. According to one embodiment, the first memory 233 may store codes related to an operating system. The second memory 234 may include a volatile memory. According to one embodiment, the second memory 234 may store codes, applications, and various states and contexts related to an operating system after a booting procedure of the M.2 module 230 .

When the M.2 module 230 is mounted on the connector 215, the first circuit 235 receives a power control signal 261 received from the processor 211 of the electronic device 210 and the electronic device The power output signal 254 received from the power supply module 212 of 210 may be received as input signals, and the power control signal 261-1 may be transmitted to the processor 231 as an output signal. The first circuit 235 may include an OR circuit (eg, OR gate) outputting a 'High' signal when at least one of the input signals is a 'High' signal (a signal corresponding to a '1' value). can Accordingly, the first circuit 235 operates when the M.2 module 230 is mounted on the connector 215 and the power output 252 is generated from the power supply module 212 of the electronic device 210. , the power output signal 254, which is a 'High' signal, may be input, and a 'High' signal may be output. In addition, the output 'High' signal is input to the power supply module 232, so that the power supply module 232 can supply power to the M.2 module 230 (253).

The second circuit 236 may receive power from the power supply module 232 to generate a reset signal 262 - 2 and transmit it to the third circuit 237 . The reset signal 262-2 input to the third circuit 237 is a 'Low' signal (a signal corresponding to a '0' value), and when released after a certain period of time, a 'High' signal (or a release signal) ) (signal corresponding to '1' value). According to one embodiment, the second circuit 236 may include an RC circuit including at least one capacitor and at least one resistor.

The third circuit 237 receives the reset control signals 262 and 262-1 generated from the processor 211 of the electronic device 210 and the reset signal 262-2 generated from the second circuit 236. (and a release signal) may be received as input signals, and the reset control signal 262-3 may be transferred to the processor 231 as an output signal. According to an embodiment, the signal line through which the reset control signals 262 and 262-1 generated by the processor 211 of the electronic device 210 are connected to the input terminal of the third circuit 237 is the power supply module 232 ) may be connected to the resistor 238 connected to the output terminal. The third circuit 237 may include a AND circuit (eg, AND gate) that outputs a 'High' signal when all of the input signals are 'High' signals. Accordingly, the third circuit 237 receives the reset control signals 262 and 262-1 generated from the processor 211 of the electronic device 210 or the reset signal 262 generated from the second circuit 236. If -2) is a 'Low' signal, a 'Low' signal can be output. When a 'Low' signal is output from the third circuit 237, the processor 231 may be reset and initialized. In addition, the third circuit 237 includes the reset control signals 262 and 262-1 generated by the processor 211 of the electronic device 210 and the reset signal 262-1 generated by the second circuit 236. If 2) (or the release signal) is a 'High' signal, a 'High' signal can be output. When a 'High' signal is output from the third circuit 237, the processor 231 may perform a booting procedure using the code stored in the first memory 233 and the second memory 234.

According to an embodiment, the processor 231 generates a branched signal 261- before the power control signal 261 generated from the processor 211 of the electronic device 210 is input to the first circuit 235. 2) can be received. The branched signal 261-2 indicates whether the power control signal 261-1 output from the first circuit 235 is a power control signal by the processor 211 of the electronic device 210 (the first It may be used to identify whether the power control signal 261 - 1 output from the circuit 235 corresponds to the power control signal 261 generated from the processor 211 of the electronic device 210 . For example, the processor 231 receives a 'High' signal from the first circuit 235, and when the branched signal 261-2 is a 'High' signal, from the first circuit 235 It can be identified that the output power control signal 261-1 is a power control signal by the processor 211 of the electronic device 210. As another example, the processor 231 receives a 'High' signal from the first circuit 235, and when the branched signal 261-2 is a 'Low' signal, from the first circuit 235 It may be identified that the output power control signal 261 - 1 is not a power control signal by the processor 211 of the electronic device 210 .

According to one embodiment, the processor 231 determines that the power control signal 261-1 output from the first circuit 235 is a power control signal by the processor 211 of the electronic device 210 ( When the power control signal 261-1 output from the first circuit 235 is identified as one corresponding to the power control signal 261 generated from the processor 211 of the electronic device 210), the electronic device 210 Communication with the processor 211 of the device 210 may be continuously performed. For example, if the power control signal 261-1 output from the first circuit 235 is identified as being a power control signal by the processor 211 of the electronic device 210, the electronic device 210 It may mean that the M.2 module 230 was already mounted on the connector 215 before power was applied to the processor 211 of ).

According to an embodiment, the processor 231 determines that the power control signal 261-1 output from the first circuit 235 is not a power control signal by the processor 211 of the electronic device 210. If it is identified as (the power control signal 261-1 output from the first circuit 235 does not correspond to the power control signal 261 generated from the processor 211 of the electronic device 210), A connection request signal may be transmitted to the processor 211 of the electronic device 210 through a USB signal line among signal lines of the M.2 module 230 . For example, the processor 231 may request an attachment to the processor 211 of the electronic device 210 using a USB standard protocol related to hot plug-in. Also, when the processor 231 is attached to the processor 211 of the electronic device 210, it can communicate with the processor 211 of the electronic device 210 through a USB signal line. At this time, as described above, among the signal lines of the processor 211 of the electronic device 210 connected to the connector 215, PCIe signal lines and GPIO signal lines excluding the USB signal line may be in an isolated state.

According to an embodiment, when the processor 231 receives a response signal to the connection request signal from the processor 211 of the electronic device 210, the processor 231 is the processor of the electronic device 210. Initialization of the connection with (211) can be performed. For example, the processor 231 may set parameter values for PCIe bus communication with the processor 211 of the electronic device 210 . At this time, as described above, the isolated PCIe signal lines and GPIO signal lines among the signal lines of the processor 211 of the electronic device 210 connected to the connector 215 can be released. According to an embodiment, the processor 231 may receive a power control signal 261 and a reset control signal 262 from the processor 211 of the electronic device 210 as the response signals. At this time, the power control signal 261 may be used as an input signal of the first circuit 235, and the reset control signal 262 may be used as an input signal of the third circuit 237.

According to an embodiment, the processor 231 may perform a power saving function when not receiving a response signal to the connection request signal from the processor 211 of the electronic device 210 within a specified time. For example, if the processor 231 does not receive a response signal to the connection request signal from the processor 211 of the electronic device 210 within a specified time, the electronic device 210 is not in a power-on state. and can perform a power saving function. The power saving function may mean, for example, that the processor 231 enters a deep power saving mode and ends all operations.

As described above, according to various embodiments, an electronic device (eg, the electronic device 210 of FIG. 2 ) connected to a connector (eg, the connector 215 of FIG. 2 M.2 module 230), a power supply module (eg, power supply module 232 of FIG. 2), a processor (eg, processor 231 of FIG. 2), and the electronic device are mounted on the connector. In this state, a first signal related to power control of the electronic device generated by the processor of the external electronic device (eg, the power control signal 261 of FIG. 2) and a second signal output from the power supply module (eg, : A first circuit that receives the power output signal 254 of FIG. 2 ) and transfers a third signal related to power control of the electronic device (eg, the power control signal 261-1 of FIG. 2 ) to the processor. (eg, the first circuit 235 of FIG. 2) receives power from the power supply module and generates a fourth signal (eg, the reset signal 261-2 of FIG. 2) related to the reset of the electronic device. A second circuit (eg, the second circuit 236 of FIG. 2 ), and the fourth signal generated in the second circuit and the fifth signal related to the reset of the electronic device generated by the processor of the external electronic device ( Example: Receives the reset control signals 262 and 262-1 of FIG. 2, and transfers a sixth signal related to the reset of the electronic device (eg, the reset control signal 262-3 of FIG. 2) to the processor. It may include a third circuit (eg, the third circuit 237 of FIG. 2 )

According to various embodiments, the first circuit includes an OR circuit (eg, an OR gate) having the first signal and the second signal as inputs and the third signal as an output, and the third circuit includes the A logical product circuit (eg, an AND gate) having the fourth signal and the fifth signal as inputs and the sixth signal as an output may be included.

According to various embodiments, the processor receives a branched seventh signal (eg, the branched signal 261-2 of FIG. 2) before the first signal is input to the first circuit, and the received Based on the seventh signal, it may be determined whether the third signal corresponds to the first signal.

According to various embodiments, based on the determination that the third signal does not correspond to the first signal, the processor is connected to the processor of the external electronic device through a USB signal line among signal lines of the processor connected to the connector. An eighth signal related to the connection request may be transmitted.

According to various embodiments, when receiving a response signal to the eighth signal from the processor of the external electronic device, the processor may set a parameter value for PCIe bus communication with the processor of the external electronic device.

According to various embodiments, the processor may perform a power saving function if the response signal is not received from the processor of the external electronic device within a specified time.

According to various embodiments, the processor may support an M.2 interface including a USB signal line, a PCIe signal line, and a GPIO signal line, and using PCIe as a bus interface.

As described above, according to various embodiments, an electronic device (eg, the electronic device 210 of FIG. 2 ) includes a power supply module (eg, the power supply module 212 of FIG. 2 ), an external electronic device (eg, the electronic device 210 of FIG. 2 ). A connector for connecting the M.2 module 230 of FIG. 2 (eg, connector 215 of FIG. 2 ) and a processor (eg, processor 211 of FIG. 2 ), the processor comprising: When power is applied from the power supply module, it is determined whether or not the external electronic device is mounted in the connector, and based on the determination that the external electronic device is mounted in the connector, a control related to power to the external electronic device is determined. 1 signal (eg, power control signal 261 of FIG. 2) and a second signal related to reset control (eg, reset control signal 262 of FIG. 2) are transmitted, and the external electronic device is mounted on the connector Based on the determination that it is not present, at least one signal line among signal lines connected to the connector may be isolated.

According to various embodiments, the processor transmits a third signal through an input/output terminal corresponding to a PCIe bus among input/output terminals connected to the connector, and based on a response result to the third signal, the processor transmits a third signal to the connector. It may be determined whether the external electronic device is mounted.

According to various embodiments, the at least one signal line includes PCIe signal lines and a GPIO signal line, and the processor sets the at least one signal line to a high impedance state to isolate it.

According to various embodiments, the processor, after the power is applied, the external electronic device is mounted on the connector, and a connection request is made from the external electronic device through a USB signal line among signal lines of the processor connected to the connector. When a third signal related to is received, a fourth signal related to power control to the external electronic device (eg, the power control signal 261 of FIG. 2) and a fifth signal related to reset control (eg, reset control of FIG. 2) A signal 262) may be transmitted, and at least one isolated signal line among signal lines connected to the connector may be released from isolation.

According to various embodiments, the at least one isolated signal line includes PCIe signal lines and a GPIO signal line, and the processor releases the isolated at least one signal line from a high impedance state to release the isolation, and the released isolation A state of a pin corresponding to the at least one signal line released from isolation may be set so that the at least one signal line performs a predefined function.

According to various embodiments, the connector (eg, the connector 711 of FIG. 7 ) is disposed in a slot shape on a main board in the electronic device (eg, the electronic device 710 of FIG. 7 ), and the external electronic device A device (eg, the M.2 module 730 of FIG. 7 ) is provided in the form of a card, and may be inserted into the connector and incorporated into the electronic device.

According to various embodiments, the connector (eg, the connector 811 of FIG. 8 or the connector 911 of FIG. 9 ) is the electronic device (eg, the electronic device 810 of FIG. 8 or the electronic device of FIG. 9 ( 910)), and the external electronic device (eg, the M.2 module 830 of FIG. 8 or the M.2 module 930 of FIG. 9) may be detachably connected to the connector.

According to various embodiments, the connector (eg, the connector 911 of FIG. 9 ) may include a high-speed PCIe port utilizing an HDMI port.

3 is a diagram for explaining a method of operating an electronic device depending on whether an M.2 module is mounted or not according to an embodiment of the present invention.

Referring to FIG. 3 , in operation 310, power may be applied to an electronic device (eg, the electronic device 210 of FIG. 2 ). For example, a battery may be installed in the electronic device and power may be applied. In addition, when power is applied to the electronic device, the power supply module (eg, the power supply module 212 of FIG. 2 ) of the electronic device supplies power to at least one component (eg, processor) included in the electronic device. can supply

In operation 320, the processor of the electronic device (eg, the processor 211 of FIG. 2) may perform booting. For example, when a power-on button disposed in the electronic device is pressed, the processor may perform booting. According to an embodiment, the processor stores code and files related to an operating system stored in a non-volatile memory (eg, the first memory 213 of FIG. 2 ) in random access memory (RAM) (eg, the second memory 213 of FIG. 2 ). 214) to proceed with the booting procedure.

In operation 330, the processor may determine whether an M.2 module (eg, the M.2 module 230 of FIG. 2 ) is mounted in a connector (eg, the connector 215 of FIG. 2 ) of the electronic device. there is. According to an embodiment, the processor may transmit a signal to the processor of the M.2 module (eg, the processor 231 of FIG. 2) through a PCIe bus to identify whether the M.2 module is mounted. . For example, the processor transmits signals through input/output terminals connected to input/output terminals corresponding to the PCIe bus of the M.2 module (eg, PCIe Tx/Rx/clock signals 284, 285, and 286 of FIG. 2). It can be used to identify whether the M.2 module is mounted.

When it is determined that the M.2 module is mounted (operation 330 - yes), in operation 340, the processor sends a power control signal (eg, power control signal 261 of FIG. 2) and reset to the M.2 module. A control signal (eg, the reset control signal 262 of FIG. 2 ) may be applied (eg, 'High' signal transmission). In operation 350, the processor may communicate with the processor of the M.2 module to initialize the connection with the M.2 module. For example, the processor may set parameter values for PCIe bus communication with the processor of the M.2 module.

When it is determined that the M.2 module is not mounted (operation 330 - No), in operation 380, the processor does not apply the power control signal and the reset control signal to the M.2 module (eg, 'Low'). signal transmission). Also, in operation 390, the processor may isolate at least one signal line from among signal lines connected to the connector. For example, the processor may isolate the PCIe signal lines and the GPIO signal line except for the USB signal line by setting them to a high impedance state. Accordingly, the processor prevents malfunction and damage due to leakage that may occur when the signal lines connected to the connector are set to output when the M.2 module is mounted on the connector while power is applied and the operation is performed. can do.

After performing the operation 350 or the operation 390, in operation 360, the processor may boot according to the operating system. For example, the processor may perform a booting procedure using code related to an operating system stored in the RAM.

After the booting procedure, in operation 370, the processor may perform a function. For example, in a state in which the M.2 module is not recognized (a state in which the M.2 module is not mounted on the connector, a state in which operations 380 and 390 have been performed), the processor through the M.2 module It can perform functions other than functions. As another example, the processor performs functions through the M.2 module in a state in which the M.2 module is recognized (a state in which the M.2 module is mounted on the connector, a state in which operations 340 and 350 are performed). functions can be performed, including

4 is a diagram for explaining a method of operating an electronic device when an M.2 module is mounted after power is applied to the electronic device according to an embodiment of the present invention. The operations of FIG. 4 may represent operations performed when the M.2 module is mounted to the connector of the electronic device after at least operations 380 and 390 of the operations of FIG. 3 are performed.

Referring to FIG. 4 , in operation 410, a processor (eg, processor 211 of FIG. 2 ) of an electronic device (eg, electronic device 210 of FIG. 2 ) performs an M.2 module (eg, M. 2 module 230) can receive a connection request signal through the USB signal line of the M.2 module. For example, when the M.2 module is mounted on a connector (eg, connector 215 of FIG. 2) of the electronic device while power is applied to the processor and the processor is performing an operation, the M.2 module is connected through a USB signal line. The connection request signal may be received. The connection request signal through the USB signal line may be an attach request signal using a USB standard protocol related to hot plug-in.

In operation 420, the processor applies a power control signal (eg, power control signal 261 of FIG. 2 ) and a reset control signal (eg, reset control signal 262 of FIG. 2 ) to the M.2 module (eg, : 'High' signal can be transmitted). According to an embodiment, the power control signal and the reset control signal may be response signals to the connection request signal.

In operation 430, the processor may release at least one isolated signal line from among the signal lines connected to the connector. For example, the processor may release the isolated PCIe signal lines and the GPIO signal line from a high impedance state and set a state of a pin corresponding to each signal line to perform a predefined function. The state of the pin may include, for example, input, output, or bi-direction.

In operation 440, the processor may communicate with a processor of the M.2 module (eg, the processor 231 of FIG. 2) to initialize a connection with the M.2 module. For example, the processor may set parameter values for PCIe bus communication with the processor of the M.2 module. Accordingly, when power is applied to the processor and the M.2 module is mounted in the connector during operation, the processor can normally recognize the M.2 module through the hot plug-in function described above, and the M.2 module can support the normal operation of

At operation 450, the processor may perform functions via the M.2 module. For example, the processor may perform a function including a function through the M.2 module in a state in which the M.2 module is recognized.

5 is a diagram for explaining a method of operating an M.2 module according to an embodiment of the present invention.

Referring to FIG. 5 , in operation 510, power may be applied to the M.2 module (eg, the M.2 module 230 of FIG. 2). For example, in a state in which the M.2 module is mounted on a connector (eg, connector 215 of FIG. 2 ) of an electronic device (eg, electronic device 210 of FIG. 2 ), a power supply module of the electronic device (eg, the power supply module 212 of FIG. 2 ) may supply power to the power supply module (eg, the power supply module 232 of FIG. 2 ) of the M.2 module.

According to an embodiment, the first circuit included in the M.2 module (eg, the first circuit 235 of FIG. 2 ) is a processor of the electronic device while the M.2 module is mounted on the connector. (eg, the power control signal received from the processor 211 of FIG. 2) (eg, the power control signal 261 of FIG. 2) and the power output signal received from the power supply module of the electronic device (eg, the power control signal 261 of FIG. 2) The power output signal 254) is received as input signals, and a power control signal (eg, the power control signal in FIG. 2 (eg, the processor 231 in FIG. 261-1)). The first circuit may include an OR circuit (eg, an OR gate) outputting a 'High' signal when at least one of the input signals is a 'High' signal. Accordingly, the first circuit outputs 'High' when a power output (eg, the power output 252 of FIG. 2 ) is generated from the power supply module of the electronic device while the M.2 module is mounted on the connector. ' signal, the power output signal may be input, and a 'High' signal may be output. In addition, the output 'High' signal is input to the power supply module of the M.2 module, so that the power supply module of the M.2 module can supply power to the M.2 module.

At operation 520, a second circuit included in the M.2 module (eg, second circuit 236 of FIG. 2 ) may generate a reset signal (eg, reset signal 262-2 of FIG. 2 ). . For example, the second circuit receives power from the power supply module of the M.2 module and generates the reset signal to generate the third circuit included in the M.2 module (e.g., the third circuit of FIG. 2 ( 237)). The reset signal input to the third circuit is a 'Low' signal and can be converted to a 'High' signal (or release signal) when released after a certain period of time. According to one embodiment, the second circuit may include an RC circuit including at least one capacitor and at least one resistor.

In operation 530, the processor may perform booting. For example, the processor may perform a booting procedure using codes stored in a non-volatile memory (eg, first memory 233 of FIG. 2 ) and RAM (eg, second memory 234 of FIG. 2 ). .

According to an embodiment, the third circuit includes a reset control signal generated by a processor of the electronic device (eg, the reset control signals 262 and 262-1 of FIG. 2 ) and the reset signal generated by the second circuit. (and a release signal) may be received as input signals, and a reset control signal (eg, the reset control signal 262-3 of FIG. 2) may be transferred to the processor as an output signal. According to an embodiment, the signal line through which the reset control signal generated by the processor of the electronic device is connected to the input terminal of the third circuit is a resistive element connected to the output terminal of the power supply module of the M.2 module (eg, shown in FIG. 2). resistance element 238). The third circuit may include a AND circuit (eg, AND gate) outputting a 'High' signal when all of the input signals are 'High' signals. Accordingly, the third circuit may output a 'Low' signal when the reset control signal generated by the processor of the electronic device or the reset signal generated by the second circuit is a 'Low' signal. When a 'Low' signal is output from the third circuit, the processor may be reset and initialized. Also, the third circuit may output a 'High' signal when the reset control signal generated by the processor of the electronic device and the reset signal (or release signal) generated by the second circuit are 'High' signals. When a 'High' signal is output from the third circuit, the processor may perform booting.

In operation 540, the processor may determine whether the power control signal output from the first circuit (the power control signal input to the processor) is received from the host device (the electronic device). According to an embodiment, the processor receives a branched signal (eg, the branched signal 261-2 of FIG. 2) before the power control signal generated by the processor of the electronic device is input to the first circuit. can The branched signal may be used to identify whether the power control signal output from the first circuit is a power control signal by a processor of the electronic device (whether the power control signal is received from the host device). For example, the processor receives a 'High' signal from the first circuit, and when the branched signal is a 'High' signal, the power control signal output from the first circuit is power by the processor of the electronic device. It can be identified as being a control signal. As another example, the processor receives a 'High' signal from the first circuit, and when the branched signal is a 'Low' signal, the power control signal output from the first circuit is power by the processor of the electronic device. It can be identified as not being a control signal.

When it is determined that the power control signal output from the first circuit is received from the host device (the power control signal is identified as a power control signal by the processor of the electronic device) (operation 540 - Yes), the processor in operation 550 may continue to communicate with the host device. For example, the fact that the power control signal output from the first circuit is identified as being the power control signal by the processor of the electronic device means that the M.2 module has already applied the power to the processor of the electronic device. It may mean that it was mounted on a connector of an electronic device.

If it is determined that the power control signal output from the first circuit is not received from the host device (identifying that the power control signal is not a power control signal by the processor of the electronic device) (operation 540 - No), in operation 560 The processor may transmit a connection request signal to the processor of the electronic device through a USB signal line among signal lines of the M.2 module. For example, the processor may request an attachment to the processor of the electronic device using a USB standard protocol related to hot plug-in. Also, when the processor is attached to the processor of the electronic device, it may communicate with the processor of the electronic device through a USB signal line. At this time, among the signal lines of the processor of the electronic device connected to the connector of the electronic device, PCIe signal lines and GPIO signal lines excluding the USB signal line may be in an isolated state.

In operation 570, the processor may determine whether a response signal to the connection request signal is received from the host device. According to an embodiment, the processor may determine whether the response signal is received within a specified time after transmitting the connection request signal to the host device.

When receiving the response signal from the host device (within the specified time period) (operation 570 - Yes), in operation 580, the processor may initialize a connection with the host device. For example, the processor may set parameter values for PCIe bus communication with the processor of the electronic device. At this time, isolated PCIe signal lines and GPIO signal lines among the signal lines of the processor of the electronic device connected to the connector of the electronic device may be released. According to an embodiment, the processor uses a power control signal (eg, the power control signal 261 of FIG. 2 ) and a reset control signal (eg, the reset control signal (eg, the reset control signal of FIG. 2 ) from the processor of the electronic device as the response signal. 262)) can be received. In this case, the power control signal may be used as an input signal of the first circuit, and the reset control signal may be used as an input signal of the third circuit.

In operation 590, the processor may perform a function set in the M.2 module. For example, the processor may perform a communication function or a storage function in association with the processor of the electronic device.

If the response signal is not received from the host device (within the specified time) (operation 570 - No), in operation 591, the processor may perform a power saving function. For example, if the processor does not receive a response signal to the connection request signal from the processor of the electronic device within the specified time, the processor may identify the electronic device as not being powered on and perform a power saving function. . The power saving function may mean, for example, that the processor enters a deep power saving mode and ends all operations.

6 is a diagram for explaining a device state in a connection process between a host device and an M.2 module according to an embodiment of the present invention.

Referring to FIG. 6 , when power is applied to a host device (eg, the electronic device 210 of FIG. 2 ), the host device may enter a power-on state as in the first state 610 . For example, a battery may be installed in the host device and power may be applied. In addition, when power is applied to the host device, the power supply module (eg, the power supply module 212 of FIG. 2 ) of the host device supplies power to at least one component (eg, processor) included in the host device. can supply Also, the processor of the host device (eg, the processor 211 of FIG. 2 ) may perform booting. For example, when a power-on button disposed in the host device is pressed, the processor of the host device may boot.

The processor of the host device may determine whether an M.2 module (eg, M.2 module 230 of FIG. 2 ) is mounted in a connector (eg, connector 215 of FIG. 2 ) of the host device. . According to an embodiment, the processor of the host device transmits a signal to the processor of the M.2 module (eg, the processor 231 of FIG. 2) through a PCIe bus to identify whether the M.2 module is mounted. can do. For example, the processor of the host device receives a signal through an input/output terminal connected to an input/output terminal corresponding to the PCIe bus of the M.2 module (e.g., the PCIe Tx/Rx/clock signal 284, 285, 286 )) can be used to identify whether the M.2 module is installed.

When it is determined that the M.2 module is mounted, the processor of the host device sends a power control signal (eg, power control signal 261 of FIG. 2 ) and a reset control signal (eg, FIG. 2 ) to the M.2 module. A reset control signal 262 of 2 may be applied (eg, 'High' signal transmission). Also, the processor of the host device may communicate with the processor of the M.2 module to initialize the connection with the M.2 module. For example, the processor of the host device may set parameter values for PCIe bus communication with the processor of the M.2 module.

As in the second state 620, when it is determined that the M.2 module is not mounted, the processor of the host device does not apply the power control signal and the reset control signal to the M.2 module (eg: 'Low' signal transmission). Also, the processor of the host device may isolate at least one signal line from among signal lines connected to the connector of the host device. For example, the processor of the host device may isolate the PCIe signal lines and the GPIO signal line except for the USB signal line by setting them to a high impedance state.

Thereafter, the processor of the host device may perform booting according to the operating system. Also, as in the third state 630, the processor of the host device may perform functions other than functions through the M.2 module.

In the second state 620 (the M.2 module is not mounted on the connector of the host device or the M.2 module is not recognized), the M.2 module is attached to the connector of the host device. When mounted, as in the fourth state 640, the processor of the M.2 module may perform booting. For example, the power supply module of the host device may supply power to the power supply module of the M.2 module (eg, the power supply module 232 of FIG. 2), and the processor of the M.2 module may supply power to the power supply module of the M.2 module. Booting can be performed by receiving power from the power supply module of the M.2 module. In addition, the processor of the M.2 module can be connected to the processor of the host device through a USB signal line. For example, the processor of the M.2 module may transmit a connection request signal to the processor of the host device through the USB signal line, and the processor of the host device may transmit a response signal to the connection request signal to the M.2 module. It can be sent to the module's processor. The connection request signal through the USB signal line may be an attach request signal using a USB standard protocol related to hot plug-in.

Upon receiving the response signal, the processor of the M.2 module may initialize the M.2 module as in the fifth state 650. For example, the processor of the M.2 module may initialize the M.2 module using a power control signal and a reset control signal received from the processor of the host device. Also, the processor of the electronic device may release at least one isolated signal line from among signal lines connected to the connector of the host device. For example, the processor of the host device may release the isolated PCIe signal lines and GPIO signal lines from a high impedance state, and set a corresponding pin state so that each signal line may perform a predefined function. The state of the pin may include, for example, input, output, or bi-direction.

As in the sixth state 660, the processor of the M.2 module may be connected to the processor of the host device through a PCIe signal line. For example, the processor of the M.2 module may set parameter values for PCIe bus communication with the processor of the host device. In addition, the processor of the host device may also set parameter values for PCIe bus communication with the processor of the M.2 module. Accordingly, when power is applied to the processor of the host device and the M.2 module is mounted in the connector of the host device while performing an operation, the processor of the host device can normally recognize the M.2 module through the hot plug-in function described above. , can support the normal operation of the M.2 module.

Thereafter, the processor of the host device may perform functions, including functions through the M.2 module, as in the seventh state 670 .

As described above, according to various embodiments, in a method for connecting an external electronic device (eg, the M.2 module 230 of FIG. 2 ), power is applied to the electronic device (eg, the electronic device 210 of FIG. 2 ). If applied, an operation of determining whether the external electronic device is mounted on the connector of the electronic device (eg, the connector 215 of FIG. 2 ), based on the determination that the external electronic device is mounted on the connector, An operation of transmitting a first signal related to power control (eg, power control signal 261 of FIG. 2 ) and a second signal related to reset control (eg, reset control signal 262 of FIG. 2 ) to an external electronic device ( Example: operation 340 of FIG. 3), an operation of isolating at least one signal line among signal lines of a processor of the electronic device connected to the connector based on a determination that the external electronic device is not mounted on the connector (eg : Operation 390 of FIG. 3) may be included.

According to various embodiments, the operation of determining whether the external electronic device is mounted may include transmitting a third signal through an input/output terminal corresponding to a PCIe bus among input/output terminals of a processor of the electronic device connected to the connector. and an operation of determining whether the external electronic device is mounted in the connector based on a result of the response to the third signal.

According to various embodiments, the at least one signal line may include PCIe signal lines and a GPIO signal line, and the operation of isolating the at least one signal line may include setting the at least one signal line to a high impedance state. there is.

According to various embodiments, the method of connecting the external electronic device may include, when the external electronic device is mounted on the connector after power is applied to the electronic device, among signal lines of a processor of the electronic device connected to the connector. Receiving a third signal related to a connection request from the external electronic device through a USB signal line (eg, operation 410 of FIG. 4 ), in response to receiving the third signal, a third signal related to power control to the external electronic device 4 signals (eg, power control signal 261 of FIG. 2) and a fifth signal related to reset control (eg, reset control signal 262 of FIG. 2) (eg, operation 420 of FIG. 4), and The method may further include releasing the isolation of at least one isolated signal line among the signal lines of the processor of the electronic device connected to the connector (eg, operation 430 of FIG. 4 ).

According to various embodiments, the at least one isolated signal line includes PCIe signal lines and a GPIO signal line, and the operation of releasing the isolation of the at least one isolated signal line may cause the at least one isolated signal line to be in a high impedance state. An operation of releasing, and an operation of setting a state of a pin corresponding to the at least one isolated signal line so that the at least one isolated signal line performs a predefined function.

7 is a diagram for explaining an M.2 module embedded in an electronic device according to an embodiment of the present invention, and FIG. 8 is a diagram for explaining an external device including an M.2 module according to an embodiment of the present invention. FIG. 9 is a diagram for explaining another external device including an M.2 module according to an embodiment of the present invention.

Referring to FIGS. 7 to 9 , electronic devices 710 , 810 , and 910 (eg, the electronic device 210 of FIG. 2 ) are electronic devices 710 , 810 , and 910 for various types of data processing and communication support. An interface capable of supporting connection and communication with an external device as well as supporting connection and communication between components within may be provided. The interface includes physical connectors 711, 811, and 911 (eg, connectors of FIG. 215)). For example, the input/output terminals 731, 831, and 931 of the M.2 modules 730, 830, and 930 may be inserted into and connected to the connectors 711, 811, and 911.

In FIG. 7 , the connector 711 is disposed on a main board in the electronic device 710, and the M.2 module 730 is mounted to the connector 711 during the assembly process of the electronic device 710. It can indicate a case where it is provided in a built-in state. According to one embodiment, the M.2 module 730 may be provided in a card shape. Also, the connector 711 may be referred to as an M.2 slot disposed on the main board. According to an embodiment, the electronic device 710 may be a smartphone, a personal computer (PC), or a laptop.

In FIG. 8 , a case in which the M.2 module 830 is provided as a single device may be shown. For example, an external device including the M.2 module 830 may be inserted into and connected to a connector 811 exposed to the outside of the electronic device 810 . For example, an external device including the M.2 module 830 may be detachably connected to the connector 811 of the electronic device 810 . An external device including the M.2 module 830 may be referred to as, for example, a PCIe dongle, and the connector 811 may be referred to as a PCIe port. According to one embodiment, the electronic device 810 may be a vehicle to which a high-speed PCIe port is applied.

9 may also show a case in which the M.2 module 930 is provided as a single device. For example, an external device including the M.2 module 930 may be inserted into and connected to a connector 911 exposed to the outside of the electronic device 910 . For example, an external device including the M.2 module 930 may be detachably connected to the connector 911 of the electronic device 910 . An external device including the M.2 module 930 may be referred to as, for example, a PCIe dongle, and the connector 911 may be referred to as a PCIe port. According to one embodiment, the electronic device 910 may be a TV to which a high-speed PCIe port is applied. According to one embodiment, the connector 911 may be a high-speed PCIe port utilizing an HDMI port.

Electronic devices according to various embodiments disclosed in this document may be devices of various types. The electronic device may include, for example, a portable communication device (eg, a smart phone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a home appliance. An electronic device according to an embodiment of the present document is not limited to the aforementioned devices.

Various embodiments of this document and terms used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, like reference numerals may be used for like or related elements. The singular form of a noun corresponding to an item may include one item or a plurality of items, unless the relevant context clearly dictates otherwise. In this document, "A or B", "at least one of A and B", "at least one of A or B", "A, B or C", "at least one of A, B and C", and "A Each of the phrases such as "at least one of , B, or C" may include any one of the items listed together in that phrase, or all possible combinations thereof. Terms such as "first", "second", or "first" or "secondary" may simply be used to distinguish that component from other corresponding components, and may refer to that component in other respects (eg, importance or order) is not limited. A (eg, first) component is said to be “coupled” or “connected” to another (eg, second) component, with or without the terms “functionally” or “communicatively.” When mentioned, it means that the certain component may be connected to the other component directly (eg by wire), wirelessly, or through a third component.

The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and is interchangeable with terms such as, for example, logic, logical blocks, parts, or circuits. can be used as A module may be an integrally constructed component or a minimal unit of components or a portion thereof that performs one or more functions. For example, according to one embodiment, the module may be implemented in the form of an application-specific integrated circuit (ASIC).

Various embodiments of this document describe one or more stored in a storage medium (eg, internal memory 136 or external memory 138) readable by a machine (eg, electronic device 101). It may be implemented as software (eg, program 140) containing instructions. For example, a processor (eg, the processor 120 ) of a device (eg, the electronic device 101 ) may call at least one command among one or more instructions stored from a storage medium and execute it. This enables the device to be operated to perform at least one function according to the at least one command invoked. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The device-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' only means that the storage medium is a tangible device and does not contain a signal (e.g. electromagnetic wave), and this term refers to the case where data is stored semi-permanently in the storage medium. It does not discriminate when it is temporarily stored.

According to one embodiment, the method according to various embodiments disclosed in this document may be provided by being included in a computer program product. Computer program products may be traded between sellers and buyers as commodities. A computer program product is distributed in the form of a device-readable storage medium (eg compact disc read only memory (CD-ROM)), or through an application store (eg Play Store ^TM ) or on two user devices ( It can be distributed (eg downloaded or uploaded) online, directly between smart phones. In the case of online distribution, at least part of the computer program product may be temporarily stored or temporarily created in a device-readable storage medium such as a manufacturer's server, an application store server, or a relay server's memory.

According to various embodiments, each component (eg, module or program) of the above-described components may include a single object or a plurality of entities, and some of the plurality of entities may be separately disposed in other components. there is. According to various embodiments, one or more components or operations among the aforementioned corresponding components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (eg modules or programs) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by a corresponding component of the plurality of components prior to the integration. . According to various embodiments, the actions performed by a module, program, or other component are executed sequentially, in parallel, iteratively, or heuristically, or one or more of the actions are executed in a different order, or omitted. or one or more other actions may be added.

Claims (20)

An electronic device connected to a connector included in an external electronic device,
power supply module;
processor;
Receiving a first signal related to power control of the electronic device generated by a processor of the external electronic device and a second signal output from the power supply module while the electronic device is mounted on the connector, and sending the signal to the processor a first circuit transmitting a third signal related to power control of the electronic device;
a second circuit receiving power from the power supply module and generating a fourth signal related to the reset of the electronic device; and
Receives the fourth signal generated by the second circuit and a fifth signal related to the reset of the electronic device generated by the processor of the external electronic device, and transmits a sixth signal related to reset of the electronic device to the processor An electronic device including a third circuit that does. The method of claim 1,
The first circuit includes a OR circuit having the first signal and the second signal as inputs and the third signal as an output,
The electronic device of claim 1 , wherein the third circuit includes a AND circuit having the fourth signal and the fifth signal as inputs and the sixth signal as an output. The method of claim 1,
the processor,
receiving a seventh signal diverged before the first signal is input to the first circuit;
An electronic device configured to determine whether the third signal corresponds to the first signal based on the received seventh signal. The method of claim 3,
the processor,
Based on the determination that the third signal does not correspond to the first signal, transmit an eighth signal related to a connection request to the processor of the external electronic device through a USB signal line among signal lines of the processor connected to the connector. set electronics. The method of claim 4,
the processor,
The electronic device configured to set parameter values for PCIe bus communication with the processor of the external electronic device when receiving a response signal to the eighth signal from the processor of the external electronic device. The method of claim 5,
the processor,
An electronic device configured to perform a power saving function when the response signal is not received from a processor of the external electronic device within a specified time. The method of claim 1,
the processor,
An electronic device that includes a USB signal line, a PCIe signal line, and a GPIO signal line, and supports the M.2 interface using PCIe as a bus interface. In electronic devices,
power supply module;
Connectors for connecting external electronic devices; and
contains a processor;
the processor,
When power is applied from the power supply module, it is determined whether the external electronic device is mounted in the connector;
Transmitting a first signal related to power control and a second signal related to reset control to the external electronic device based on a determination that the external electronic device is mounted in the connector;
An electronic device configured to isolate at least one signal line among signal lines connected to the connector based on a determination that the external electronic device is not mounted in the connector. The method of claim 8,
the processor,
A third signal is transmitted through an input/output terminal corresponding to a PCIe bus among input/output terminals connected to the connector;
An electronic device configured to determine whether the external electronic device is mounted in the connector based on a result of a response to the third signal. The method of claim 8,
The at least one signal line includes PCIe signal lines and a GPIO signal line,
the processor,
An electronic device set to isolate the at least one signal line by setting it to a high impedance state. The method of claim 8,
the processor,
After the power is applied, when the external electronic device is mounted on the connector and receives a third signal related to a connection request from the external electronic device through a USB signal line among signal lines of the processor connected to the connector, the Transmitting a fourth signal related to power control and a fifth signal related to reset control to an external electronic device;
An electronic device configured to release the isolation of at least one isolated signal line among the signal lines connected to the connector. The method of claim 11,
The at least one isolated signal line includes PCIe signal lines and a GPIO signal line,
the processor,
Release the isolated at least one signal line from a high impedance state to release the isolation;
An electronic device configured to set a state of a pin corresponding to the at least one signal line released from isolation so that the at least one signal line from isolation performs a predefined function. The method of claim 8,
The connector is disposed in a slot shape on a main board in the electronic device,
The external electronic device is provided in a card shape and inserted into the connector to be built into the electronic device. The method of claim 8,
The connector is exposed to the outside of the electronic device,
The external electronic device is detachably connected to the connector. In claim 14,
The connector,
Electronic devices that include high-speed PCIe ports utilizing HDMI ports. A method for connecting an external electronic device,
determining whether the external electronic device is mounted in a connector of the electronic device when power is applied to the electronic device;
transmitting a first signal related to power control and a second signal related to reset control to the external electronic device based on a determination that the external electronic device is mounted in the connector;
and isolating at least one signal line from among signal lines of a processor of the electronic device connected to the connector, based on a determination that the external electronic device is not mounted on the connector. The method of claim 16
The operation of determining whether the external electronic device is mounted,
transmitting a third signal through an input/output terminal corresponding to a PCIe bus among input/output terminals of a processor of the electronic device connected to the connector; and
and determining whether the external electronic device is mounted in the connector based on a result of the response to the third signal. The method of claim 16
The at least one signal line includes PCIe signal lines and a GPIO signal line,
The operation of isolating the at least one signal line,
A method of connecting an external electronic device comprising an operation of setting the at least one signal line to a high impedance state. The method of claim 16
After power is applied to the electronic device, when the external electronic device is mounted on the connector, a third signal line related to a connection request from the external electronic device through a USB signal line among signal lines of the processor of the electronic device connected to the connector. receiving a signal;
transmitting a fourth signal related to power control and a fifth signal related to reset control to the external electronic device in response to receiving the third signal; and
The method of connecting an external electronic device further comprising an operation of releasing the isolation of at least one isolated signal line among the signal lines of the processor of the electronic device connected to the connector. The method of claim 19
The at least one isolated signal line includes PCIe signal lines and a GPIO signal line,
The operation of releasing the isolation of the at least one isolated signal line,
releasing the at least one isolated signal line from a high impedance state; and
and setting a state of a pin corresponding to the at least one isolated signal line so that the at least one isolated signal line performs a predefined function.

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