KR20240071970A - Printed circuit board and manufacturing method for the same - Google Patents

Abstract

The present disclosure includes: a first insulating layer; a plurality of first circuit patterns each disposed on the first insulating layer; and a plurality of second circuit patterns each disposed on the first insulating layer and having a thickness thinner than the plurality of first circuit patterns. It relates to a printed circuit board and a method of manufacturing the same, wherein at least one of the plurality of first circuit patterns and at least one of the plurality of second circuit patterns are repeatedly and alternately arranged with each other.

Description

Printed circuit board and manufacturing method thereof {PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD FOR THE SAME}

The present disclosure relates to a printed circuit board, for example, a printed circuit board including microcircuits, and a method of manufacturing the same.

Recently, in the electronic components industry, highly integrated printed circuit boards are being required to respond to 5G high-speed communication and artificial intelligence. Microcircuitry is a core technology for manufacturing highly integrated printed circuit boards, and research and development is actively underway to secure technology that can implement microcircuits with lines/spaces of approximately several microns, for example. However, conventional circuit formation methods, such as SAP (Semi Additive Process) and MSAP (Modified Semi Additive Process), are limited to the above-mentioned line/space range due to limitations in the resolution of exposure equipment and margins in the seed etching process. There are limitations in implementing microcircuits.

One of the several purposes of the present disclosure is to provide a printed circuit board capable of forming fine circuits and a method of manufacturing the same.

One of the several solutions proposed through this disclosure is to form a plurality of first metal patterns through a first plating process, form a metal layer thereon, and form a plurality of second metal patterns thereon through a second plating process. , Then, through a process of selectively etching the metal layer, a fine circuit is formed.

For example, a method of manufacturing a printed circuit board according to one example includes forming a plurality of first metal patterns on a substrate; forming a metal layer covering the plurality of first metal patterns on the substrate and including a metal different from the plurality of first metal patterns; forming a plurality of second metal patterns on the metal layer, each filling at least a portion of the space between the metal layers, and each containing a different metal from the metal layer; etching a portion of the metal layer to expose at least a portion of each of the plurality of first metal patterns from the metal layer; forming a first insulating layer on the plurality of first and second metal patterns; removing the substrate; and etching the remaining portion of the metal layer; It may include.

In addition, the printed circuit board according to one example includes a first insulating layer; a plurality of first circuit patterns each disposed on the first insulating layer; and a plurality of second circuit patterns each disposed on the first insulating layer and having a thickness thinner than the plurality of first circuit patterns. It may include, wherein at least one of the plurality of first circuit patterns and at least one of the plurality of second circuit patterns are alternately and repetitively arranged.

Alternatively, a printed circuit board according to one example may include a first insulating layer; a first wiring layer disposed on the first insulating layer and including first and second circuit patterns having different thicknesses; and a second wiring layer disposed below the first insulating layer and including a third circuit pattern having a wider line width than each of the first and second circuit patterns. It may include.

As one of the many effects of the present disclosure, a printed circuit board capable of forming a fine circuit and a method of manufacturing the same can be provided.

1 is a block diagram schematically showing an example of an electronic device system.
Figure 2 is a perspective view schematically showing an example of an electronic device.
Figure 3 is a cross-sectional view schematically showing an example of a printed circuit board.
Figures 4 to 6 are cross-sectional views schematically showing modified examples of the printed circuit board of Figure 3.
FIGS. 7A to 7K are cross-sectional views schematically showing an example of manufacturing the printed circuit board of FIG. 3.
FIGS. 8A to 8D are cross-sectional views schematically showing the shape of a plurality of first and second metal patterns and metal layers and the degree of etching of some of the metal layers for manufacturing the printed circuit boards of FIGS. 3 to 6, respectively.
FIGS. 9 to 12 are cross-sectional views schematically showing the case where the printed circuit board of FIGS. 3 to 6 is applied to a multilayer printed circuit board, respectively.
Figure 13 is a cross-sectional view schematically showing another example of a printed circuit board.
Figures 14 to 16 are cross-sectional views schematically showing modified examples of the printed circuit board of Figure 13.
FIGS. 17A to 17L are cross-sectional views schematically showing an example of manufacturing the printed circuit board of FIG. 13.
FIGS. 18A to 18D are process cross-sectional views schematically showing the shapes of a plurality of first and second metal patterns and metal layers and the degree of etching of some of the metal layers for manufacturing the printed circuit boards of FIGS. 13 to 16, respectively.
FIGS. 19 to 22 are cross-sectional views schematically showing the case where the printed circuit board of FIGS. 13 to 16 is applied to a multilayer printed circuit board, respectively.

Hereinafter, the present disclosure will be described with reference to the attached drawings. The shapes and sizes of elements in the drawings may be exaggerated or reduced for clearer explanation.

Electronics

1 is a block diagram schematically showing an example of an electronic device system.

Referring to the drawing, the electronic device 1000 accommodates the main board 1010. The main board 1010 is physically and/or electrically connected to chip-related components 1020, network-related components 1030, and other components 1040. These are combined with other electronic components described later to form various signal lines 1090.

Chip-related components 1020 include memory chips such as volatile memory (eg, DRAM), non-volatile memory (eg, ROM), and flash memory; Application processor chips such as central processors (eg, CPU), graphics processors (eg, GPU), digital signal processors, cryptographic processors, microprocessors, and microcontrollers; Logic chips such as analog-digital converters and ASICs (application-specific ICs) are included, but are not limited thereto, and other types of chip-related electronic components may also be included. Additionally, it goes without saying that these chip-related components 1020 can be combined with each other. The chip-related component 1020 may be in the form of a package including the above-described chip or electronic component.

Network-related parts (1030) include Wi-Fi (IEEE 802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM. , GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G and any other wireless and wired protocols designated as such, but are not limited to, and many other wireless or wired protocols. Any of the standards or protocols may be included. In addition, of course, the network-related components 1030 can be combined with the chip-related components 1020.

Other parts (1040) include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (Electro Magnetic Interference) filter, MLCC (Multi-Layer Ceramic Condenser), etc. . However, it is not limited to this, and may include passive elements in the form of chip components used for various other purposes. In addition, of course, the other components 1040 may be combined with the chip-related components 1020 and/or the network-related components 1030.

Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and/or electrically connected to the main board 1010. Examples of other electronic components include a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. However, it is not limited to this, and may include an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), etc. It may be possible. In addition to this, of course, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

The electronic device 1000 includes a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, and a computer ( It may be a computer, monitor, tablet, laptop, netbook, television, video game, smart watch, automotive, etc. However, it is not limited to this, and of course, it can be any other electronic device that processes data.

Figure 2 is a perspective view schematically showing an example of an electronic device.

Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is accommodated inside the smartphone 1100, and various components 1120 are physically and/or electrically connected to the motherboard 1110. Additionally, other components that may or may not be physically and/or electrically connected to the motherboard 1110, such as the camera module 1130 and/or the speaker 1140, are accommodated therein. Some of the components 1120 may be the chip-related components described above, for example, the component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and/or passive components are surface mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board with built-in active components and/or passive components. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, and of course may be other electronic devices as described above.

printed circuit board

Figure 3 is a cross-sectional view schematically showing an example of a printed circuit board.

Referring to the drawing, a printed circuit board 100A according to an example includes a first insulating layer 111, a plurality of first circuit patterns 121 respectively disposed on the first insulating layer 111, and a first insulating layer. It includes a plurality of second circuit patterns 122 each disposed on (111). The thickness T1 of the plurality of first circuit patterns 121 is thicker than the thickness T2 of the plurality of second circuit patterns 122. One of the plurality of first circuit patterns 121 and one of the plurality of second circuit patterns 122 are alternately and repeatedly arranged. Repeatedly arranged alternately with each other may mean arranged alternately with each other at least twice, for example, in the cross section, the second circuit pattern 122, the first circuit pattern 121, the second circuit pattern 122, The first circuit pattern 121, the second circuit pattern 122, the first circuit pattern 121, the second circuit pattern 122, etc. may be arranged in this order on the first insulating layer 111. The number of alternately repeating plurality of first and second circuit patterns 121 and 122 is not particularly limited and may vary depending on design. In this repetitive arrangement, the line width W1 of one first circuit pattern 121, the line width W2 of one second circuit pattern 122, and the one first and second circuit patterns 121 and 122 The spacing S1 between them may be substantially equal to each other.

Meanwhile, the plurality of first and second circuit patterns 121 and 122 may be fine circuit patterns. For example, the plurality of first and second circuit patterns 121 and 122 may each have a line width (W1, W2) of 10 ㎛ or less, 5 ㎛ or less, or 2 ㎛ or less. Additionally, the spacing S1 between the plurality of first and second circuit patterns 121 and 122 may be 10 μm or less, 5 μm or less, or 2 μm or less. For example, the plurality of first and second circuit patterns 121 and 122 have L(Line)/S(Space) of 10㎛/10㎛ or less, or 5㎛/5㎛ or less, or 2㎛/2㎛. It may be the following fine circuit pattern.

A printed circuit board (100A) according to an example of this structure can be formed through a new process described later, and in this case, unlike conventional SAP, MSAP, etc., the limitation of resolution of exposure equipment can be overcome, and a separate seed etching process can be used. may not proceed, and as a result, a fine circuit pattern with L/S of 10㎛/10㎛ or less, or 5㎛/5㎛ or less, or 2㎛/2㎛ or less can be easily formed.

Meanwhile, the printed circuit board 100A according to one example is disposed on the first insulating layer 111 and has a width or line width greater than the line widths W1 and W2 of each of the plurality of first and second circuit patterns 121 and 122. (W3) may further include one or more wide third circuit patterns 123. One or more third circuit patterns 123 are general circuit patterns rather than fine circuit patterns, for example, general circuit patterns with a line width and an interval between them exceeding 10㎛, and/or pad patterns, for example, with a width exceeding 10㎛. May include a pad pattern.

Meanwhile, the printed circuit board 100A according to one example is disposed on the first insulating layer 111 and has a width or line width greater than the line widths W1 and W2 of each of the plurality of first and second circuit patterns 121 and 122. (W4) may further include one or more wide fourth circuit patterns 124. The thickness T4 of the one or more fourth circuit patterns 124 may be thinner than the thickness T3 of the one or more third circuit patterns 123. One or more fourth circuit patterns 124 are general circuit patterns rather than fine circuit patterns, for example, general circuit patterns with a line width and an interval between them exceeding 10 μm, and/or plain patterns, for example, with a width exceeding 10 μm. Can include plain patterns.

Hereinafter, components of the printed circuit board 100A according to an example will be described in more detail with reference to the drawings.

The first insulating layer 111 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a material containing an inorganic filler, an organic filler, and/or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) along with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. Additionally, the insulating material may be a photosensitive insulating material such as PID (Photo Imageable Dielectric).

Each of the plurality of first and second circuit patterns 121 and 122 may include metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. Each of the first and second circuit patterns 121 and 122 may perform various functions depending on the design. For example, it may include a signal pattern. Each of the first and second circuit patterns 121 and 122 may not include a separate seed metal layer. For example, the plurality of first and second circuit patterns 121 and 122 may each include an electrolytic plating layer (or electrolytic copper) and may not include an electroless plating layer (or chemical copper) or a sputtering layer.

Each of the one or more third and fourth circuit patterns 123 and 124 may include metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. Each of the one or more third and fourth circuit patterns 123 and 124 may perform various functions depending on the design. For example, it may include a signal pattern, power pattern, and ground pattern. Each of these patterns may include a line pattern, a pad pattern, a plane pattern, etc. Each of the third and fourth circuit patterns 123 and 124 may not include a separate seed metal layer. For example, one or more third and fourth circuit patterns 123 and 124 may each include an electrolytic plating layer (or electrolytic copper) and may not include an electroless plating layer (or chemical copper) or a sputtering layer. .

Figures 4 to 6 are cross-sectional views schematically showing modified examples of the printed circuit board of Figure 3.

Referring to FIG. 4, the printed circuit board 100B according to a modified example is a printed circuit board 100A according to an example, in which a portion 111P of the first insulating layer 111 has a plurality of first and second plurality of first and second insulating layers 111. It is disposed to protrude between the circuit patterns 121 and 122. For example, in the above-described repetitive arrangement, the portion 111P of the first insulating layer 111 is between at least one of one side and the other side of each of the first and second circuit patterns 121 and 122 in the cross section. It can be placed protruding. In this case, the connection reliability between the first insulating layer 111 and the plurality of first and second circuit patterns 121 and 122 can be further improved. Meanwhile, a portion 111P of the first insulating layer 111 includes at least one of the plurality of first and second circuit patterns 121 and 122 and at least one of the third and fourth circuit patterns 123 and 124. It can also be placed protruding between two pieces. Additionally, it may be disposed to protrude between one or more third and fourth circuit patterns 123 and 124. In this case, the connection reliability between the first insulating layer 111 and one or more third and fourth circuit patterns 123 and 124 can also be improved.

Referring to FIG. 5, in the printed circuit board 100C according to another modified example, in the printed circuit board 100A according to one example, an undercut is formed on at least a portion of the lower side of each of the plurality of first circuit patterns 121. A foot is formed on at least a portion of the lower side of each of the plurality of second circuit patterns 122. For example, in the above-described repetitive arrangement, in cross section, one first circuit pattern 121 may have a groove portion 121U on the lower side of both sides, and one second circuit pattern 122 may have a groove portion 121U on the lower side of both sides. It may have a protrusion 122F. In this case, the connection reliability between the first insulating layer 111 and the plurality of first and second circuit patterns 121 and 122 can be further improved. Meanwhile, an undercut may be formed on at least a portion of the lower side of each of the one or more third circuit patterns 123, and a foot may be formed on at least a portion of the lower side of each of the one or more fourth circuit patterns 124. In this case, the connection reliability between the first insulating layer 111 and one or more third and fourth circuit patterns 123 and 124 can also be improved.

Referring to FIG. 6, the printed circuit board 100D according to another modified example is a printed circuit board 100A according to an example, where a portion 111P of the first insulating layer 111 has a plurality of first and It is disposed to protrude between the second circuit patterns 121 and 122. Additionally, an undercut is formed on at least a portion of the lower side of each of the plurality of first circuit patterns 121, and a foot is formed on at least a portion of the lower side of each of the plurality of second circuit patterns 122. The specific structure and effects thereof are as described above. Meanwhile, a portion 111P of the first insulating layer 111 includes at least one of the plurality of first and second circuit patterns 121 and 122 and at least one of the third and fourth circuit patterns 123 and 124. It can be arranged to protrude between one or more of the third and fourth circuit patterns 123 and 124. Additionally, an undercut may be formed on at least a portion of the lower side of each of the one or more third circuit patterns 123, and a foot may be formed on at least a portion of the lower side of each of the one or more fourth circuit patterns 124. The specific structure and effects thereof are also as described above.

Other than that, other contents are substantially the same as those described in the printed circuit board 100A according to the above-described example, and redundant description thereof will be omitted.

FIGS. 7A to 7K are cross-sectional views schematically showing an example of manufacturing the printed circuit board of FIG. 3.

Referring to the drawings, a method of manufacturing a printed circuit board (100A) according to an example includes forming a plurality of first metal patterns 221 on a substrate 210, forming a plurality of first metal patterns on the substrate 210. Forming a metal layer 231 covering (221) and including a metal different from the plurality of first metal patterns 221, forming at least a portion of the space (G1) between the metal layers 231 on the metal layer 231. Forming a plurality of second metal patterns 222 each filling and including a different metal from the metal layer 231, etching a portion of the metal layer 231 to form at least a portion of each of the plurality of first metal patterns 221 into a metal layer. exposing from 231, forming a first insulating layer 111 on the plurality of first and second metal patterns 221 and 222, removing the substrate 210, and metal layer 231. It includes the step of etching the remaining remainder. The metal layer 231 may include a different metal from the plurality of first and second metal patterns 221 and 222 . For example, the metal layer 231 may have a different etch ratio for the plurality of first and second metal patterns 221 and 222 and the etchant for etching the metal layer 231. For example, the plurality of first and second metal patterns 221 and 222 may include copper (Cu), and the metal layer 231 may include nickel (Ni), but are not limited thereto.

Meanwhile, in the step of forming the plurality of first metal patterns 221, when the width of each of the plurality of first metal patterns 221 is n, the spacing between the plurality of first metal patterns 221 is substantially 3n can be satisfied. Additionally, in the step of forming the metal layer 231, the thickness or width of the metal layer 231 may substantially satisfy n. Therefore, it is possible to finally form a microcircuit with L/S of n/n. In this way, even if the initial metal pattern spacing is 3n, the final line width and spacing of the fine circuit can each be formed to n.

As described above, the printed circuit board (100A) according to an example formed by this manufacturing method can comfortably form the spacing of the initial metal pattern, and unlike conventional SAP, MSAP, etc., it can overcome the limitations of the resolution of exposure equipment. , a separate seed etching process may not be performed, and as a result, it is possible to easily form a fine circuit pattern with an L/S of 10㎛/10㎛ or less, or 5㎛/5㎛ or less, or 2㎛/2㎛ or less. can do.

Meanwhile, the method of manufacturing the printed circuit board 100A according to one example includes forming one or more third metal patterns 223 with a wider width or line width than each of the plurality of first metal patterns 221 on the substrate 210. Additional steps may be included. One or more third metal patterns 223 may be formed together when forming a plurality of first metal patterns 221 . One or more third metal patterns 223 may include a different metal from the metal layer 231 . For example, one or more third metal patterns 223 may include copper (Cu), but are not limited thereto.

Meanwhile, the method of manufacturing the printed circuit board 100A according to one example fills at least a portion of the other space G2 between the metal layers 231 on the metal layer 231, and each of the plurality of second metal patterns 222 has a width greater than that of each other. Alternatively, the step of forming one or more fourth metal patterns 224 with a wide line width may be further included. One or more fourth metal patterns 224 may be formed together when forming a plurality of second metal patterns 222 . One or more fourth metal patterns 224 may include a different metal from the metal layer 231 . For example, one or more fourth metal patterns 224 may include copper (Cu), but are not limited thereto.

Meanwhile, the method of manufacturing the printed circuit board 100A according to one example includes a plurality of first and second metal patterns 221 and 222 and one or more third and fourth metal patterns after the step of removing the substrate 210. A dry film 241 exposing at least a portion of a plurality of first and second metal patterns 221 and 222 and one or more third and fourth metal patterns 223 and 224 on (223, 224). forming, and etching an exposed portion of at least one of the plurality of first and second metal patterns 221 and 222 and one or more third and fourth metal patterns 223 and 224. can do. Through this, a plurality of first metal patterns 221, a plurality of second metal patterns 221, one or more third metal patterns 223, and/or one or more fourth metal patterns 234 are connected to each other. You can remove parts or unnecessary parts.

Hereinafter, a method of manufacturing a printed circuit board (100A) according to an example will be described in more detail with reference to the drawings.

Referring to FIG. 7A, a substrate 210 is prepared. The substrate 210 may be CCL (Copper Clad Laminate), but is not limited thereto, and various types of carrier substrates capable of detach may be used. The substrate 210 may include a detach core 211 and a detach metal layer 212. The detach metal layer 212 may be disposed on one or both sides of the detach core 211. The detach core 211 may include an insulating material, such as an epoxy resin impregnated with glass fiber, and the detach metal layer 212 may include a metal, such as copper (Cu). If necessary, a release layer may be further disposed between the detach core 211 and the detach metal layer 212.

Referring to FIG. 7B, a plurality of first metal patterns 221 are formed on the substrate 210. At this time, one or more third metal patterns 223 that are wider than each of the plurality of first metal patterns 221 may be further formed. The plurality of first metal patterns 221 and one or more third metal patterns 223 form a dry film containing a photosensitive insulating material on the substrate 210, and are formed into the dry film through a photolithography process, such as exposure and development. It can be formed by forming a pattern opening, using the detach metal layer 212 exposed through the pattern opening as a seed metal layer, and filling at least a portion of the pattern opening with a plating process, such as electrolytic plating (or electroplating). One or more third metal patterns 223 may include the same metal as the plurality of first metal patterns 221, for example, copper (Cu). When the width of each of the plurality of first metal patterns 221 is n, the distance between the plurality of first metal patterns 221 may each substantially satisfy 3n.

Referring to FIG. 7C, a plurality of first metal patterns 221 and one or more third metal patterns 223 are covered with a plurality of first metal patterns 221 and one or more third metal patterns 223. A metal layer 231 is formed. The metal layer 231 may be formed through a plating process, such as electrolytic plating (or electroplating). The metal layer 231 may include a metal different from the plurality of first metal patterns 221 and one or more third metal patterns 223, for example, nickel (Ni). When the width of each of the plurality of first metal patterns 221 is n, the thickness or width of the metal layer 231 may substantially satisfy n.

Referring to FIG. 7D, a plurality of second metal patterns 222 are formed on the metal layer 231, each filling at least a portion of the space G1 between the metal layers 231. At this time, one or more fourth metal patterns 224 may be further formed on the metal layer 231 to fill at least a portion of the other space G2 between the metal layers 231 . The plurality of second metal patterns 222 and one or more fourth metal patterns 224 may be formed by filling at least a portion of each of the spaces G1 and G2 using a plating process, for example, electrolytic plating (or electroplating). One or more fourth metal patterns 224 may include the same metal as the plurality of second metal patterns 222, for example, copper (Cu). When the width of each of the plurality of first metal patterns 221 is n, the width of each of the plurality of second metal patterns 222 may substantially satisfy n.

Referring to FIG. 7E, a portion of the metal layer 231 is etched to expose at least a portion of each of the plurality of first metal patterns 221 and at least a portion of each of the one or more third metal patterns 223 from the metal layer 231. I order it. The metal layer 231 includes a metal different from the plurality of first metal patterns 221 and one or more third metal patterns 223, for example, nickel (Ni), and is selectively etched using, for example, an etchant for nickel (Ni). It can be etched. The etchant for nickel (Ni) can be used with an etch ratio of nickel (Ni) to copper (Cu) of at least 8:2.

Referring to FIG. 7F, the first insulating layer 111 is formed on the plurality of first and second metal patterns 221 and 222 and one or more third and fourth metal patterns 223 and 224. The first insulating layer 111 may be formed by laminating uncured films and then curing them, but is not limited thereto.

Referring to FIGS. 7G and 7H, the substrate 210 is removed. The detach core 211 can be separated and removed from the detach metal layer 212. The detach metal layer 212 remaining after separation and removal of the detach core 211 can be removed by etching.

Referring to FIG. 7I, a plurality of first and second metal patterns 221 and 222 are formed on one or more third and fourth metal patterns 223 and 224. 222) and a dry film 241 exposing a portion of at least one of the third and fourth metal patterns 223 and 224 is formed. The dry film 241 may include a negative type photosensitive insulating material or a positive type photosensitive insulating material. A portion of the dry film 241 can be removed through a photolithography process, such as exposure and development, through which a plurality of first and second metal patterns 221 and 222 and one or more third and fourth metal patterns ( 223, 224), at least one part may be selectively exposed.

Referring to FIG. 7J, an exposed portion of at least one of the plurality of first and second metal patterns 221 and 222 and one or more third and fourth metal patterns 223 and 224 is etched. Through this, a plurality of first metal patterns 221, a plurality of second metal patterns 221, one or more third metal patterns 223, and/or one or more fourth metal patterns 234 are connected to each other. You can selectively remove parts or unnecessary parts.

Referring to FIG. 7K, the remaining portion of the metal layer 231 is etched. By etching the metal layer 231, a plurality of first and second circuit patterns ( 121 and 122 and one or more third and fourth circuit patterns 123 and 124 may be formed.

Through a series of processes, the printed circuit board 100A according to the above-described example can be formed, and other contents are substantially the same as those described in the printed circuit board 100A according to the above-described example, and there is no overlap therein. The explanation is omitted.

FIGS. 8A to 8D are cross-sectional views schematically showing the shape of a plurality of first and second metal patterns and metal layers and the degree of etching of some of the metal layers for manufacturing the printed circuit boards of FIGS. 3 to 6, respectively.

Referring to FIG. 8A, as in step (a), at least a portion of the edge of each top surface of the plurality of first metal patterns 221 may be formed substantially vertically, and thus the metal layer 231 and the plurality of first metal patterns 221 may be formed substantially vertically. At least a portion of the edge of each top surface of the second metal pattern 222 may be formed substantially vertically. At this time, at least a portion of the edge of the one or more third and fourth metal patterns 223 and 224 of each top surface may be formed substantially vertically. In addition, as in step (b), when the metal layer 231 is selectively removed, the top surface of the metal layer 231 is substantially similar to the top surface of each of the plurality of first and second metal patterns 221 and 222. Can be etched planarly. At this time, the metal layer 231 may be etched substantially coplanar with the top surface of each of the one or more third and fourth metal patterns 223 and 224. Therefore, as in step (c), the first insulating layer 111 may be formed on a substantially coplanar flat surface. Additionally, as in step (d), undercuts or feet may not be formed on the bottom sides of the plurality of first and second circuit patterns 121 and 122. At this time, an undercut or foot may not be formed on the bottom side of one or more of the third and fourth circuit patterns 123 and 124. Additionally, the top surface of the first insulating layer 111 may be substantially flat without any steps. For example, the structure of the printed circuit board 100A according to one example may be formed.

Referring to FIG. 8B, unlike in FIG. 8A, when the metal layer 231 is selectively removed in step (b), the metal layer 231 is overetched, so that the top surface of the metal layer 231 is formed into a plurality of first and second The metal patterns 221 and 222 may be etched to have a step from the top surface of each. At this time, the metal layer 231 may be etched to have a step difference from the top surface of each of the one or more third and fourth metal patterns 223 and 224. Therefore, in step (c), the first insulating layer 111 may extend into the over-etched area. Additionally, in step (d), a portion 111P of the first insulating layer 111 may protrude between the plurality of first and second circuit patterns 121 and 122. At this time, it may also protrude between one or more third and fourth circuit patterns 123 and 124. For example, the structure of the printed circuit board 100B according to a modified example may be formed.

Referring to FIG. 8C, unlike in FIG. 8A, in step (a), the plurality of first metal patterns 221 may be formed so that at least a portion of the edge of each top surface is rounded. Accordingly, at least part of the edge of the top surface of the metal layer 231 may be rounded, and at least part of the edge of the top surface of each of the plurality of second metal patterns 222 may be sharp. At this time, at least a portion of the edge of the one or more third and fourth metal patterns 223 and 224 of each top surface may be rounded or sharp. Therefore, in step (d), an undercut or foot, for example, a groove 121U and a protrusion 122F, may be formed on at least a portion of the bottom side of each of the plurality of first and second circuit patterns 121 and 122. At this time, an undercut or foot may be formed on at least a portion of the bottom side of each of the one or more third and fourth circuit patterns 123 and 124. For example, the structure of the printed circuit board 100C according to another modified example may be formed.

Referring to FIG. 8D, unlike in FIG. 8A, in step (a), the plurality of first metal patterns 221 may be formed so that at least a portion of the edge of each top surface is rounded. Accordingly, at least part of the edge of the top surface of the metal layer 231 may be rounded, and at least part of the edge of the top surface of each of the plurality of second metal patterns 222 may be sharp. At this time, at least a portion of the edge of the one or more third and fourth metal patterns 223 and 224 of each top surface may be rounded or sharp. In addition, when the metal layer 231 is selectively removed in step (b), the metal layer 231 is overetched, so that the top surface of the metal layer 231 is a top surface of each of the plurality of first and second metal patterns 221 and 222. It can be etched to have a surface and a step. At this time, the metal layer 231 may be etched to have a step difference from the top surface of each of the one or more third and fourth metal patterns 223 and 224. Therefore, in step (c), the first insulating layer 111 may extend into the over-etched area. Additionally, in step (d), a portion 111P of the first insulating layer 111 may protrude between the plurality of first and second circuit patterns 121 and 122. At this time, it may also protrude between one or more third and fourth circuit patterns 123 and 124. Additionally, an undercut or foot, for example, a groove 121U and a protrusion 122F, may be formed on at least a portion of the bottom side of each of the plurality of first and second circuit patterns 121 and 122. At this time, an undercut or foot may be formed on at least a portion of the bottom side of each of the one or more third and fourth circuit patterns 123 and 124. For example, the structure of the printed circuit board 100D according to another modified example may be formed.

Other contents are substantially the same as those described in the above-described printed circuit boards 100A, 100B, 100C, and 100D and the manufacturing method of the above-described printed circuit board 100A, and overlapping descriptions thereof will be omitted.

FIGS. 9 to 12 are cross-sectional views schematically showing the case where the printed circuit board of FIGS. 3 to 6 is applied to a multilayer printed circuit board, respectively.

Referring to the drawings, the multi-layer printed circuit boards (300A, 300B, 300C, and 300D) are the first insulating layer 111 in the above-described printed circuit boards (100A, 100B, 100C, and 100D), respectively. A first wiring layer 120 disposed on the upper surface and including a plurality of first and second circuit patterns 121 and 122 and one or more third and fourth circuit patterns 123 and 124, and a first insulating layer ( A second wiring layer 130 including a plurality of fifth circuit patterns 131 disposed on the lower surface of 111), and a second wiring layer 130 that penetrates the first insulating layer 111 and is connected to at least a portion of the second wiring layer 130. 1 connection via 151, a second insulating layer 112 disposed on the lower surface of the second insulating layer and covering at least a portion of the second wiring layer 130, a plurality of plurality disposed on the lower surface of the second insulating layer 112 A third wiring layer 140 including the sixth circuit pattern 141, and a second connection via 152 penetrating through the second insulating layer 112 and connected to at least a portion of the third wiring layer 140. Includes. If necessary, a first resist layer 161 is disposed on the upper surface of the first insulating layer 111 and covers at least a portion of the first wiring layer 120, and is disposed on the lower surface of the second insulating layer 112. and may further include a second resist layer 162 covering at least a portion of the third wiring layer 140.

Meanwhile, the width or line width (W5, W6) of the plurality of fifth and sixth circuit patterns (131, 141) is the line width (W1, W2) of each of the plurality of first and second circuit patterns (121, 122). It could be wider. Additionally, the spacing S2 and S3 between the plurality of fifth and sixth circuit patterns 131 and 142 may be wider than the spacing S1 between the plurality of first and second circuit patterns 121 and 122. For example, each of the plurality of fifth and sixth circuit patterns 131 and 141 is a general circuit pattern rather than a fine circuit pattern, for example, the line widths W5 and W6 are greater than 10 μm and the spacing S2 and S3 is 10 μm. It may include a general circuit pattern exceeding ㎛, and may also include a pad pattern or a plain pattern, for example, a pad pattern or a plain pattern having a width greater than 10 ㎛.

Meanwhile, the plurality of first and second circuit patterns 121 and 122 and the one or more third and fourth circuit patterns 123 and 124 may not include a seed metal layer, and the plurality of fifth circuit patterns 131 ) and the plurality of sixth circuit patterns 132 may include seed metal layers (m1, m2). In this way, unlike the plurality of fifth circuit patterns 131 and the plurality of sixth circuit patterns 132 formed through plating processes such as MSAP and SAP, the plurality of first and second circuit patterns 121 and 122 and The one or more third and fourth circuit patterns 123 and 124 may be formed through the above-described fine circuit forming process and may not include a seed metal layer.

Hereinafter, the components of the multi-layer printed circuit boards 300A, 300B, 300C, and 300D will be described in more detail with reference to the drawings.

The second insulating layer 112 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a material containing an inorganic filler, an organic filler, and/or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) along with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. Additionally, the insulating material may be a photosensitive insulating material such as PID (Photo Imageable Dielectric).

Each of the plurality of fifth and sixth circuit patterns 131 and 141 may include metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. Each of the fifth and sixth circuit patterns 131 and 141 may perform various functions depending on the design. For example, it may include a signal pattern, power pattern, and ground pattern. Each of these patterns may include a line pattern, a pad pattern, a plain pattern, etc. The plurality of fifth and sixth circuit patterns 131 and 141 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrical copper), respectively, but are not limited thereto. A sputtered layer may be formed instead of an electroless plating layer, and both may be included. Additionally, copper foil may be further included.

The seed metal layers m1 and m2 may each include a metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. The seed metal layer (m) may include an electroless plating layer (or chemical copper) and/or a sputtering layer. The sputter layer may be one layer or multiple layers.

The first and second connection vias 151 and 152 may each include a plurality of micro vias. Micro vias may be field vias that fill a via hole or conformal vias arranged along the wall of the via hole. Micro vias may be arranged as a stacked type and/or a staggered type. Micro vias may have a tapered shape where the width of the upper surface is narrower than the width of the lower surface. The first and second connection vias 151 and 152 may each include metal, and the metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), and nickel ( It may include Ni), lead (Pb), titanium (Ti), or alloys thereof, and preferably includes copper (Cu), but is not limited thereto. The first and second connection vias 151 and 152 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrical copper), respectively, but are not limited thereto. A sputtered layer may be formed instead of an electroless plating layer, and both may be included. The first and second connection vias 151 and 152 may perform various functions depending on the design of the corresponding layer. For example, it may include ground vias, power vias, signal vias, etc.

The first and second resist layers 161 and 162 may include liquid or film-type solder resist, but are not limited thereto, and other types of insulating materials may be used. The first resist layer 161 is a first and/or layer that exposes at least a portion of at least one of the one or more third circuit patterns 123 and/or at least a portion of at least one of the one or more fourth circuit patterns 124. Alternatively, it may have second openings (h1, h3). The second resist layer 162 may have a third opening h2 exposing at least a portion of at least one of the plurality of sixth circuit patterns 141 . A surface treatment layer may be formed on the pattern exposed through the first opening (h1), the second opening (h3), and/or the third opening (h2). Alternatively, metal bumps may be formed on the pattern exposed through the first opening (h1), the second opening (h3), and/or the third opening (h2). The second opening (h3) may be deeper than the first opening (h1).

If necessary, the multi-layer printed circuit boards (300A, 300B, 300C, 300D) may include a larger number of insulating layers, wiring layers, and connection via layers than shown in the drawings, for example, first and first These components may be added between the two insulating layers 111 and 112.

Other contents are substantially the same as those described for the above-mentioned printed circuit boards 100A, 100B, 100C, and 100D, and redundant description thereof will be omitted.

On the other hand, the multi-layer printed circuit boards (300A, 300B, 300C, 300D) include the first insulating layer 111 in the manufacturing method described in FIGS. 7A to 7K and 8A to 8D. After the forming step, forming a second wiring layer 130 on the first insulating layer 111, a first wiring layer penetrating through the first insulating layer 111 and connected to at least a portion of the second wiring layer 130. Forming a connection via 151, forming a second insulating layer 112 covering at least a portion of the second wiring layer 130 on the first insulating layer 111, on the second insulating layer 112 Forming a third wiring layer 140, and forming a second connection via 152 penetrating the second insulating layer 112 and connected to at least a portion of the third wiring layer 140. It can be formed in this way. If necessary, after etching the remaining portion of the metal layer 231, at least a portion of each of the first and second metal patterns 221 and 222 and one of the plurality of first and second metal patterns 221 and 222 are formed on the first insulating layer 111. Forming a first resist layer 161 covering at least a portion of each of the third and fourth metal patterns 223 and 224, and at least a portion of the third wiring layer 140 on the second insulating layer 112. It may be formed by further comprising forming a second resist layer 162 covering the .

The second insulating layer 112, the second and third wiring layers 130 and 140, and the first and second connection vias 151 and 52 can be formed through a build-up process. For example, the second insulating layer 112 may be formed by laminating an uncured film and then curing it, but is not limited to this. In addition, the second and third wiring layers (130, 140) and the first and second connection vias (151, 152) are formed by machining via holes in the first and second insulating layers (111, 112) and then using SAP, MSAP, etc. It can be formed by the plating process used, but is not limited to this.

Other contents are substantially the same as those described in the manufacturing method described in FIGS. 7A to 7K and FIGS. 8A to 8D, and overlapping description thereof will be omitted.

Figure 13 is a cross-sectional view schematically showing another example of a printed circuit board.

Referring to the drawings, a printed circuit board 400A according to another example includes a first insulating layer 411, a plurality of first circuit patterns 421a and 421b respectively disposed on the first insulating layer 411, and a first insulating layer 411. 1 It includes a plurality of second circuit patterns 422 each disposed on the insulating layer 411. The thickness H1 of the plurality of first circuit patterns 421a and 421b is thicker than the thickness H2 of the plurality of second circuit patterns 422 . Two of the plurality of first circuit patterns 421a and 421b are arranged repeatedly and alternately with one of the plurality of second circuit patterns 422 as a pair 421. Repeatedly arranged alternately with each other may mean arranged alternately with each other at least twice, for example, in the cross section, the second circuit pattern 422, the 1-1 circuit pattern 421a, and the 1-2 circuit pattern. (421b), the second circuit pattern 422, the 1-1 circuit pattern (421a), the 1-2 circuit pattern (421b), the second circuit pattern 422, etc. are formed on the first insulating layer 411. They can be placed in this order. The number of alternately repeating plurality of first and second circuit patterns 421a, 421b, and 422 is not particularly limited and may vary depending on design. One side of each pair of first circuit patterns 421 facing each other may be inclined so that the gap between them becomes substantially smaller as it approaches the first insulating layer 111 . The other side of each of the pair of first circuit patterns 421 may be substantially vertical. In this repetitive arrangement, the line width (V1) of each of the pair of first circuit patterns 421 and the line width (V2) of the one second circuit pattern 422 and the pair of first circuit patterns ( The distance C1 between 421 and one second circuit pattern 422 and the distance C2 between the pair of first circuit patterns 421 may be substantially equal to each other.

Meanwhile, the plurality of first and second circuit patterns 421a, 421b, and 422 may be fine circuit patterns. For example, the plurality of first and second circuit patterns 421a, 421b, and 422 may each have a line width (V1, V2) of 10 μm or less, 5 μm or less, or 2 μm or less. Additionally, the intervals C1 and C2 between the plurality of first and second circuit patterns 421a, 421b, and 422 may be 10 μm or less, 5 μm or less, or 2 μm or less, respectively. For example, the plurality of first and second circuit patterns 421a, 421b, and 422 have L(Line)/S(Space) of 10㎛/10㎛ or less, or 5㎛/5㎛ or less, or 2㎛/S. It may be a fine circuit pattern of 2㎛ or less.

A printed circuit board 400B according to another example of this structure can be formed through a new process described later, and in this case, unlike conventional SAP, MSAP, etc., it is possible to overcome the limitation of resolution of exposure equipment and separate seed etching. The process may not be performed, and as a result, a fine circuit pattern with an L/S of 10㎛/10㎛ or less, or 5㎛/5㎛ or less, or 2㎛/2㎛ or less can be easily formed.

Meanwhile, the printed circuit board 400B according to another example is each disposed on the first insulating layer 411 and has a width greater than the line widths V1 and V2 of each of the plurality of first and second circuit patterns 421a, 421b, and 422. It may further include one or more third circuit patterns 423 having a wide width or line width (V3). One or more third circuit patterns 423 are general circuit patterns rather than fine circuit patterns, for example, general circuit patterns with a line width and an interval between them exceeding 10 μm, and/or pad patterns, for example, with a width exceeding 10 μm. May include a pad pattern.

Meanwhile, the printed circuit board 400B according to another example is disposed on the first insulating layer 411 and has a width greater than the line widths W1 and W2 of each of the plurality of first and second circuit patterns 421a, 421b, and 422. It may further include one or more fourth circuit patterns 424 having a wide width or line width (V4). The thickness H4 of the one or more fourth circuit patterns 424 may be thicker than the thickness H3 of the one or more third circuit patterns 423. One or more fourth circuit patterns 424 are general circuit patterns rather than fine circuit patterns, for example, general circuit patterns with a line width and an interval between them exceeding 10 μm, and/or plain patterns, for example, with a width exceeding 10 μm. Can include plain patterns.

Hereinafter, components of the printed circuit board 400A according to an example will be described in more detail with reference to the drawings.

The first insulating layer 411 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a material containing an inorganic filler, an organic filler, and/or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) along with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. Additionally, the insulating material may be a photosensitive insulating material such as PID (Photo Imageable Dielectric).

Each of the first and second circuit patterns 421a, 421b, and 422 may include metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. Each of the first and second circuit patterns 421a, 421b, and 422 may perform various functions depending on the design. For example, it may include a signal pattern. Each of the first and second circuit patterns 421a, 421b, and 422 may not include a separate seed metal layer. For example, the plurality of first and second circuit patterns 421a, 421b, and 422 may each include an electrolytic plating layer (or electrolytic copper) and may not include an electroless plating layer (or chemical copper) or a sputtering layer. there is.

One or more third and fourth circuit patterns 423 and 424 may each include metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. Each of the one or more third and fourth circuit patterns 423 and 424 may perform various functions depending on the design. For example, it may include a signal pattern, power pattern, and ground pattern. Each of these patterns may include a line pattern, a pad pattern, a plane pattern, etc. Each of the third and fourth circuit patterns 423 and 424 may not include a separate seed metal layer. For example, one or more third and fourth circuit patterns 423 and 424 may each include an electrolytic plating layer (or electrolytic copper) and may not include an electroless plating layer (or chemical copper) or a sputtering layer. .

Figures 14 to 16 are cross-sectional views schematically showing modified examples of the printed circuit board of Figure 13.

Referring to FIG. 14, the printed circuit board 400B according to a modified example is a printed circuit board 400A according to another example, in which a portion 411P1 of the first insulating layer 411 has a plurality of first and second plurality of first and second insulating layers 411. It is disposed to protrude between at least one of the two circuit patterns 421a, 421b, and 422. For example, in the above-described repetitive arrangement, a portion 411P of the first insulating layer 411 is formed on at least one side of each of the pair of first circuit patterns 421 and one second circuit pattern on the cross-section. It may be disposed to protrude between at least one of one side and the other side of 422. In this case, the connection reliability between the first insulating layer 411 and the plurality of first and second circuit patterns 421a, 421b, and 422 can be further improved. Meanwhile, a portion 411P1 of the first insulating layer 411 includes at least one of the plurality of first and second circuit patterns 421a, 421b, and 422 and one or more third and fourth circuit patterns 423 and 424. It may be disposed to protrude between at least one of the circuit patterns 423 and 424, and/or between one or more of the third and fourth circuit patterns 423 and 424. In this case, connection reliability between the first insulating layer 411 and one or more third and fourth circuit patterns 423 and 424 can also be improved. Meanwhile, another part 411P2 of the first insulating layer 111, for example, in the above-described repetitive arrangement, is disposed between one side of each of the pair of first circuit patterns 421 in the cross-section. ) may not protrude between one side of each of the pair of first circuit patterns 421, and therefore may have a step difference from the above-described portion 411P1.

Referring to FIG. 15, the printed circuit board 400C according to another modified example is provided on at least a portion of the lower side of each of the plurality of first circuit patterns 421a and 421b in the printed circuit board 400A according to another example. An undercut is formed, and a foot is formed on at least a portion of the lower side of each of the plurality of second circuit patterns 422. For example, in the above-described repetitive arrangement, in cross section, each of the pair of first circuit patterns 421 may have grooves 421aU and 421bU on the lower side of the other side, and one second circuit pattern 422 may have protrusions 422F on the lower sides of both sides. In this case, the connection reliability between the first insulating layer 111 and the plurality of first and second circuit patterns 421a, 421b, and 422 can be further improved. Meanwhile, an undercut may be formed on at least a portion of the lower side of each of the one or more third circuit patterns 423, and a foot may be formed on at least a portion of the lower side of each of the one or more fourth circuit patterns 424. In this case, connection reliability between the first insulating layer 411 and one or more third and fourth circuit patterns 423 and 424 can also be improved.

Referring to FIG. 16, the printed circuit board 400D according to another modified example is a printed circuit board 400A according to another example. In the printed circuit board 400A according to another example, a portion 411P1 of the first insulating layer 411 has a plurality of first and the second circuit patterns 421a, 421b, and 422. Additionally, an undercut is formed on at least a portion of the lower side of each of the plurality of first circuit patterns 421a and 421b, and a foot is formed on at least a portion of the lower side of each of the plurality of second circuit patterns 422. Meanwhile, a portion 411P1 of the first insulating layer 411 includes at least one of the plurality of first and second circuit patterns 421a, 421b, and 422 and one or more third and fourth circuit patterns 423 and 424. It may be disposed to protrude between at least one of the circuit patterns 423 and 424, and/or between one or more of the third and fourth circuit patterns 423 and 424. Additionally, an undercut may be formed on at least a portion of the lower side of each of the one or more third circuit patterns 423, and a foot may be formed on at least a portion of the lower side of each of the one or more fourth circuit patterns 424. The specific structure and effects thereof are as described above. Meanwhile, another part 411P2 of the first insulating layer 111, for example, in the above-described repetitive arrangement, is disposed between one side of each of the pair of first circuit patterns 421 in the cross-section. ) may not protrude between one side of each of the pair of first circuit patterns 421, and therefore may have a step difference from the above-described portion 411P1.

Other than that, other contents are substantially the same as those described in the printed circuit board 400A according to another example described above, and redundant description thereof will be omitted.

FIGS. 17A to 17L are cross-sectional views schematically showing an example of manufacturing the printed circuit board of FIG. 13.

Referring to the drawings, a method of manufacturing a printed circuit board 400A according to another example includes forming a plurality of first metal patterns 521 on a substrate 510, and forming a plurality of first metal patterns 521 on the substrate 510. Forming a metal layer 531 covering the pattern 521 and including a metal different from the plurality of first metal patterns 521, at least a portion of the space D1 between the metal layers 531 on the metal layer 531 forming a plurality of second metal patterns 522 each filling and including a different metal from the metal layer 531, etching a portion of the metal layer 531 to form at least a portion of each of the plurality of first metal patterns 521. exposing from the metal layer 531, forming a first insulating layer 411 on the plurality of first and second metal patterns 521 and 522, removing the substrate 510, a plurality of first It includes etching each of the metal patterns 521 to divide each of the plurality of first metal patterns 521 into at least two (521a, 521b), and etching the remaining portion of the metal layer 531. The metal layer 531 may include a different metal from the plurality of first and second metal patterns 521 and 522. For example, the metal layer 531 may have an etch ratio relative to the etchant for etching the metal layer 531 that is different from that of the plurality of first and second metal patterns 521 and 522. For example, the plurality of first and second metal patterns 521 and 522 may include copper (Cu), and the metal layer 531 may include nickel (Ni), but are not limited thereto.

Meanwhile, in the step of forming the plurality of first metal patterns 521, when the width of each of the plurality of first metal patterns 521 is 3n, the spacing between the plurality of first metal patterns 521 is substantially 3n can be satisfied. Additionally, in the step of forming the metal layer 531, the thickness or width of the metal layer 531 may substantially satisfy n. In addition, in the step of dividing each of the plurality of first metal patterns 521 into at least two (521a, 521b), the width of each of the divided at least two (521a, 521b) of each of the plurality of first metal patterns 521 can substantially satisfy n. Therefore, it is possible to finally form a microcircuit with L/S of n/n. In this way, even if the width and spacing of the initial metal pattern are each 3n, the final line width and spacing of the fine circuit can be formed to be n, respectively.

The printed circuit board 400A according to another example formed by this manufacturing method can easily form the spacing of the initial metal pattern as described above, and thus can overcome the limitations of the resolution of exposure equipment, unlike conventional SAP, MSAP, etc. In addition, a separate seed etching process may not be performed, and as a result, it is possible to easily create a fine circuit pattern with an L/S of 10㎛/10㎛ or less, or 5㎛/5㎛ or less, or 2㎛/2㎛ or less. can be formed.

Meanwhile, the method of manufacturing the printed circuit board 400A according to another example may further include forming one or more third metal patterns 523 on the substrate 510. One or more third metal patterns 523 may be formed together when forming a plurality of first metal patterns 521 . One or more third metal patterns 523 may include a different metal from the metal layer 531 . For example, one or more third metal patterns 523 may include copper (Cu), but are not limited thereto.

Meanwhile, a method of manufacturing a printed circuit board (400A) according to another example involves forming one or more fourth metal patterns 524 on the metal layer 531, each filling at least a portion of the other space D2 between the metal layers 531. A forming step may be further included. One or more fourth metal patterns 524 may include a different metal from the metal layer 531 . For example, one or more fourth metal patterns 524 may include copper (Cu), but are not limited thereto.

Meanwhile, a method of manufacturing a printed circuit board (400A) according to another example includes a plurality of first and second metal patterns (521, 522) and one or more third and fourth metals after the step of removing the substrate (510). A dry film 542 exposing at least one portion of the plurality of first and second metal patterns 521 and 522 and one or more third and fourth metal patterns 523 and 524 on the patterns 523 and 524. ), and etching an exposed portion of at least one of the plurality of first and second metal patterns 521 and 522 and one or more third and fourth metal patterns 523 and 524. It can be included. These steps may be performed before or after dividing each of the plurality of first metal patterns 521 into at least two (521a, 521b). Through this, a plurality of first metal patterns 521, a plurality of second metal patterns 521, one or more third metal patterns 523, and/or one or more fourth metal patterns 534 are connected to each other. You can remove parts or unnecessary parts.

Hereinafter, a method of manufacturing a printed circuit board 400A according to another example will be described in more detail with reference to the drawings.

Referring to FIG. 17A, a substrate 510 is prepared. The substrate 510 may be CCL (Copper Clad Laminate), but is not limited thereto, and various types of carrier substrates capable of detach may be used. The substrate 510 may include a detach core 511 and a detach metal layer 512. The detach metal layer 512 may be disposed on one or both sides of the detach core 511. The detach core 511 may include an insulating material, such as an epoxy resin impregnated with glass fiber, and the detach metal layer 512 may include a metal, such as copper (Cu). If necessary, a release layer may be further disposed between the detach core 511 and the detach metal layer 512.

Referring to FIG. 17B, a plurality of first metal patterns 521 are formed on the substrate 510. At this time, one or more third metal patterns 523 may be further formed. A plurality of first metal patterns 521 and one or more third metal patterns 523 form a dry film containing a photosensitive insulating material on the substrate 510, and the dry film is formed through a photolithography process, such as exposure and development. It can be formed by forming a pattern opening, using the detach metal layer 512 exposed through the pattern opening as a seed metal layer, and filling at least a portion of the pattern opening with a plating process, such as electrolytic plating (or electroplating). One or more third metal patterns 523 may include the same metal as the plurality of first metal patterns 521, for example, copper (Cu). When the width of each of the plurality of first metal patterns 521 is 3n, the distance between the plurality of first metal patterns 521 may each substantially satisfy 3n.

Referring to FIG. 17C, a plurality of first metal patterns 521 and one or more third metal patterns 523 are covered with a plurality of first metal patterns 521 and one or more third metal patterns 523. A metal layer 531 is formed. The metal layer 531 may be formed through a plating process, such as electrolytic plating (or electroplating). The metal layer 531 may include a metal different from the plurality of first metal patterns 521 and one or more third metal patterns 523, for example, nickel (Ni). When the width of each of the plurality of first metal patterns 521 is n, the thickness or width of the metal layer 531 may substantially satisfy n.

Referring to FIG. 17D, a plurality of second metal patterns 522 are formed on the metal layer 531, each filling at least a portion of the space D1 between the metal layers 531. At this time, one or more fourth metal patterns 524 may be further formed on the metal layer 531 to fill at least a portion of the other space D2 between the metal layers 531 . The plurality of second metal patterns 522 and one or more fourth metal patterns 524 may be formed by filling at least a portion of each of the spaces G1 and G2 using a plating process, for example, electrolytic plating (or electroplating). One or more fourth metal patterns 524 may include the same metal as the plurality of second metal patterns 522, for example, copper (Cu). When the width of each of the plurality of first metal patterns 521 is 3n, the width of each of the plurality of second metal patterns 522 may substantially satisfy n.

Referring to FIG. 17E, a portion of the metal layer 531 is etched to expose at least a portion of each of the plurality of first metal patterns 521 and at least a portion of each of the one or more third metal patterns 523 from the metal layer 531. I order it. The metal layer 531 includes a metal different from the plurality of first metal patterns 521 and one or more third metal patterns 523, for example, nickel (Ni), and is selectively etched using, for example, an etchant for nickel (Ni). It can be etched. The etchant for nickel (Ni) can be used with an etch ratio of nickel (Ni) to copper (Cu) of at least 8:2.

Referring to FIG. 17F, a first insulating layer 411 is formed on a plurality of first and second metal patterns 521 and 522 and one or more third and fourth metal patterns 523 and 524. The first insulating layer 411 may be formed by laminating an uncured film and then curing it, but is not limited to this.

Referring to FIGS. 17G and 17H, the substrate 510 is removed. The detach core 511 can be separated and removed from the detach metal layer 512. The detach metal layer 512 remaining after separation and removal of the detach core 511 can be removed by etching.

Referring to FIG. 17I, each of the plurality of first metal patterns 521 is etched to divide each of the plurality of first metal patterns 521 into at least two (521a, 521b). As an etching method, for example, tenting can be used. For example, the central portion of each of the plurality of first metal patterns 521 is exposed on the plurality of first and second metal patterns 521 and 522 and one or more third and fourth metal patterns 523 and 524. After forming the first dry film 541 having an opening, the exposed portion of each of the plurality of first metal patterns 521 is etched to form at least two pieces 521a, each of the plurality of first metal patterns 521. It can be divided into 521b). The opening of the first dry film 541 may be formed through a photolithography process, such as exposure and development. The opening of the first dry film 541 may substantially satisfy n, and therefore, the width of each of the at least two divisions 521a and 521b of each of the plurality of first metal patterns 521 may substantially satisfy n. there is.

Referring to FIGS. 17J and 17K, a plurality of first and second metal patterns 521 and 522 and one or more third and fourth metal patterns 523 and 524 are formed. A second dry film 542 is formed exposing at least a portion of (521, 522) and one or more third and fourth metal patterns (523, 524), and then a plurality of first and second metal patterns are formed. The exposed portion of at least one of the patterns 521 and 522 and the one or more third and fourth metal patterns 523 and 524 is etched. The opening of the second dry film 542 may be formed through a photolithography process, such as exposure and development. These processes may be performed before dividing each of the plurality of first metal patterns 521 into at least two (521a, 521b). Through this, a plurality of first metal patterns 521, a plurality of second metal patterns 521, one or more third metal patterns 523, and/or one or more fourth metal patterns 534 are connected to each other. You can remove parts or unnecessary parts.

Referring to FIG. 17L, the remaining portion of the metal layer 531 is etched. By etching the metal layer 531, a plurality of first and second circuit patterns ( 421a, 421b, and 422) and one or more third and fourth circuit patterns 423 and 424 may be formed.

Through a series of processes, the printed circuit board 400A according to another example described above can be formed, and other contents are substantially the same as those described for the printed circuit board 400A according to another example described above. Redundant explanations are omitted.

FIGS. 18A to 18D are process cross-sectional views schematically showing the shapes of a plurality of first and second metal patterns and metal layers and the degree of etching of some of the metal layers for manufacturing the printed circuit boards of FIGS. 13 to 16, respectively.

Referring to FIG. 18A, as in step (a), at least a portion of the edge of each top surface of the plurality of first metal patterns 521 may be formed substantially vertically, and thus the metal layer 531 and the plurality of first metal patterns 521 may be formed substantially vertically. At least a portion of the edge of each top surface of the second metal pattern 522 may be formed substantially vertically. At this time, at least a portion of the edge of the one or more third and fourth metal patterns 523 and 524 of each top surface may be formed substantially vertically. In addition, as in step (b), when the metal layer 531 is selectively removed, the top surface of the metal layer 531 is substantially similar to the top surface of each of the plurality of first and second metal patterns 521 and 522. Can be etched planarly. At this time, the metal layer 531 may be etched substantially coplanar with the top surface of each of the one or more third and fourth metal patterns 523 and 524. Therefore, as in step (c), the first insulating layer 411 may be formed on a substantially coplanar flat surface. Additionally, as in step (d), an undercut or foot may not be formed on the bottom side of the plurality of first and second circuit patterns 421a, 421b, and 422. At this time, no undercut or foot may be formed on the bottom side of the one or more third and fourth circuit patterns 423 and 424. Additionally, the top surface of the first insulating layer 411 may be substantially flat without any steps. For example, the structure of the printed circuit board 400A according to another example may be formed.

Referring to FIG. 18B, unlike in FIG. 18A, when the metal layer 531 is selectively removed in step (b), the metal layer 531 is overetched so that the top surface of the metal layer 531 is formed into a plurality of first and second The metal patterns 521 and 522 may be etched to have a step from the top surface of each. At this time, the metal layer 531 may be etched to have a step difference from the top surface of each of the one or more third and fourth metal patterns 523 and 524. Therefore, in step (c), the first insulating layer 411 may extend into the over-etched area. Additionally, in step (d), a portion 411P1 of the first insulating layer 411 may protrude between a portion of the plurality of first and second circuit patterns 421a, 421b, and 422. At this time, a portion 411P1 of the first insulating layer 411 may protrude between one or more third and fourth circuit patterns 423 and 424, etc. For example, the structure of the printed circuit board 400B according to a modified example may be formed.

Referring to FIG. 18C, unlike in FIG. 18A, in step (a), the plurality of first metal patterns 521 may be formed so that at least a portion of the edge of each top surface is rounded. Accordingly, at least part of the edge of the top surface of the metal layer 531 may be rounded, and at least part of the edge of the top surface of each of the plurality of second metal patterns 522 may be sharp. At this time, at least a portion of the edge of the one or more third and fourth metal patterns 523 and 524 of each top surface may be formed to be rounded or sharp. Therefore, in step (d), undercuts or feet, for example, grooves 421aU, 421bU and protrusions 422F, are formed on at least a portion of the bottom side of each of the plurality of first and second circuit patterns 421a, 421b, and 422. You can. At this time, an undercut or foot may be formed on at least a portion of the bottom side of each of the one or more third and fourth circuit patterns 423 and 424. For example, the structure of the printed circuit board 400C according to another modified example may be formed.

Referring to FIG. 18D, unlike in FIG. 18A, in step (a), the plurality of first metal patterns 521 may be formed so that at least a portion of the edge of each top surface is rounded. Accordingly, at least part of the edge of the top surface of the metal layer 531 may be rounded, and at least part of the edge of the top surface of each of the plurality of second metal patterns 522 may be sharp. At this time, at least a portion of the edge of the one or more third and fourth metal patterns 523 and 524 of each top surface may be formed to be rounded or sharp. In addition, when the metal layer 531 is selectively removed in step (b), the metal layer 531 is overetched, so that the top surface of the metal layer 531 is a top surface of each of the plurality of first and second metal patterns 521 and 522. It can be etched to have a surface and a step. At this time, the metal layer 531 may be etched to have a step difference from the top surface of each of the one or more third and fourth metal patterns 523 and 524. Therefore, in step (c), the first insulating layer 411 may extend into the over-etched area. Additionally, in step (d), a portion 411P1 of the first insulating layer 411 may protrude between a portion of the plurality of first and second circuit patterns 421a, 421b, and 422. At this time, a portion 411P1 of the first insulating layer 411 may protrude between one or more third and fourth circuit patterns 423 and 424, etc. Additionally, an undercut or foot, for example, groove portions 421aU and 421bU and a protrusion portion 422F, may be formed on at least a portion of the bottom side of each of the plurality of first and second circuit patterns 421a, 421b, and 422. At this time, an undercut or foot may be formed on at least a portion of the bottom side of each of the one or more third and fourth circuit patterns 423 and 424. For example, the structure of the printed circuit board 400D according to another modified example may be formed.

Other contents are substantially the same as those described in the above-mentioned printed circuit boards 400A, 400B, 400C, and 400D and the manufacturing method of the above-described printed circuit board 400A, and overlapping descriptions thereof will be omitted.

FIGS. 19 to 22 are cross-sectional views schematically showing the case where the printed circuit board of FIGS. 13 to 16 is applied to a multilayer printed circuit board, respectively.

Referring to the drawings, the multi-layer printed circuit boards (600A, 600B, 600C, 600D) are the first insulating layer 411 in the above-mentioned printed circuit boards (400A, 400B, 400C, 400D), respectively. A first wiring layer 420 disposed on the upper surface and including a plurality of first and second circuit patterns 421a, 421b, 422 and one or more third and fourth circuit patterns 423, 424, and first insulation A second wiring layer 430 including a plurality of fifth circuit patterns 431 disposed on the lower surface of the layer 411, penetrating the first insulating layer 411 and connected to at least a portion of the second wiring layer 430. The first connection via 451 is disposed on the lower surface of the second insulating layer and covers at least a portion of the second wiring layer 430, the second insulating layer 412 is disposed on the lower surface of the second insulating layer 412 a third wiring layer 440 including a plurality of sixth circuit patterns 441, and a second connection via 452 penetrating the second insulating layer 412 and connected to at least a portion of the third wiring layer 440. It further includes. If necessary, a first resist layer 461 is disposed on the upper surface of the first insulating layer 411 and covers at least a portion of the first wiring layer 420, and is disposed on the lower surface of the second insulating layer 412. and may further include a second resist layer 462 covering at least a portion of the third wiring layer 440.

Meanwhile, the width or line width (V5, V6) of the plurality of fifth and sixth circuit patterns (431, 441) is the line width (V1, It can be wider than V2). In addition, the intervals C3 and C4 between the plurality of fifth and sixth circuit patterns 431 and 442 are longer than the intervals C1 and C2 between the plurality of first and second circuit patterns 421a, 421b and 422. It can be wide. For example, each of the plurality of fifth and sixth circuit patterns 431 and 441 is a general circuit pattern rather than a fine circuit pattern, for example, the line widths (V5, V6) are greater than 10㎛ and the intervals (C3, C4) are 10㎛. It may include a general circuit pattern exceeding ㎛, and may also include a pad pattern or a plain pattern, for example, a pad pattern or a plain pattern having a width greater than 10 ㎛.

Meanwhile, the plurality of first and second circuit patterns 421a, 421b, 422 and one or more third and fourth circuit patterns 423, 424 may not include a seed metal layer, and the plurality of fifth circuit patterns may not include a seed metal layer. 431 and the plurality of sixth circuit patterns 432 may include seed metal layers (n1, n2). As such, the plurality of first and second circuit patterns 421a, 421b, 422 and one or more third and fourth circuit patterns 423, 424 are a plurality of fifth circuit patterns formed through a plating process such as MSAP or SAP. Unlike the circuit pattern 431 and the plurality of sixth circuit patterns 432, they can be formed through the above-described fine circuit forming process and may not include a seed metal layer.

Hereinafter, the components of the multi-layer printed circuit boards 600A, 600B, 600C, and 600D will be described in more detail with reference to the drawings.

The second insulating layer 412 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as polyimide, or a material containing an inorganic filler, an organic filler, and/or glass fiber (Glass Fiber, Glass Cloth, Glass Fabric) along with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. Additionally, the insulating material may be a photosensitive insulating material such as PID (Photo Imageable Dielectric).

Each of the plurality of fifth and sixth circuit patterns 431 and 441 may include metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. Each of the fifth and sixth circuit patterns 431 and 441 may perform various functions depending on the design. For example, it may include a signal pattern, power pattern, and ground pattern. Each of these patterns may include a line pattern, a pad pattern, a plane pattern, etc. The plurality of fifth and sixth circuit patterns 431 and 441 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper), respectively, but are not limited thereto. A sputtered layer may be formed instead of an electroless plating layer, and both may be included. Additionally, copper foil may be further included.

The seed metal layers (n1, n2) may each include a metal. Metals include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and/or alloys thereof. It can be included. Preferably, it may include copper (Cu), but is not limited thereto. The seed metal layer (m) may include an electroless plating layer (or chemical copper) and/or a sputtering layer. The sputter layer may be one layer or multiple layers.

The first and second connection vias 451 and 452 may each include a plurality of micro vias. Micro vias may be field vias that fill a via hole or conformal vias arranged along the wall of the via hole. Micro vias may be arranged as a stacked type and/or a staggered type. Micro vias may have a tapered shape where the width of the upper surface is narrower than the width of the lower surface. The first and second connection vias 451 and 452 may each include metal, and the metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), and nickel ( It may include Ni), lead (Pb), titanium (Ti), or alloys thereof, and preferably includes copper (Cu), but is not limited thereto. The first and second connection vias 451 and 452 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrical copper), respectively, but are not limited thereto. A sputtered layer may be formed instead of an electroless plating layer, and both may be included. The first and second connection vias 451 and 452 may perform various functions depending on the design of the corresponding layer. For example, it may include ground vias, power vias, signal vias, etc.

The first and second resist layers 461 and 462 may include liquid or film-type solder resist, but are not limited thereto, and other types of insulating materials may be used. The first resist layer 461 exposes at least a portion of at least one of the one or more third circuit patterns 423 and/or at least a portion of at least one of the one or more fourth circuit patterns 424. Alternatively, it may have second openings (k1, k3). The second resist layer 462 may have a third opening k2 that exposes at least a portion of at least one of the plurality of sixth circuit patterns 441 . A surface treatment layer may be formed on the pattern exposed through the first opening (k1), the second opening (k3), and/or the third opening (k2). Alternatively, metal bumps may be formed on the pattern exposed through the first opening (k1), the second opening (k3), and/or the third opening (k2). The second opening k3 may be deeper than the first opening k1.

If necessary, the multi-layer printed circuit boards (600A, 600B, 600C, 600D) may include a larger number of insulating layers, wiring layers, and connection via layers than shown in the drawings, for example, first and first These components may be added between the two insulating layers 311 and 312.

Other contents are substantially the same as those described for the above-mentioned printed circuit boards 400A, 400B, 400C, and 400D, and redundant description thereof will be omitted.

On the other hand, the multi-layer printed circuit boards (600A, 600B, 600C, 600D) have a first insulating layer 411 in the manufacturing method described in FIGS. 17A to 17L and 18A to 18D. After the forming step, forming a second wiring layer 430 on the first insulating layer 411, a first wiring layer penetrating through the first insulating layer 411 and connected to at least a portion of the second wiring layer 430 Forming a connection via 451, forming a second insulating layer 412 covering at least a portion of the second wiring layer 430 on the first insulating layer 411, on the second insulating layer 412 Forming a third wiring layer 440, and forming a second connection via 452 penetrating the second insulating layer 412 and connected to at least a portion of the third wiring layer 440. It can be formed in this way. If necessary, after etching the remaining portion of the metal layer 531, at least a portion of each of the first and second metal patterns 521 and 522 and one of the plurality of first and second metal patterns 521 and 522 are formed on the first insulating layer 411. Forming a first resist layer 461 covering at least a portion of each of the third and fourth metal patterns 523 and 524, and at least a portion of the third wiring layer 440 on the second insulating layer 412. It may be formed by further comprising forming a second resist layer 462 covering the .

The second insulating layer 412, the second and third wiring layers 430 and 440, and the first and second connection vias 451 and 52 can be formed through a build-up process. For example, the second insulating layer 412 may be formed by laminating an uncured film and then curing it, but is not limited to this. In addition, the second and third wiring layers (430, 440) and the first and second connection vias (451, 452) are formed by machining via holes in the first and second insulating layers (411, 412) and then using SAP, MSAP, etc. It can be formed using a plating process, but is not limited to this.

Other contents are substantially the same as those described in the manufacturing method described in FIGS. 17A to 17L and FIGS. 18A to 18D, and overlapping description thereof will be omitted.

In the present disclosure, the expression to cover may include not only the case of covering entirely but also the case of covering at least part of the case, and may also include the case of covering indirectly as well as the case of directly covering.

In the present disclosure, the expression to fill may include not only completely filling but also approximately filling, and may include, for example, cases where some voids or voids exist.

In the present disclosure, thickness, width, line width, spacing, depth, etc. can be measured using a scanning microscope or an optical microscope based on a polished or cut cross section of the printed circuit board. For example, it can be measured on a cross section. If the thickness, width, line width, gap, depth, etc. are not constant, the thickness, width, line width, gap, depth, etc. can be compared with the average value of the values measured at five arbitrary points. When the side of the pattern has a tapered shape, the line width or width of the pattern can be measured at five arbitrary points based on the thickness direction, and then use the average value thereof.

In the present disclosure, the judgment can actually include process errors, position deviations, errors during measurement, etc. that occur during the manufacturing process. For example, having substantially the same line width, etc. may include not only being completely numerically identical, but also having approximately similar values within an error range, and may also include some differences due to the tapered shape. there is. In addition, substantially coplanar may include not only the case of being completely on the same plane, but also the case of being approximately on the same plane.

In the present disclosure, the same insulating material may mean not only the exact same insulating material but also the same type of insulating material. Accordingly, the composition of the insulating materials is substantially the same, but their specific composition ratios may vary slightly.

In the present disclosure, the meaning of cross-section may mean the cross-sectional shape when the object is cut vertically, the cross-sectional shape when the object is cut vertically, or the cross-sectional shape when the object is viewed from a side view. In addition, the meaning on a plane may mean a planar shape when the object is cut horizontally, or a planar shape when the object is viewed from a top-view or bottom-view.

In the present disclosure, lower, lower, bottom, etc. are used for convenience to mean a downward direction based on the cross section of the drawing, and upper, upper, upper, etc. are used to mean the opposite direction. However, this direction is defined for convenience of explanation, and the scope of the patent claims is not particularly limited by the description of this direction, and the concept of top/bottom can change at any time.

In the present disclosure, the meaning of connected is a concept that includes not only directly connected, but also indirectly connected through an adhesive layer or the like. In addition, the meaning of being electrically connected is a concept that includes both cases where it is physically connected and cases where it is not connected. In addition, expressions such as first, second, etc. are used to distinguish one component from another component and do not limit the order and/or importance of the components. In some cases, the first component may be named the second component, and similarly, the second component may be named the first component without departing from the scope of rights.

The expression 'example' used in the present disclosure does not mean identical embodiments, but is provided to emphasize and explain different unique features. However, the examples presented above do not exclude being implemented in combination with features of other examples. For example, even if a matter explained in a specific example is not explained in another example, it can be understood as an explanation related to the other example, as long as there is no explanation contrary to or contradictory to the matter in the other example.

The terminology used in this disclosure is used to describe examples only and is not intended to limit the disclosure. At this time, singular expressions include plural expressions, unless the context clearly indicates otherwise.

1000: Electronic devices
1010: Motherboard
1020: Chip related parts
1030: Network related parts
1040: Other parts
1050: Camera
1060: Antenna
1070: display
1080: Battery
1090: signal line
1100: Smartphone
1110: motherboard
1120: parts
1121: Parts package
1130: Camera module
1140: Speaker
100A, 100B, 100C, 100D, 300A, 300B, 300C, 300D: Printed circuit board
111, 112: insulating layer
120, 130, 140: wiring layer
121, 122, 123, 124, 131, 141: Circuit pattern
151, 152: Connection via
161, 162: Resist layer
210: substrate
211: Detach Core
212: Detach metal layer
221, 222, 223, 224: Metal pattern
231: metal layer
241: dry film
400A, 400B, 400C, 400D, 600A, 600B, 600C, 600D: Printed circuit board
411, 412: insulating layer
420, 430, 440: wiring layer
421, 422, 423, 424, 431, 441: Circuit pattern
451, 452: Connection via
461, 462: resist layer
510: substrate
511: Detach Core
512: Detach metal layer
521, 522, 523, 524: Metal pattern
531: metal layer
541, 542: dry film

Claims (35)

first insulating layer;
a plurality of first circuit patterns each disposed on the first insulating layer; and
a plurality of second circuit patterns each disposed on the first insulating layer and having a thickness thinner than the plurality of first circuit patterns; Includes,
At least one of the plurality of first circuit patterns and at least one of the plurality of second circuit patterns are alternately and repeatedly arranged with each other,
Printed circuit board.
According to claim 1,
The line width of each of the plurality of first and second circuit patterns is 10㎛ or less,
The spacing between the plurality of first and second circuit patterns is each 10㎛ or less,
Printed circuit board.
According to claim 1,
One of the plurality of first circuit patterns and one of the plurality of second circuit patterns are alternately and repeatedly arranged with each other,
Printed circuit board.
According to claim 3,
In cross section,
The one first circuit pattern has grooves on the lower sides of both sides,
The one second circuit pattern has protrusions on the lower sides of both sides,
Printed circuit board.
According to claim 4,
The line width of the one first circuit pattern, the line width of the one second circuit pattern, and the spacing between the one first and second circuit patterns are substantially equal to each other,
Printed circuit board.
According to claim 4,
A portion of the first insulating layer is disposed to protrude between at least one of one side and the other side of each of the first and second circuit patterns,
Printed circuit board.
According to claim 1,
Two of the plurality of first circuit patterns are repeatedly and alternately arranged in pairs with one of the plurality of second circuit patterns,
Printed circuit board.
According to claim 7,
One side of each of the pair of first circuit patterns facing each other is inclined so that the gap between them becomes substantially smaller as it approaches the first insulating layer,
Printed circuit board.
According to claim 8,
In cross section,
Each of the pair of first circuit patterns has a groove on the lower side of the other side,
The one second circuit pattern has protrusions on the lower sides of both sides,
Printed circuit board.
According to clause 9,
A line width of each of the pair of first circuit patterns, a line width of the one second circuit pattern, a gap between the pair of first circuit patterns and the one second circuit pattern, and the pair of first circuit patterns. The spacing between the first circuit patterns is substantially the same as each other,
Printed circuit board.
According to clause 9,
A portion of the first insulating layer is arranged to protrude between at least one of the other sides of each of the pair of first circuit patterns and at least one of the one side and the other side of the one second circuit pattern,
Printed circuit board.
According to claim 11,
The protruding portion of the first insulating layer has a step difference from the other portion disposed between one side of each of the pair of first circuit patterns of the first insulating layer.
Printed circuit board.
According to claim 1,
one or more third circuit patterns each disposed on the first insulating layer and having a width or a wider line width than each of the plurality of first and second circuit patterns; and
One or more fourth circuits each disposed on the first insulating layer, having a thickness thinner than the one or more third circuit patterns, and having a width or a line width wider than the line width of each of the plurality of first and second circuit patterns. pattern; Containing more,
Printed circuit board.
According to claim 13,
a first wiring layer disposed on the upper surface of the first insulating layer and including the plurality of first and second circuit patterns and the one or more third circuit patterns;
a second wiring layer disposed on a lower surface of the first insulating layer and including a plurality of fifth circuit patterns having a wider width or line width than each of the plurality of first and second circuit patterns;
a first connection via that penetrates the first insulating layer and is connected to at least a portion of the second wiring layer;
a second insulating layer disposed on a lower surface of the first insulating layer and covering at least a portion of the second wiring layer;
a third wiring layer disposed on the lower surface of the second insulating layer and including a plurality of sixth circuit patterns that are wider or wider than the line widths of each of the plurality of first and second circuit patterns; and
a second connection via that penetrates the second insulating layer and is connected to at least a portion of the third wiring layer; Containing more,
Printed circuit board.
According to claim 14,
a first opening disposed on the upper surface of the first insulating layer, covering at least a portion of the first wiring layer, and exposing at least a portion of at least one of the one or more third circuit patterns; and the one or more fourth openings. a first resist layer having at least one of second openings exposing at least a portion of at least one of the circuit patterns; and
a second resist layer disposed on a lower surface of the second insulating layer, covering at least a portion of the third wiring layer, and having a third opening exposing at least a portion of at least one of the plurality of sixth circuit patterns; Containing more,
Printed circuit board.
According to claim 15,
The depth of the second opening is deeper than the depth of the first opening,
Printed circuit board.
first insulating layer;
a first wiring layer disposed on the first insulating layer and including first and second circuit patterns having different thicknesses; and
a second wiring layer disposed below the first insulating layer and including a third circuit pattern having a wider line width than each of the first and second circuit patterns; Including,
Printed circuit board.
According to claim 17,
The line width of each of the first and second circuit patterns is 10㎛ or less,
The line width of the third circuit pattern is greater than 10㎛,
Printed circuit board.
According to claim 17,
The first to third circuit patterns are each arranged in plural numbers,
The spacing between the plurality of third circuit patterns is wider than the spacing between the plurality of first and second circuit patterns,
Printed circuit board.
According to claim 19,
One of the plurality of first circuit patterns and one of the plurality of second circuit patterns are alternately and repeatedly arranged with each other,
Printed circuit board.
According to claim 19,
Two of the plurality of first circuit patterns are repeatedly and alternately arranged as a pair with one of the plurality of second circuit patterns,
Printed circuit board.
According to claim 17,
a connection via penetrating the first insulating layer and connecting at least a portion of each of the first and second wiring layers to each other; It further includes,
The connection via is tapered so that its width becomes substantially smaller as it moves from the surface in contact with the second wiring layer to the surface in contact with the first wiring layer.
Printed circuit board.
According to claim 17,
The first and second circuit patterns do not include a seed metal layer,
The third circuit pattern includes a seed metal layer,
Printed circuit board.
forming a plurality of first metal patterns on a substrate;
forming a metal layer covering the plurality of first metal patterns on the substrate and including a metal different from the plurality of first metal patterns;
forming a plurality of second metal patterns on the metal layer, each filling at least a portion of the space between the metal layers, and each containing a different metal from the metal layer;
etching a portion of the metal layer to expose at least a portion of each of the plurality of first metal patterns from the metal layer;
forming a first insulating layer on the plurality of first and second metal patterns;
removing the substrate; and
etching the remaining portion of the metal layer; Including,
Manufacturing method of printed circuit boards.
According to claim 24,
The plurality of first and second metal patterns include copper (Cu),
The metal layer contains nickel (Ni),
Manufacturing method of printed circuit board.
According to claim 24,
In forming the plurality of first metal patterns,
When the width of each of the plurality of first metal patterns is n, the spacing between the plurality of first metal patterns each substantially satisfies 3n,
In the step of forming the metal layer,
The thickness or width of the metal layer substantially satisfies n,
Manufacturing method of printed circuit boards.
According to claim 24,
After removing the substrate,
Etching each of the plurality of first metal patterns to divide each of the plurality of first metal patterns into at least two; Containing more,
Manufacturing method of printed circuit board.
According to clause 27,
In forming the plurality of first metal patterns,
When the width of each of the plurality of first metal patterns is 3n, the spacing between the plurality of first metal patterns each substantially satisfies 3n,
In the step of forming the metal layer,
The thickness or width of the metal layer substantially satisfies n,
In the step of dividing each of the plurality of first metal patterns into at least two,
The width of each of at least two divisions of each of the plurality of first metal patterns substantially satisfies n,
Manufacturing method of printed circuit board.
According to claim 24,
In forming the plurality of first metal patterns,
The plurality of first metal patterns are formed so that at least a portion of the edge of each top surface is rounded,
Manufacturing method of printed circuit board.
According to claim 24,
In the step of etching a portion of the metal layer,
The metal layer is etched so that the top surface has a step difference from the top surface of each of the plurality of first and second circuit patterns,
Manufacturing method of printed circuit boards.
According to claim 24,
The substrate includes a detach core and a detach metal layer disposed on the detach core and including a metal different from the metal layer,
In the step of removing the substrate,
The detach core is separated from the detach metal layer and removed,
The detach metal layer is removed by etching,
Manufacturing method of printed circuit boards.
According to claim 31,
After removing the substrate,
forming a dry film exposing a portion of at least one of the plurality of first and second metal patterns on the plurality of first and second metal patterns; and
etching an exposed portion of at least one of the plurality of first and second metal patterns; Containing more,
Manufacturing method of printed circuit board.
According to claim 24,
In forming the plurality of first metal patterns,
Further forming one or more third metal patterns on the substrate,
In the step of forming the metal layer,
The metal layer further covers the one or more third metal patterns,
In forming the plurality of second metal patterns,
Further forming one or more fourth metal patterns on the metal layer, each filling at least a portion of the other space between the metal layers,
The metal layer includes a metal different from the one or more third and fourth metal patterns,
Manufacturing method of printed circuit board.
According to claim 33,
After forming the first insulating layer,
forming a second wiring layer on the first insulating layer;
forming a first connection via that penetrates the first insulating layer and is connected to at least a portion of the second wiring layer;
forming a second insulating layer covering at least a portion of the second wiring layer on the first insulating layer;
forming a third wiring layer on the second insulating layer; and
forming a second connection via that penetrates the second insulating layer and is connected to at least a portion of the third wiring layer; Containing more,
Manufacturing method of printed circuit board.
According to claim 34,
After etching the remaining portion of the metal layer,
forming a first resist layer covering at least a portion of each of the plurality of first and second metal patterns and at least a portion of each of the one or more third and fourth metal patterns on the first insulating layer; and
forming a second resist layer covering at least a portion of the third wiring layer on the second insulating layer; Containing more,
Manufacturing method of printed circuit board.

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